Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000148.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT8192DC4096, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000148
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 11K Feb 25 12:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 12:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 12:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 12:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 12:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 25 12:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 12:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 87K Feb 25 12:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-11
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679201056543

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT8192DC4096
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:44:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 04:44:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:44:20] [INFO ] Load time of PNML (sax parser for PT used): 42 ms
[2023-03-19 04:44:20] [INFO ] Transformed 9 places.
[2023-03-19 04:44:20] [INFO ] Transformed 8 transitions.
[2023-03-19 04:44:20] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 187 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 18 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 17 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 04:44:20] [INFO ] Computed 4 place invariants in 5 ms
[2023-03-19 04:44:20] [INFO ] Implicit Places using invariants in 198 ms returned []
[2023-03-19 04:44:20] [INFO ] Invariant cache hit.
[2023-03-19 04:44:20] [INFO ] Implicit Places using invariants and state equation in 54 ms returned []
Implicit Place search using SMT with State Equation took 313 ms to find 0 implicit places.
[2023-03-19 04:44:20] [INFO ] Invariant cache hit.
[2023-03-19 04:44:20] [INFO ] Dead Transitions using invariants and state equation in 51 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 385 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 04:44:21] [INFO ] Flatten gal took : 26 ms
[2023-03-19 04:44:21] [INFO ] Flatten gal took : 7 ms
[2023-03-19 04:44:21] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 12293 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=423 ) properties (out of 10) seen :3
Finished Best-First random walk after 53 steps, including 0 resets, run visited all 7 properties in 6 ms. (steps per millisecond=8 )
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 4 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 23 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 04:44:21] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 04:44:21] [INFO ] Implicit Places using invariants in 41 ms returned [2]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 44 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 3/9 places, 5/8 transitions.
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 3 transition count 4
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 3 transition count 3
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 2 transition count 3
Applied a total of 3 rules in 5 ms. Remains 2 /3 variables (removed 1) and now considering 3/5 (removed 2) transitions.
// Phase 1: matrix 3 rows 2 cols
[2023-03-19 04:44:21] [INFO ] Computed 1 place invariants in 1 ms
[2023-03-19 04:44:21] [INFO ] Implicit Places using invariants in 25 ms returned []
[2023-03-19 04:44:21] [INFO ] Invariant cache hit.
[2023-03-19 04:44:21] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 58 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 2/9 places, 3/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 130 ms. Remains : 2/9 places, 3/8 transitions.
Stuttering acceptance computed with spot in 267 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(LT s1 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 6 steps with 0 reset in 2 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00 finished in 495 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0&&G(p1))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 6 transition count 7
Applied a total of 3 rules in 4 ms. Remains 6 /9 variables (removed 3) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 6 cols
[2023-03-19 04:44:22] [INFO ] Computed 2 place invariants in 1 ms
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-19 04:44:22] [INFO ] Invariant cache hit.
[2023-03-19 04:44:22] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants and state equation in 42 ms returned []
Implicit Place search using SMT with State Equation took 77 ms to find 0 implicit places.
[2023-03-19 04:44:22] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:44:22] [INFO ] Invariant cache hit.
[2023-03-19 04:44:22] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 6/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 128 ms. Remains : 6/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 140 ms :[(OR (NOT p1) (NOT p0)), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=(OR (NOT p0) (NOT p1)), acceptance={0} source=0 dest: 0}, { cond=(AND p0 p1), acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 1}]], initial=0, aps=[p0:(LT s3 1), p1:(GEQ s5 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 3 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01 finished in 291 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(!p0))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 4 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 04:44:22] [INFO ] Computed 2 place invariants in 0 ms
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants in 32 ms returned [2]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 33 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 3/9 places, 5/8 transitions.
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 3 transition count 4
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 3 transition count 3
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 2 transition count 3
Applied a total of 3 rules in 3 ms. Remains 2 /3 variables (removed 1) and now considering 3/5 (removed 2) transitions.
// Phase 1: matrix 3 rows 2 cols
[2023-03-19 04:44:22] [INFO ] Computed 1 place invariants in 0 ms
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-03-19 04:44:22] [INFO ] Invariant cache hit.
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants and state equation in 29 ms returned []
Implicit Place search using SMT with State Equation took 57 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 2/9 places, 3/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 99 ms. Remains : 2/9 places, 3/8 transitions.
Stuttering acceptance computed with spot in 50 ms :[p0]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(LT s1 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 finished in 167 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((!p0||G(p1)||X(X(F(p2))))))'
Support contains 6 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 8 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2023-03-19 04:44:22] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-19 04:44:22] [INFO ] Invariant cache hit.
[2023-03-19 04:44:22] [INFO ] Implicit Places using invariants and state equation in 47 ms returned []
Implicit Place search using SMT with State Equation took 82 ms to find 0 implicit places.
[2023-03-19 04:44:22] [INFO ] Invariant cache hit.
[2023-03-19 04:44:22] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 130 ms. Remains : 8/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 325 ms :[(NOT p2), (NOT p2), (AND (NOT p2) p0 (NOT p1)), (AND (NOT p2) p0 (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p2), acceptance={0} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=(AND p0 (NOT p1)), acceptance={} source=3 dest: 0}, { cond=(AND p0 p1), acceptance={} source=3 dest: 4}], [{ cond=(NOT p1), acceptance={} source=4 dest: 1}, { cond=p1, acceptance={} source=4 dest: 5}], [{ cond=(AND (NOT p1) (NOT p2)), acceptance={} source=5 dest: 1}, { cond=(AND p1 (NOT p2)), acceptance={} source=5 dest: 5}]], initial=2, aps=[p2:(AND (GEQ s5 1) (GEQ s6 1)), p0:(LT s7 1), p1:(AND (GEQ s0 1) (GEQ s1 1) (GEQ s2 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Product exploration explored 100000 steps with 7828 reset in 516 ms.
Product exploration explored 100000 steps with 7789 reset in 208 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p2) p0 p1), (X (NOT (AND p0 (NOT p1)))), (X (AND p0 p1)), true, (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 211 ms. Reduced automaton from 6 states, 9 edges and 3 AP (stutter sensitive) to 5 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 235 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Incomplete random walk after 12293 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=1365 ) properties (out of 3) seen :2
Finished Best-First random walk after 17 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=8 )
Knowledge obtained : [(AND (NOT p2) p0 p1), (X (NOT (AND p0 (NOT p1)))), (X (AND p0 p1)), true, (X (X p1))]
False Knowledge obtained : [(F p2), (F (NOT (AND (NOT p2) p1))), (F (AND (NOT p2) (NOT p1)))]
Knowledge based reduction with 5 factoid took 478 ms. Reduced automaton from 5 states, 6 edges and 2 AP (stutter sensitive) to 5 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 265 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Stuttering acceptance computed with spot in 267 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Support contains 5 out of 8 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 04:44:25] [INFO ] Invariant cache hit.
[2023-03-19 04:44:25] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-19 04:44:25] [INFO ] Invariant cache hit.
[2023-03-19 04:44:25] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 72 ms to find 0 implicit places.
[2023-03-19 04:44:25] [INFO ] Invariant cache hit.
[2023-03-19 04:44:25] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 111 ms. Remains : 8/8 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p2) p1), true]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 131 ms. Reduced automaton from 5 states, 6 edges and 2 AP (stutter sensitive) to 5 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 263 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Incomplete random walk after 12293 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=1536 ) properties (out of 3) seen :2
Finished Best-First random walk after 60 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=30 )
Knowledge obtained : [(AND (NOT p2) p1), true]
False Knowledge obtained : [(F p2), (F (NOT (AND (NOT p2) p1))), (F (AND (NOT p2) (NOT p1)))]
Knowledge based reduction with 2 factoid took 216 ms. Reduced automaton from 5 states, 6 edges and 2 AP (stutter sensitive) to 5 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 267 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Stuttering acceptance computed with spot in 264 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Stuttering acceptance computed with spot in 260 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Product exploration explored 100000 steps with 7877 reset in 267 ms.
Product exploration explored 100000 steps with 7878 reset in 496 ms.
Applying partial POR strategy [true, true, false, false, false]
Stuttering acceptance computed with spot in 227 ms :[(NOT p2), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1)), (AND (NOT p2) (NOT p1))]
Support contains 5 out of 8 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 8/8 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 04:44:28] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:44:28] [INFO ] Invariant cache hit.
[2023-03-19 04:44:28] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 53 ms. Remains : 8/8 places, 7/7 transitions.
Support contains 5 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 7/7 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2023-03-19 04:44:28] [INFO ] Invariant cache hit.
[2023-03-19 04:44:28] [INFO ] Implicit Places using invariants in 27 ms returned []
[2023-03-19 04:44:28] [INFO ] Invariant cache hit.
[2023-03-19 04:44:28] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 65 ms to find 0 implicit places.
[2023-03-19 04:44:28] [INFO ] Invariant cache hit.
[2023-03-19 04:44:28] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 108 ms. Remains : 8/8 places, 7/7 transitions.
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 finished in 5696 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((!p0||X(X(G(p0))))))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 04:44:28] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 04:44:28] [INFO ] Implicit Places using invariants in 40 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 42 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 46 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 210 ms :[true, false, (NOT p0), (NOT p0), false]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=p0, acceptance={} source=1 dest: 3}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}], [{ cond=true, acceptance={} source=3 dest: 2}], [{ cond=true, acceptance={} source=4 dest: 1}]], initial=4, aps=[p0:(GEQ s6 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 30 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04 finished in 279 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 4 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 04:44:28] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 04:44:28] [INFO ] Implicit Places using invariants in 39 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 41 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 6/9 places, 7/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 6 /6 variables (removed 0) and now considering 7/7 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 46 ms. Remains : 6/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 122 ms :[true, (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(LT s3 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Entered a terminal (fully accepting) state of product in 5 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 finished in 187 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X(F(p0)))))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 04:44:28] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 04:44:28] [INFO ] Implicit Places using invariants in 34 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 35 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 39 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 204 ms :[(NOT p0), (NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 0}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=true, acceptance={} source=3 dest: 1}]], initial=2, aps=[p0:(OR (AND (GEQ s0 1) (GEQ s2 1) (GEQ s5 1)) (AND (LT s3 1) (LT s7 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 12025 reset in 260 ms.
Stack based approach found an accepted trace after 11 steps with 1 reset with depth 8 and stack size 8 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 finished in 526 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((!p0||F(p1)||X(F(p2)))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2023-03-19 04:44:29] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 04:44:29] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-19 04:44:29] [INFO ] Invariant cache hit.
[2023-03-19 04:44:29] [INFO ] Implicit Places using invariants and state equation in 39 ms returned []
Implicit Place search using SMT with State Equation took 73 ms to find 0 implicit places.
[2023-03-19 04:44:29] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:44:29] [INFO ] Invariant cache hit.
[2023-03-19 04:44:29] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 126 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 275 ms :[(AND p0 (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p1) (NOT p2)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(LT s3 1), p1:(GEQ s2 1), p2:(OR (LT s3 1) (LT s5 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 23771 reset in 122 ms.
Stack based approach found an accepted trace after 74 steps with 21 reset with depth 7 and stack size 7 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 finished in 555 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0)&&X(!p1)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-19 04:44:29] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-19 04:44:29] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-19 04:44:29] [INFO ] Invariant cache hit.
[2023-03-19 04:44:29] [INFO ] Implicit Places using invariants and state equation in 38 ms returned []
Implicit Place search using SMT with State Equation took 71 ms to find 0 implicit places.
[2023-03-19 04:44:29] [INFO ] Invariant cache hit.
[2023-03-19 04:44:29] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 113 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 173 ms :[(OR (NOT p0) p1), p1, (NOT p0), true]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}, { cond=(NOT p0), acceptance={} source=0 dest: 2}], [{ cond=p1, acceptance={} source=1 dest: 3}], [{ cond=(NOT p0), acceptance={} source=2 dest: 2}], [{ cond=true, acceptance={} source=3 dest: 3}]], initial=0, aps=[p0:(AND (GEQ s4 1) (GEQ s5 1)), p1:(OR (LT s3 1) (LT s5 1))], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08 finished in 318 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0) U (G((G(!p1)||F(p0)))||((G(!p1)||F(p0))&&X(G(!p0))))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants in 30 ms returned []
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 68 ms to find 0 implicit places.
[2023-03-19 04:44:30] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 111 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 102 ms :[(NOT p0), (AND (NOT p0) p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=(AND (NOT p0) p1), acceptance={} source=1 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=1 dest: 1}]], initial=1, aps=[p0:(LT s3 1), p1:(AND (GEQ s4 1) (GEQ s5 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Initial state of product has no viable successors after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09 TRUE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09 finished in 245 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2023-03-19 04:44:30] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 67 ms to find 0 implicit places.
[2023-03-19 04:44:30] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 8/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 120 ms. Remains : 8/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 48 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (GEQ s0 1) (GEQ s2 1) (GEQ s5 1) (GEQ s6 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Product exploration explored 100000 steps with 7897 reset in 143 ms.
Stack based approach found an accepted trace after 103 steps with 11 reset with depth 3 and stack size 3 in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10 finished in 330 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(!p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 1 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 5 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
// Phase 1: matrix 5 rows 4 cols
[2023-03-19 04:44:30] [INFO ] Computed 2 place invariants in 0 ms
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants in 29 ms returned [2]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 30 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 3/9 places, 5/8 transitions.
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 3 transition count 4
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 3 transition count 3
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 2 transition count 3
Applied a total of 3 rules in 4 ms. Remains 2 /3 variables (removed 1) and now considering 3/5 (removed 2) transitions.
// Phase 1: matrix 3 rows 2 cols
[2023-03-19 04:44:30] [INFO ] Computed 1 place invariants in 0 ms
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants in 22 ms returned []
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants and state equation in 26 ms returned []
Implicit Place search using SMT with State Equation took 52 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 2/9 places, 3/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 92 ms. Remains : 2/9 places, 3/8 transitions.
Stuttering acceptance computed with spot in 101 ms :[p0, p0]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=p0, acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(LT s1 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 finished in 216 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 3 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2023-03-19 04:44:30] [INFO ] Computed 4 place invariants in 0 ms
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants in 38 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 39 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 6 transition count 6
Applied a total of 2 rules in 3 ms. Remains 6 /7 variables (removed 1) and now considering 6/7 (removed 1) transitions.
// Phase 1: matrix 6 rows 6 cols
[2023-03-19 04:44:30] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants in 27 ms returned []
[2023-03-19 04:44:30] [INFO ] Invariant cache hit.
[2023-03-19 04:44:30] [INFO ] Implicit Places using invariants and state equation in 32 ms returned []
Implicit Place search using SMT with State Equation took 62 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 6/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 109 ms. Remains : 6/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 51 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (GEQ s0 1) (GEQ s2 1) (GEQ s4 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration explored 100000 steps with 0 reset in 160 ms.
Stack based approach found an accepted trace after 2 steps with 0 reset with depth 3 and stack size 3 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 finished in 343 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((!p0||G(p1)||X(X(F(p2))))))'
[2023-03-19 04:44:31] [INFO ] Flatten gal took : 6 ms
[2023-03-19 04:44:31] [INFO ] Export to MCC of 1 properties in file /home/mcc/execution/LTLFireability.sr.xml took 4 ms.
[2023-03-19 04:44:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 0 ms.
Total runtime 11474 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT8192DC4096
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
LTLFireability

FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679201072784

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/LTLFireability.xml
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 1 (type EXCL) for 0 SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
lola: result : false
lola: markings : 49155
lola: fired transitions : 57347
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03: LTL false LTL model checker


Time elapsed: 0 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT8192DC4096"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT8192DC4096, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647000148"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT8192DC4096.tgz
mv SmallOperatingSystem-PT-MT8192DC4096 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;