Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647000137.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT8192DC2048, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647000137
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 9.6K Feb 25 12:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 25 12:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 12:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 12:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 25 12:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 12:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 12:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679198081357

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT8192DC2048
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 03:54:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 03:54:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 03:54:45] [INFO ] Load time of PNML (sax parser for PT used): 43 ms
[2023-03-19 03:54:45] [INFO ] Transformed 9 places.
[2023-03-19 03:54:45] [INFO ] Transformed 8 transitions.
[2023-03-19 03:54:45] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 192 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 34 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 20 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 03:54:45] [INFO ] Computed 4 place invariants in 11 ms
[2023-03-19 03:54:45] [INFO ] Implicit Places using invariants in 234 ms returned []
[2023-03-19 03:54:45] [INFO ] Invariant cache hit.
[2023-03-19 03:54:45] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 352 ms to find 0 implicit places.
[2023-03-19 03:54:45] [INFO ] Invariant cache hit.
[2023-03-19 03:54:45] [INFO ] Dead Transitions using invariants and state equation in 52 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 428 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-03-19 03:54:45] [INFO ] Flatten gal took : 29 ms
[2023-03-19 03:54:46] [INFO ] Flatten gal took : 9 ms
[2023-03-19 03:54:46] [INFO ] Input system was already deterministic with 8 transitions.
Incomplete random walk after 10247 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=269 ) properties (out of 91) seen :15
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 91 ms. (steps per millisecond=11 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=12 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=25 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=27 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=27 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 76) seen :2
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=20 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=25 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=20 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=29 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=21 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=27 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 74) seen :0
Running SMT prover for 74 properties.
[2023-03-19 03:54:47] [INFO ] Invariant cache hit.
[2023-03-19 03:54:47] [INFO ] [Real]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 03:54:48] [INFO ] After 163ms SMT Verify possible using state equation in real domain returned unsat :25 sat :4 real:45
[2023-03-19 03:54:48] [INFO ] After 190ms SMT Verify possible using trap constraints in real domain returned unsat :25 sat :0 real:49
[2023-03-19 03:54:48] [INFO ] After 504ms SMT Verify possible using all constraints in real domain returned unsat :25 sat :0 real:49
[2023-03-19 03:54:48] [INFO ] [Nat]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 03:54:48] [INFO ] After 129ms SMT Verify possible using state equation in natural domain returned unsat :34 sat :40
[2023-03-19 03:54:48] [INFO ] After 344ms SMT Verify possible using trap constraints in natural domain returned unsat :34 sat :40
Attempting to minimize the solution found.
Minimization took 159 ms.
[2023-03-19 03:54:48] [INFO ] After 765ms SMT Verify possible using all constraints in natural domain returned unsat :34 sat :40
Fused 74 Parikh solutions to 40 different solutions.
Finished Parikh walk after 31141 steps, including 0 resets, run visited all 1 properties in 35 ms. (steps per millisecond=889 )
Parikh walk visited 40 properties in 8917 ms.
Successfully simplified 34 atomic propositions for a total of 16 simplifications.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 3 ms
[2023-03-19 03:54:57] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 3 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 9/9 places, 8/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 3 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/9 places, 7/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 0 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 0 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 5 place count 5 transition count 6
Applied a total of 5 rules in 6 ms. Remains 5 /9 variables (removed 4) and now considering 6/8 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 5/9 places, 6/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 0 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 6 transitions.
Finished random walk after 2049 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=683 )
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Applied a total of 0 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 4 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 4/9 places, 5/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 0 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 0 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 5 transitions.
Finished random walk after 4097 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=2048 )
FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 1 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 4/9 places, 5/8 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Input system was already deterministic with 5 transitions.
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 1 ms
[2023-03-19 03:54:57] [INFO ] Flatten gal took : 2 ms
[2023-03-19 03:54:57] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-19 03:54:57] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 1 ms.
Total runtime 13011 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT8192DC2048
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376

FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 11203936 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16098984 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 10 (type CNST) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-06
lola: result : false
lola: LAUNCH task # 1 (type EXCL) for 0 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 47 (type FNDP) for 12 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 48 (type EQUN) for 12 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SRCH) for 12 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 50 (type SRCH) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
lola: result : unknown
lola: markings : 3
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:716
lola: rewrite Frontend/Parser/formula_rewrite.k:688
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 47 (type FNDP) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
lola: result : true
lola: fired transitions : 5525
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 48 (type EQUN) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08 (obsolete)
lola: FINISHED task # 48 (type EQUN) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-05: SP ECTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08: CONJ 0 2 0 0 6 0 0 1
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SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-10: DISJ 0 3 0 0 3 0 0 0
SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-15: EGEF 0 1 0 0 1 0 0 0

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1 CTL EXCL 5/327 7/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01 1580610 m, 316122 m/sec, 7083965 t fired, .

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SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-05: SP ECTL 0 1 0 0 1 0 0 0
SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08: CONJ 0 2 0 0 6 0 0 1
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1 CTL EXCL 10/327 13/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01 3170575 m, 317993 m/sec, 14222533 t fired, .

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SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08: CONJ 0 2 0 0 6 0 0 1
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1 CTL EXCL 15/327 19/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01 4639203 m, 293725 m/sec, 20817806 t fired, .

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SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-08: CONJ 0 2 0 0 6 0 0 1
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1 CTL EXCL 20/327 25/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01 6149329 m, 302025 m/sec, 27600917 t fired, .

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1 CTL EXCL 25/327 31/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-01 7715883 m, 313310 m/sec, 34639881 t fired, .

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lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-10
lola: result : false
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 396 sec
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lola: FINISHED task # 33 (type EXCL) for SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-10
lola: result : false
lola: time used : 0.000000
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29 EXEU EXCL 10/446 19/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-10 5770776 m, 566629 m/sec, 14359600 t fired, .

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29 EXEU EXCL 15/446 28/32 SmallOperatingSystem-PT-MT8192DC2048-CTLCardinality-10 8593658 m, 564576 m/sec, 21396192 t fired, .

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lola: caught signal Terminated - aborting LoLA

FINAL RESULTS
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