About the Execution of LoLa+red for SmallOperatingSystem-PT-MT1024DC0512
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2310.371 | 72895.00 | 244240.00 | 644.00 | TTTFTTFFTFTTFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r455-smll-167912646900102.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT1024DC0512, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912646900102
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.2K Feb 25 12:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 25 12:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 12:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 12:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 17:08 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 17:08 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:08 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 17:08 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 12:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Feb 25 12:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Feb 25 12:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 12:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 17:08 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:08 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1679192683044
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT1024DC0512
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 02:24:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 02:24:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 02:24:47] [INFO ] Load time of PNML (sax parser for PT used): 44 ms
[2023-03-19 02:24:47] [INFO ] Transformed 9 places.
[2023-03-19 02:24:47] [INFO ] Transformed 8 transitions.
[2023-03-19 02:24:47] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 192 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 39 ms.
Working with output stream class java.io.PrintStream
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10265 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=233 ) properties (out of 15) seen :9
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 248 ms. (steps per millisecond=40 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 130 ms. (steps per millisecond=76 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 8 rows 9 cols
[2023-03-19 02:24:47] [INFO ] Computed 4 place invariants in 9 ms
[2023-03-19 02:24:48] [INFO ] [Real]Absence check using 4 positive place invariants in 2 ms returned sat
[2023-03-19 02:24:48] [INFO ] After 22ms SMT Verify possible using state equation in real domain returned unsat :3 sat :1 real:2
[2023-03-19 02:24:48] [INFO ] After 31ms SMT Verify possible using trap constraints in real domain returned unsat :3 sat :1 real:2
Attempting to minimize the solution found.
Minimization took 14 ms.
[2023-03-19 02:24:48] [INFO ] After 289ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :1 real:2
[2023-03-19 02:24:48] [INFO ] [Nat]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-19 02:24:48] [INFO ] After 16ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :1
[2023-03-19 02:24:48] [INFO ] After 25ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :1
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-19 02:24:48] [INFO ] After 89ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :1
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 1 different solutions.
Finished Parikh walk after 2723 steps, including 0 resets, run visited all 1 properties in 24 ms. (steps per millisecond=113 )
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 26 ms.
All properties solved without resorting to model-checking.
Total runtime 1578 ms.
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT1024DC0512
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679192755939
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 34 (type CNST) for 33 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 34 (type CNST) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type EXCL) for 24 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 54 (type FNDP) for 24 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 24 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SRCH) for 24 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
lola: FINISHED task # 55 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 54 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 57 (type SRCH) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 58 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 121 (type EXCL) for 42 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 91 (type FNDP) for 3 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type FNDP) for 12 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type FNDP) for 6 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02
lola: time limit : 32000000 sec
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lola: FINISHED task # 94 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04
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lola: LAUNCH task # 97 (type FNDP) for 15 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
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lola: FINISHED task # 121 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14
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lola: LAUNCH task # 89 (type EXCL) for 9 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03
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lola: FINISHED task # 89 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03
lola: result : true
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lola: LAUNCH task # 138 (type EXCL) for 27 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09
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lola: FINISHED task # 138 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09
lola: result : true
lola: markings : 888
lola: fired transitions : 887
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lola: FINISHED task # 118 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07
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lola: LAUNCH task # 130 (type EXCL) for 0 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 130 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00
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lola: LAUNCH task # 111 (type EXCL) for 45 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15
lola: time limit : 450 sec
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lola: FINISHED task # 111 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15
lola: result : true
lola: markings : 275
lola: fired transitions : 274
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lola: memory pages used : 1
lola: LAUNCH task # 83 (type EXCL) for 39 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13
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lola: FINISHED task # 83 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13
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lola: FINISHED task # 113 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06
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lola: LAUNCH task # 109 (type EXCL) for 36 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12
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lola: FINISHED task # 109 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12
lola: result : true
lola: markings : 362342
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lola: LAUNCH task # 78 (type EXCL) for 30 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10
lola: time limit : 899 sec
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lola: FINISHED task # 78 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10
lola: result : true
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lola: LAUNCH task # 145 (type EXCL) for 15 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
lola: time limit : 1198 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 5/895 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 1750772 t fired, 2 attempts, .
96 EF FNDP 5/895 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 1789227 t fired, 2 attempts, .
97 EF FNDP 5/895 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 1980636 t fired, 2 attempts, .
145 EF EXCL 0/1198 2/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 396150 m, 79230 m/sec, 619634 t fired, .
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SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 10/895 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 3369160 t fired, 4 attempts, .
96 EF FNDP 10/895 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 3535865 t fired, 4 attempts, .
97 EF FNDP 10/895 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 3824432 t fired, 4 attempts, .
145 EF EXCL 5/1198 12/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 3013693 m, 523508 m/sec, 5306356 t fired, .
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SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 15/890 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 4801573 t fired, 5 attempts, .
96 EF FNDP 15/890 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 5213737 t fired, 6 attempts, .
97 EF FNDP 15/890 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 5499066 t fired, 6 attempts, .
145 EF EXCL 10/1198 21/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 5485831 m, 494427 m/sec, 10236091 t fired, .
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SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 2 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 20/885 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 6202115 t fired, 7 attempts, .
96 EF FNDP 20/885 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 6808843 t fired, 7 attempts, .
97 EF FNDP 20/885 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 7199096 t fired, 8 attempts, .
145 EF EXCL 15/1198 31/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 7932179 m, 489269 m/sec, 15115635 t fired, .
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lola: CANCELED task # 145 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 25/880 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 7710760 t fired, 8 attempts, .
96 EF FNDP 25/880 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 8397328 t fired, 9 attempts, .
97 EF FNDP 25/880 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 8949159 t fired, 9 attempts, .
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lola: time limit : 1787 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 30/875 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 9183509 t fired, 10 attempts, .
96 EF FNDP 30/875 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 10036619 t fired, 11 attempts, .
97 EF FNDP 30/875 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 10553322 t fired, 11 attempts, .
133 EF EXCL 5/1787 11/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 2706481 m, 541296 m/sec, 4237632 t fired, .
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SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
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91 EF FNDP 35/870 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 10664975 t fired, 11 attempts, .
96 EF FNDP 35/870 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 11666924 t fired, 12 attempts, .
97 EF FNDP 35/870 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 12145570 t fired, 13 attempts, .
133 EF EXCL 10/1787 20/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 5171246 m, 492953 m/sec, 8015735 t fired, .
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SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 2 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 40/865 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 12029002 t fired, 13 attempts, .
96 EF FNDP 40/865 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 13266921 t fired, 14 attempts, .
97 EF FNDP 40/865 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 13709749 t fired, 14 attempts, .
133 EF EXCL 15/1787 30/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 7726481 m, 511047 m/sec, 11788671 t fired, .
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SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 45/860 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 13574039 t fired, 14 attempts, .
96 EF FNDP 45/860 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 14838178 t fired, 15 attempts, .
97 EF FNDP 45/860 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 15275806 t fired, 16 attempts, .
Time elapsed: 45 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 115 (type EXCL) for 3 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
lola: time limit : 3555 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 50/855 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 15058432 t fired, 16 attempts, .
96 EF FNDP 50/855 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 16382789 t fired, 17 attempts, .
97 EF FNDP 50/855 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 16786774 t fired, 17 attempts, .
115 EF EXCL 5/3555 11/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 2859221 m, 571844 m/sec, 4453427 t fired, .
Time elapsed: 50 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 55/850 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 16522648 t fired, 17 attempts, .
96 EF FNDP 55/850 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 18027196 t fired, 19 attempts, .
97 EF FNDP 55/850 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 18275330 t fired, 19 attempts, .
115 EF EXCL 10/3555 21/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 5484814 m, 525118 m/sec, 8814072 t fired, .
Time elapsed: 55 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 3 2 0 1 0 0 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 60/845 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 17980589 t fired, 18 attempts, .
96 EF FNDP 60/845 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 19667233 t fired, 20 attempts, .
97 EF FNDP 60/845 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 19765958 t fired, 20 attempts, .
115 EF EXCL 15/3555 31/32 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 8224160 m, 547869 m/sec, 13016801 t fired, .
Time elapsed: 60 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 115 (type EXCL) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG 0 3 1 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG 0 3 1 0 1 0 1 0
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
91 EF FNDP 65/840 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 19790599 t fired, 20 attempts, .
96 EF FNDP 65/840 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 21520606 t fired, 22 attempts, .
97 EF FNDP 65/840 0/5 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 21478370 t fired, 22 attempts, .
Time elapsed: 65 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 102 (type EQUN) for 6 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-102.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 102 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 96 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 104 (type EQUN) for 3 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 114 (type SRCH) for 3 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 21683217
lola: tried executions : 23
lola: time used : 66.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-104.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 104 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 91 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 114 (type SRCH) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 134 (type EQUN) for 15 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 144 (type SRCH) for 15 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SRCH) for 15 SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 20160724
lola: tried executions : 22
lola: time used : 66.000000
lola: memory pages used : 0
lola: FINISHED task # 147 (type SRCH) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
lola: result : unknown
lola: markings : 6
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-134.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 134 (type EQUN) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 97 (type FNDP) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 144 (type SRCH) for SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-00: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-02: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-03: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-04: EF true findpath
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-06: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-07: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-08: AG true state equation
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-09: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-10: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-11: INITIAL true preprocessing
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-12: AG false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-13: EF true tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT1024DC0512-ReachabilityCardinality-15: AG false tandem / relaxed
Time elapsed: 66 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT1024DC0512"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT1024DC0512, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912646900102"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT1024DC0512.tgz
mv SmallOperatingSystem-PT-MT1024DC0512 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;