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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912646800030
Last Updated
May 14, 2023

About the Execution of LoLa+red for SmallOperatingSystem-PT-MT0064DC0016

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1178.819 44618.00 131118.00 616.90 TTTTFTTTTTFTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912646800030.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SmallOperatingSystem-PT-MT0064DC0016, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912646800030
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.1K Feb 25 12:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 12:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 12:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 12:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 12:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 25 12:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 12:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 12:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.2K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679183267070

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT0064DC0016
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-18 23:47:49] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-18 23:47:49] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 23:47:49] [INFO ] Load time of PNML (sax parser for PT used): 29 ms
[2023-03-18 23:47:49] [INFO ] Transformed 9 places.
[2023-03-18 23:47:49] [INFO ] Transformed 8 transitions.
[2023-03-18 23:47:49] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 131 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 28 ms.
Working with output stream class java.io.PrintStream
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10014 steps, including 2 resets, run finished after 150 ms. (steps per millisecond=66 ) properties (out of 14) seen :4
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 361 ms. (steps per millisecond=27 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 274 ms. (steps per millisecond=36 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 129 ms. (steps per millisecond=77 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 196 ms. (steps per millisecond=51 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 208 ms. (steps per millisecond=48 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 197 ms. (steps per millisecond=50 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 8 rows 9 cols
[2023-03-18 23:47:51] [INFO ] Computed 4 place invariants in 4 ms
[2023-03-18 23:47:52] [INFO ] [Real]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-18 23:47:52] [INFO ] After 256ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0 real:3
[2023-03-18 23:47:52] [INFO ] [Nat]Absence check using 4 positive place invariants in 3 ms returned sat
[2023-03-18 23:47:52] [INFO ] After 62ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :0
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 2550 ms.
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT0064DC0016
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679183311688

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 25 (type CNST) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type EXCL) for 18 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 0 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 0 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 0 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06
lola: result : false
lola: markings : 257
lola: fired transitions : 384
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 73 (type EXCL) for 9 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 28 (type CNST) for 27 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 28 (type CNST) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 50 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 49 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 66 (type SRCH) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 59 (type FNDP) for 12 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 12 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type FNDP) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 49 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 77746
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 60 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 59 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 102 (type FNDP) for 15 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 15 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 59 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 18236
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 113 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 102 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 101 (type FNDP) for 30 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type EQUN) for 30 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 175712
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 132
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 119 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 134 (type FNDP) for 45 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 45 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 119 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 135 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 134 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 86 (type FNDP) for 33 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 33 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 134 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 7809
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 86 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 1196
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 87 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 123 (type FNDP) for 36 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type EQUN) for 36 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-126.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 126 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 123 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 54 (type FNDP) for 6 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 6 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 1618
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
lola: FINISHED task # 54 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
lola: result : true
lola: fired transitions : 64
lola: tried executions : 1
lola: time used : 0.000000
sara: lola: place or transition ordering is non-deterministic
memory pages used : 0
lola: CANCELED task # 55 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 52 (type FNDP) for 3 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 3 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 53 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 52 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 85 (type FNDP) for 39 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type EQUN) for 39 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 8923
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 85 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 773
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 92 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 108 (type FNDP) for 42 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type EQUN) for 42 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.

lola: FINISHED task # 92 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 121 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 108 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 103 (type EQUN) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 105 (type SRCH) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 7909
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 2 3 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 5/1800 6/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 1530573 m, 306114 m/sec, 4605866 t fired, .
96 EF FNDP 5/1799 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 4694374 t fired, 5 attempts, .
103 EF STEQ 4/1199 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
105 EF SRCH 4/1199 5/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 1343709 m, 268741 m/sec, 4220839 t fired, .

Time elapsed: 5 secs. Pages in use: 11
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 105 (type SRCH) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG 0 4 1 0 1 0 0 0
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 2 2 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 EF EXCL 10/1800 11/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 2853416 m, 264568 m/sec, 11239020 t fired, .
96 EF FNDP 10/1795 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 10498665 t fired, 11 attempts, .
103 EF STEQ 9/1195 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).

Time elapsed: 10 secs. Pages in use: 12
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 57 (type FNDP) for 9 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: result : false
lola: markings : 2901768
lola: fired transitions : 15387277
lola: time used : 13.000000
lola: memory pages used : 11
lola: CANCELED task # 57 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 106 (type EXCL) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 3587 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 107 (type SRCH) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 1546470
lola: tried executions : 3
lola: time used : 3.000000
lola: memory pages used : 0
lola: FINISHED task # 107 (type SRCH) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: result : unknown
lola: markings : 6
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
96 EF FNDP 15/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 13524222 t fired, 14 attempts, .
103 EF STEQ 14/3599 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
106 EF EXCL 2/3587 3/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 813645 m, 162729 m/sec, 2049684 t fired, .

Time elapsed: 15 secs. Pages in use: 12
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
96 EF FNDP 20/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 19078049 t fired, 20 attempts, .
103 EF STEQ 19/3599 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
106 EF EXCL 7/3587 10/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 2598891 m, 357049 m/sec, 6921690 t fired, .

Time elapsed: 20 secs. Pages in use: 12
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
96 EF FNDP 25/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 24960735 t fired, 25 attempts, .
103 EF STEQ 24/3599 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
106 EF EXCL 12/3587 14/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 3807149 m, 241651 m/sec, 12725258 t fired, .

Time elapsed: 25 secs. Pages in use: 14
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
96 EF FNDP 30/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 30746569 t fired, 31 attempts, .
103 EF STEQ 29/3599 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
106 EF EXCL 17/3587 15/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 3984898 m, 35549 m/sec, 18579936 t fired, .

Time elapsed: 30 secs. Pages in use: 15
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
96 EF FNDP 35/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 36692910 t fired, 37 attempts, .
103 EF STEQ 34/3599 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
106 EF EXCL 22/3587 15/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 4050512 m, 13122 m/sec, 23653314 t fired, .

Time elapsed: 35 secs. Pages in use: 15
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 106 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: result : false
lola: markings : 4075348
lola: fired transitions : 26215818
lola: time used : 24.000000
lola: memory pages used : 15
lola: CANCELED task # 96 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 103 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false state equation


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT0064DC0016"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SmallOperatingSystem-PT-MT0064DC0016, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912646800030"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT0064DC0016.tgz
mv SmallOperatingSystem-PT-MT0064DC0016 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;