About the Execution of LoLA for StigmergyElection-PT-11a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 9543.771 | 617742.00 | 758217.00 | 1914.30 | TTF?TTTTFFFTTTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r454-smll-167912646800698.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is StigmergyElection-PT-11a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912646800698
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 154M
-rw-r--r-- 1 mcc users 7.6K Feb 26 17:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 26 17:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 26 16:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 16:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 18:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Feb 26 18:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 17:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 17:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 153M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-00
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-01
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-02
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-03
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-04
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-05
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-06
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-07
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-08
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-09
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-10
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-11
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-12
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-13
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-14
FORMULA_NAME StigmergyElection-PT-11a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679490570101
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-11a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT StigmergyElection-PT-11a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA StigmergyElection-PT-11a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-11a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679491187843
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-06: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-13: EF 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-15: CONJ 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 91 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 2.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-06: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-13: EF 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-15: CONJ 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 96 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-06: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-11a-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
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lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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31 CTL EXCL 4/198 1/32 StigmergyElection-PT-11a-CTLFireability-10 38779 m, 7755 m/sec, 257694 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 9/224 1/32 StigmergyElection-PT-11a-CTLFireability-10 88590 m, 9962 m/sec, 618812 t fired, .
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 55 (type FNDP) for 45 StigmergyElection-PT-11a-CTLFireability-15
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lola: LAUNCH task # 56 (type EQUN) for 45 StigmergyElection-PT-11a-CTLFireability-15
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type SRCH) for 45 StigmergyElection-PT-11a-CTLFireability-15
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lola: FINISHED task # 55 (type FNDP) for StigmergyElection-PT-11a-CTLFireability-15
lola: result : true
lola: fired transitions : 10
lola: tried executions : 1
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lola: CANCELED task # 56 (type EQUN) for StigmergyElection-PT-11a-CTLFireability-15 (obsolete)
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 59 (type SRCH) for StigmergyElection-PT-11a-CTLFireability-15
lola: result : unknown
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lola: FINISHED task # 52 (type FNDP) for StigmergyElection-PT-11a-CTLFireability-13
lola: result : true
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lola: CANCELED task # 53 (type EQUN) for StigmergyElection-PT-11a-CTLFireability-13 (obsolete)
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lola: result : unknown
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sara: try reading problem file /home/mcc/execution/CTLFireability-56.sara.
sara: try reading problem file /home/mcc/execution/CTLFireability-53.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 14/306 1/32 StigmergyElection-PT-11a-CTLFireability-10 138159 m, 9913 m/sec, 990072 t fired, .
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lola: FINISHED task # 31 (type EXCL) for StigmergyElection-PT-11a-CTLFireability-10
lola: result : false
lola: markings : 177147
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lola: LAUNCH task # 37 (type EXCL) for 36 StigmergyElection-PT-11a-CTLFireability-12
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sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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lola: FINISHED task # 56 (type EQUN) for StigmergyElection-PT-11a-CTLFireability-15
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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37 CTL EXCL 7/335 1/32 StigmergyElection-PT-11a-CTLFireability-12 73628 m, 11233 m/sec, 501086 t fired, .
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lola: FINISHED task # 37 (type EXCL) for StigmergyElection-PT-11a-CTLFireability-12
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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28 CTL EXCL 0/371 1/32 StigmergyElection-PT-11a-CTLFireability-09 96 m, 19 m/sec, 441 t fired, .
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lola: FINISHED task # 28 (type EXCL) for StigmergyElection-PT-11a-CTLFireability-09
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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sara: place or transition ordering is non-deterministic
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StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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25 CTL EXCL 15/418 1/32 StigmergyElection-PT-11a-CTLFireability-08 78413 m, 5259 m/sec, 1319821 t fired, .
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lola: FINISHED task # 53 (type EQUN) for StigmergyElection-PT-11a-CTLFireability-13
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 20/418 1/32 StigmergyElection-PT-11a-CTLFireability-08 112004 m, 6718 m/sec, 1849860 t fired, .
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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StigmergyElection-PT-11a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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25 CTL EXCL 25/418 1/32 StigmergyElection-PT-11a-CTLFireability-08 157467 m, 9092 m/sec, 2339106 t fired, .
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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25 CTL EXCL 30/418 1/32 StigmergyElection-PT-11a-CTLFireability-08 170589 m, 2624 m/sec, 2882280 t fired, .
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lola: FINISHED task # 25 (type EXCL) for StigmergyElection-PT-11a-CTLFireability-08
lola: result : false
lola: markings : 177156
lola: fired transitions : 3124767
lola: time used : 32.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 StigmergyElection-PT-11a-CTLFireability-07
lola: time limit : 473 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-08: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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22 CTL EXCL 3/473 1/32 StigmergyElection-PT-11a-CTLFireability-07 5466 m, 1093 m/sec, 62040 t fired, .
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
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StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
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StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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lola: FINISHED task # 22 (type EXCL) for StigmergyElection-PT-11a-CTLFireability-07
lola: result : true
lola: markings : 177148
lola: fired transitions : 4340098
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StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
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StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
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StigmergyElection-PT-11a-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3004 1/32 StigmergyElection-PT-11a-CTLFireability-00 62169 m, 8145 m/sec, 424963 t fired, .
Time elapsed: 606 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-01: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-02: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-04: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-06: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-07: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-08: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/3004 1/32 StigmergyElection-PT-11a-CTLFireability-00 114153 m, 10396 m/sec, 813611 t fired, .
Time elapsed: 611 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-01: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-02: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-04: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-06: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-07: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-08: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-11a-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
StigmergyElection-PT-11a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/3004 1/32 StigmergyElection-PT-11a-CTLFireability-00 165736 m, 10316 m/sec, 1204483 t fired, .
Time elapsed: 616 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 1 (type EXCL) for StigmergyElection-PT-11a-CTLFireability-00
lola: result : true
lola: markings : 177136
lola: fired transitions : 1298947
lola: time used : 21.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-11a-CTLFireability-00: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-01: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-02: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-03: CTL unknown AGGR
StigmergyElection-PT-11a-CTLFireability-04: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-05: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-06: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-07: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-08: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-09: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-11: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-12: CTL true CTL model checker
StigmergyElection-PT-11a-CTLFireability-13: EF true findpath
StigmergyElection-PT-11a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-11a-CTLFireability-15: CONJ false findpath
Time elapsed: 617 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-11a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is StigmergyElection-PT-11a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912646800698"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-11a.tgz
mv StigmergyElection-PT-11a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;