fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r454-smll-167912646700668
Last Updated
May 14, 2023

About the Execution of LoLA for StigmergyElection-PT-09a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
711.619 13681.00 17220.00 103.00 FFFTTFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r454-smll-167912646700668.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is StigmergyElection-PT-09a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912646700668
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 17M
-rw-r--r-- 1 mcc users 8.1K Feb 26 16:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 16:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 16:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 16:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.5K Feb 26 16:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 61K Feb 26 16:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 26 16:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 26 16:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 17M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-00
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-01
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-02
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-03
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-04
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-05
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-06
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-07
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-08
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-09
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-10
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-11
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-12
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-13
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-14
FORMULA_NAME StigmergyElection-PT-09a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679471371780

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-09a
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT StigmergyElection-PT-09a
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability

FORMULA StigmergyElection-PT-09a-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-09a-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679471385461

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:499
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:184
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-09a-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
StigmergyElection-PT-09a-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-09a-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-07: CONJ 0 0 0 0 2 0 0 0
StigmergyElection-PT-09a-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-09a-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-10: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-09a-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-09a-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
StigmergyElection-PT-09a-LTLFireability-14: LTL 0 0 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-15: CONJ 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 8 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 5 (type EXCL) for 0 StigmergyElection-PT-09a-LTLFireability-00
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:735
lola: rewrite Frontend/Parser/formula_rewrite.k:695
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 5 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-00
lola: result : true
lola: markings : 39357
lola: fired transitions : 354196
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 57 StigmergyElection-PT-09a-LTLFireability-15
lola: time limit : 188 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-15
lola: result : false
lola: markings : 22
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 StigmergyElection-PT-09a-LTLFireability-14
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-14
lola: result : false
lola: markings : 19725
lola: fired transitions : 118161
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 StigmergyElection-PT-09a-LTLFireability-11
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-11
lola: result : false
lola: markings : 19719
lola: fired transitions : 118155
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 35 StigmergyElection-PT-09a-LTLFireability-09
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-09
lola: result : true
lola: markings : 19684
lola: fired transitions : 118099
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 StigmergyElection-PT-09a-LTLFireability-08
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-08
lola: result : false
lola: markings : 21
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 25 StigmergyElection-PT-09a-LTLFireability-07
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-07
lola: result : true
lola: markings : 19684
lola: fired transitions : 118099
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 25 StigmergyElection-PT-09a-LTLFireability-07
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-07
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 StigmergyElection-PT-09a-LTLFireability-06
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-06
lola: result : false
lola: markings : 28
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 StigmergyElection-PT-09a-LTLFireability-05
lola: time limit : 358 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-05
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 StigmergyElection-PT-09a-LTLFireability-04
lola: time limit : 398 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-09a-LTLFireability-05: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-06: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-07: CONJ false LTL model checker
StigmergyElection-PT-09a-LTLFireability-08: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-11: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-14: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-15: CONJ false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyElection-PT-09a-LTLFireability-00: CONJ 0 1 0 0 3 0 0 0
StigmergyElection-PT-09a-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
StigmergyElection-PT-09a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyElection-PT-09a-LTLFireability-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 LTL EXCL 1/398 1/32 StigmergyElection-PT-09a-LTLFireability-04 33401 m, 6680 m/sec, 277438 t fired, .

Time elapsed: 13 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 17 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-04
lola: result : true
lola: markings : 39367
lola: fired transitions : 354296
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 StigmergyElection-PT-09a-LTLFireability-03
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-03
lola: result : true
lola: markings : 19684
lola: fired transitions : 118099
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 StigmergyElection-PT-09a-LTLFireability-02
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-02
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 7 StigmergyElection-PT-09a-LTLFireability-01
lola: time limit : 597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-01
lola: result : false
lola: markings : 21
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 3 (type EXCL) for 0 StigmergyElection-PT-09a-LTLFireability-00
lola: time limit : 717 sec
lola: memory limit: 32 pages
lola: FINISHED task # 3 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-00
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 StigmergyElection-PT-09a-LTLFireability-12
lola: time limit : 896 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-12
lola: result : false
lola: markings : 18
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 StigmergyElection-PT-09a-LTLFireability-10
lola: time limit : 1195 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-10
lola: result : false
lola: markings : 12
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 StigmergyElection-PT-09a-LTLFireability-13
lola: time limit : 1793 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-13
lola: result : false
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 35 StigmergyElection-PT-09a-LTLFireability-09
lola: time limit : 3586 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for StigmergyElection-PT-09a-LTLFireability-09
lola: result : false
lola: markings : 10
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-09a-LTLFireability-00: CONJ false LTL model checker
StigmergyElection-PT-09a-LTLFireability-01: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-02: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-03: LTL true LTL model checker
StigmergyElection-PT-09a-LTLFireability-04: LTL true LTL model checker
StigmergyElection-PT-09a-LTLFireability-05: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-06: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-07: CONJ false LTL model checker
StigmergyElection-PT-09a-LTLFireability-08: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-09: CONJ false LTL model checker
StigmergyElection-PT-09a-LTLFireability-10: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-11: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-12: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-13: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-14: LTL false LTL model checker
StigmergyElection-PT-09a-LTLFireability-15: CONJ false LTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-09a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is StigmergyElection-PT-09a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912646700668"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-09a.tgz
mv StigmergyElection-PT-09a execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;