About the Execution of LoLA for StigmergyCommit-PT-10a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
11024.172 | 2380384.00 | 2509284.00 | 7268.20 | ??TTT?F???FFF?FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r454-smll-167912646500522.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is StigmergyCommit-PT-10a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912646500522
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 155M
-rw-r--r-- 1 mcc users 7.6K Feb 26 11:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 26 11:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 26 11:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 26 11:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 17:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 11:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 26 11:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 26 11:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 11:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 155M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-00
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-01
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-02
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-03
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-04
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-05
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-06
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-07
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-08
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-09
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-10
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-11
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-12
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-13
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-14
FORMULA_NAME StigmergyCommit-PT-10a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679415329471
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyCommit-PT-10a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT StigmergyCommit-PT-10a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA StigmergyCommit-PT-10a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-10a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679417709855
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-03: SP ACTL 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 0 0 0 0 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-03: SP ACTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 LTL EXCL 14/185 2/32 StigmergyCommit-PT-10a-CTLFireability-03 228886 m, 19745 m/sec, 3160977 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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61 LTL EXCL 19/185 3/32 StigmergyCommit-PT-10a-CTLFireability-03 326534 m, 19529 m/sec, 4702175 t fired, .
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lola: time used : 21.000000
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48 CTL EXCL 3/221 1/32 StigmergyCommit-PT-10a-CTLFireability-13 96160 m, 19232 m/sec, 512403 t fired, .
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48 CTL EXCL 8/221 2/32 StigmergyCommit-PT-10a-CTLFireability-13 249633 m, 30694 m/sec, 1444312 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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48 CTL EXCL 13/221 2/32 StigmergyCommit-PT-10a-CTLFireability-13 404659 m, 31005 m/sec, 2376767 t fired, .
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48 CTL EXCL 18/221 3/32 StigmergyCommit-PT-10a-CTLFireability-13 554796 m, 30027 m/sec, 3406959 t fired, .
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48 CTL EXCL 23/221 4/32 StigmergyCommit-PT-10a-CTLFireability-13 701458 m, 29332 m/sec, 4433367 t fired, .
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48 CTL EXCL 28/221 4/32 StigmergyCommit-PT-10a-CTLFireability-13 866684 m, 33045 m/sec, 5541187 t fired, .
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48 CTL EXCL 33/221 5/32 StigmergyCommit-PT-10a-CTLFireability-13 1036699 m, 34003 m/sec, 6736446 t fired, .
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48 CTL EXCL 38/221 6/32 StigmergyCommit-PT-10a-CTLFireability-13 1206193 m, 33898 m/sec, 7863783 t fired, .
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48 CTL EXCL 43/221 6/32 StigmergyCommit-PT-10a-CTLFireability-13 1371614 m, 33084 m/sec, 9032276 t fired, .
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48 CTL EXCL 48/221 7/32 StigmergyCommit-PT-10a-CTLFireability-13 1540145 m, 33706 m/sec, 10172210 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 179/221 24/32 StigmergyCommit-PT-10a-CTLFireability-13 5604821 m, 32012 m/sec, 40767475 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 184/221 25/32 StigmergyCommit-PT-10a-CTLFireability-13 5769392 m, 32914 m/sec, 42037039 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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48 CTL EXCL 189/221 26/32 StigmergyCommit-PT-10a-CTLFireability-13 5928168 m, 31755 m/sec, 43309743 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 199/221 27/32 StigmergyCommit-PT-10a-CTLFireability-13 6251834 m, 31984 m/sec, 45852935 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 204/221 28/32 StigmergyCommit-PT-10a-CTLFireability-13 6414393 m, 32511 m/sec, 47096778 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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48 CTL EXCL 219/221 30/32 StigmergyCommit-PT-10a-CTLFireability-13 6886581 m, 31093 m/sec, 50665344 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 1 0 0
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StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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48 CTL EXCL 10/221 2/5 StigmergyCommit-PT-10a-CTLFireability-13 285374 m, 31210 m/sec, 1656397 t fired, .
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48 CTL EXCL 15/221 2/5 StigmergyCommit-PT-10a-CTLFireability-13 434515 m, 29828 m/sec, 2562259 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-12: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-10a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 20/221 3/5 StigmergyCommit-PT-10a-CTLFireability-13 582539 m, 29604 m/sec, 3595926 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-03: SP ACTL true LTL model checker
StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
StigmergyCommit-PT-10a-CTLFireability-12: CTL false CTL model checker
StigmergyCommit-PT-10a-CTLFireability-14: CONJ false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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48 CTL EXCL 25/221 4/5 StigmergyCommit-PT-10a-CTLFireability-13 731101 m, 29712 m/sec, 4646718 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
StigmergyCommit-PT-10a-CTLFireability-12: CTL false CTL model checker
StigmergyCommit-PT-10a-CTLFireability-14: CONJ false state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-10a-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 30/221 4/5 StigmergyCommit-PT-10a-CTLFireability-13 903614 m, 34502 m/sec, 5796538 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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48 CTL EXCL 35/221 5/5 StigmergyCommit-PT-10a-CTLFireability-13 1073991 m, 34075 m/sec, 6994096 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-10a-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 42 (type EXCL) for 41 StigmergyCommit-PT-10a-CTLFireability-11
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lola: result : false
lola: markings : 69
lola: fired transitions : 137
lola: time used : 0.000000
lola: memory pages used : 1
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lola: result : false
lola: markings : 4560
lola: fired transitions : 4634
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 278 sec
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lola: result : false
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
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StigmergyCommit-PT-10a-CTLFireability-03: SP ACTL true LTL model checker
StigmergyCommit-PT-10a-CTLFireability-04: SP ACTL true LTL model checker
StigmergyCommit-PT-10a-CTLFireability-10: DISJ false DISJ
StigmergyCommit-PT-10a-CTLFireability-11: CTL false CTL model checker
StigmergyCommit-PT-10a-CTLFireability-12: CTL false CTL model checker
StigmergyCommit-PT-10a-CTLFireability-14: CONJ false state space /EXEF
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StigmergyCommit-PT-10a-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/306 1/32 StigmergyCommit-PT-10a-CTLFireability-09 160967 m, 32193 m/sec, 837827 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-14: CONJ false state space /EXEF
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 10/306 2/32 StigmergyCommit-PT-10a-CTLFireability-09 345931 m, 36992 m/sec, 1888447 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-11: CTL false CTL model checker
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32 CTL EXCL 15/306 3/32 StigmergyCommit-PT-10a-CTLFireability-09 548932 m, 40600 m/sec, 3119897 t fired, .
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32 CTL EXCL 20/306 4/32 StigmergyCommit-PT-10a-CTLFireability-09 742045 m, 38622 m/sec, 4411729 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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32 CTL EXCL 25/306 5/32 StigmergyCommit-PT-10a-CTLFireability-09 943095 m, 40210 m/sec, 5756337 t fired, .
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-11: CTL false CTL model checker
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-11: CTL false CTL model checker
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-10a-CTLFireability-07: CTL 0 0 0 0 1 1 0 0
StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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lola: result : false
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lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-15: EFAG 0 1 0 0 1 0 0 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
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StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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StigmergyCommit-PT-10a-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
StigmergyCommit-PT-10a-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-10a-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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lola: result : false
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-10a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is StigmergyCommit-PT-10a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912646500522"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-10a.tgz
mv StigmergyCommit-PT-10a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;