fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r454-smll-167912646500490
Last Updated
May 14, 2023

About the Execution of LoLA for StigmergyCommit-PT-08a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6237.319 1633868.00 1708996.00 4994.00 TTT??F???T?F?FF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r454-smll-167912646500490.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is StigmergyCommit-PT-08a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912646500490
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 18M
-rw-r--r-- 1 mcc users 6.7K Feb 26 11:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 26 11:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 11:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 26 11:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 11:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Feb 26 11:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 26 11:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 11:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 17M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-00
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-01
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-02
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-03
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-04
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-05
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-06
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-07
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-08
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-09
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-10
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-11
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-12
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-13
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-14
FORMULA_NAME StigmergyCommit-PT-08a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679389383724

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyCommit-PT-08a
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT StigmergyCommit-PT-08a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA StigmergyCommit-PT-08a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-08a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679391017592

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
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lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-08a-CTLFireability-00: EF 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-05: DISJ 0 0 0 0 3 0 0 0
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-09: CONJ 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-11: EG 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
StigmergyCommit-PT-08a-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 44 (type EXCL) for 39 StigmergyCommit-PT-08a-CTLFireability-09
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 44 (type EXCL) for StigmergyCommit-PT-08a-CTLFireability-09
lola: result : true
lola: markings : 512
lola: fired transitions : 2324
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lola: LAUNCH task # 64 (type EXCL) for 39 StigmergyCommit-PT-08a-CTLFireability-09
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lola: FINISHED task # 64 (type EXCL) for StigmergyCommit-PT-08a-CTLFireability-09
lola: result : false
lola: markings : 511
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lola: LAUNCH task # 50 (type EXCL) for 49 StigmergyCommit-PT-08a-CTLFireability-11
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lola: FINISHED task # 50 (type EXCL) for StigmergyCommit-PT-08a-CTLFireability-11
lola: result : false
lola: markings : 511
lola: fired transitions : 2295
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 56 (type EXCL) for 55 StigmergyCommit-PT-08a-CTLFireability-13
lola: time limit : 210 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 56 (type EXCL) for StigmergyCommit-PT-08a-CTLFireability-13
lola: result : false
lola: markings : 57
lola: fired transitions : 60
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lola: LAUNCH task # 59 (type EXCL) for 58 StigmergyCommit-PT-08a-CTLFireability-14
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type FNDP) for 15 StigmergyCommit-PT-08a-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 15 StigmergyCommit-PT-08a-CTLFireability-05
lola: time limit : 32000000 sec
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lola: LAUNCH task # 69 (type SRCH) for 15 StigmergyCommit-PT-08a-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 66 (type FNDP) for StigmergyCommit-PT-08a-CTLFireability-05
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for StigmergyCommit-PT-08a-CTLFireability-05 (obsolete)
lola: CANCELED task # 69 (type SRCH) for StigmergyCommit-PT-08a-CTLFireability-05 (obsolete)
lola: FINISHED task # 69 (type SRCH) for StigmergyCommit-PT-08a-CTLFireability-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 70 (type FNDP) for 15 StigmergyCommit-PT-08a-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 15 StigmergyCommit-PT-08a-CTLFireability-05
lola: time limit : 32000000 sec
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lola: LAUNCH task # 73 (type SRCH) for 15 StigmergyCommit-PT-08a-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type SRCH) for StigmergyCommit-PT-08a-CTLFireability-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/CTLFireability-67.sara.
sara: try reading problem file /home/mcc/execution/CTLFireability-71.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-08a-CTLFireability-00: EF 0 0 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-05: DISJ 0 2 2 0 6 0 0 2
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 CTL EXCL 1/238 1/32 StigmergyCommit-PT-08a-CTLFireability-14 34549 m, 6909 m/sec, 514099 t fired, .
70 EF FNDP 0/3580 0/5 StigmergyCommit-PT-08a-CTLFireability-05 23589 t fired, 1 attempts, .
71 EF STEQ 0/3580 0/5 StigmergyCommit-PT-08a-CTLFireability-05 sara is running.

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lola: FINISHED task # 71 (type EQUN) for StigmergyCommit-PT-08a-CTLFireability-05
lola: result : false
lola: CANCELED task # 70 (type FNDP) for StigmergyCommit-PT-08a-CTLFireability-05 (obsolete)
lola: FINISHED task # 70 (type FNDP) for StigmergyCommit-PT-08a-CTLFireability-05
lola: result : unknown
lola: fired transitions : 31355
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type FNDP) for 0 StigmergyCommit-PT-08a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 0 StigmergyCommit-PT-08a-CTLFireability-00
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lola: LAUNCH task # 77 (type SRCH) for 0 StigmergyCommit-PT-08a-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 77 (type SRCH) for StigmergyCommit-PT-08a-CTLFireability-00
lola: result : unknown
lola: time used : 0.000000
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lola: FINISHED task # 74 (type FNDP) for StigmergyCommit-PT-08a-CTLFireability-00
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 75 (type EQUN) for StigmergyCommit-PT-08a-CTLFireability-00 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-75.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 75 (type EQUN) for StigmergyCommit-PT-08a-CTLFireability-00
lola: result : true
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 67 (type EQUN) for StigmergyCommit-PT-08a-CTLFireability-05
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
StigmergyCommit-PT-08a-CTLFireability-05: DISJ false DISJ
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-08a-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 CTL EXCL 6/298 1/32 StigmergyCommit-PT-08a-CTLFireability-14 199693 m, 33028 m/sec, 2823195 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
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62 CTL EXCL 15/320 4/32 StigmergyCommit-PT-08a-CTLFireability-15 843216 m, 54399 m/sec, 6215013 t fired, .

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37 CTL EXCL 5/356 1/32 StigmergyCommit-PT-08a-CTLFireability-08 186199 m, 37239 m/sec, 1944998 t fired, .
47 CTL EXCL 4/2850 1/5 StigmergyCommit-PT-08a-CTLFireability-10 89024 m, -1083014 m/sec, 1023510 t fired, .

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37 CTL EXCL 10/356 2/32 StigmergyCommit-PT-08a-CTLFireability-08 390179 m, 40796 m/sec, 4176999 t fired, .
47 CTL EXCL 9/316 1/5 StigmergyCommit-PT-08a-CTLFireability-10 180077 m, 18210 m/sec, 2224062 t fired, .

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37 CTL EXCL 15/356 3/32 StigmergyCommit-PT-08a-CTLFireability-08 585715 m, 39107 m/sec, 6468864 t fired, .
47 CTL EXCL 14/316 2/5 StigmergyCommit-PT-08a-CTLFireability-10 287814 m, 21547 m/sec, 3629580 t fired, .

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37 CTL EXCL 21/356 4/32 StigmergyCommit-PT-08a-CTLFireability-08 798299 m, 42516 m/sec, 8870770 t fired, .
47 CTL EXCL 20/316 2/5 StigmergyCommit-PT-08a-CTLFireability-10 387215 m, 19880 m/sec, 4920176 t fired, .

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37 CTL EXCL 26/356 5/32 StigmergyCommit-PT-08a-CTLFireability-08 1029571 m, 46254 m/sec, 11396154 t fired, .
47 CTL EXCL 25/316 2/5 StigmergyCommit-PT-08a-CTLFireability-10 453026 m, 13162 m/sec, 5818167 t fired, .

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37 CTL EXCL 31/356 6/32 StigmergyCommit-PT-08a-CTLFireability-08 1258053 m, 45696 m/sec, 14054880 t fired, .
47 CTL EXCL 30/316 3/5 StigmergyCommit-PT-08a-CTLFireability-10 516012 m, 12597 m/sec, 6768886 t fired, .

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37 CTL EXCL 36/356 7/32 StigmergyCommit-PT-08a-CTLFireability-08 1482777 m, 44944 m/sec, 16777866 t fired, .
47 CTL EXCL 35/316 3/5 StigmergyCommit-PT-08a-CTLFireability-10 591462 m, 15090 m/sec, 7911524 t fired, .

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37 CTL EXCL 41/356 8/32 StigmergyCommit-PT-08a-CTLFireability-08 1696186 m, 42681 m/sec, 19604635 t fired, .
47 CTL EXCL 40/316 3/5 StigmergyCommit-PT-08a-CTLFireability-10 666905 m, 15088 m/sec, 9052687 t fired, .

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37 CTL EXCL 46/356 9/32 StigmergyCommit-PT-08a-CTLFireability-08 1911573 m, 43077 m/sec, 22417421 t fired, .
47 CTL EXCL 45/316 4/5 StigmergyCommit-PT-08a-CTLFireability-10 742405 m, 15100 m/sec, 10196751 t fired, .

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lola: LAUNCH task # 7 (type EXCL) for 6 StigmergyCommit-PT-08a-CTLFireability-02
lola: time limit : 994 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for StigmergyCommit-PT-08a-CTLFireability-02
lola: result : true
lola: markings : 124997
lola: fired transitions : 1204313
lola: time used : 3.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 StigmergyCommit-PT-08a-CTLFireability-01
lola: time limit : 1986 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
StigmergyCommit-PT-08a-CTLFireability-02: CTL true CTL model checker
StigmergyCommit-PT-08a-CTLFireability-05: DISJ false DISJ
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker
StigmergyCommit-PT-08a-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-08a-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 2/1986 1/32 StigmergyCommit-PT-08a-CTLFireability-01 182101 m, 36420 m/sec, 918441 t fired, .

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StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
StigmergyCommit-PT-08a-CTLFireability-02: CTL true CTL model checker
StigmergyCommit-PT-08a-CTLFireability-05: DISJ false DISJ
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker
StigmergyCommit-PT-08a-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-08a-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 7/1986 3/32 StigmergyCommit-PT-08a-CTLFireability-01 627870 m, 89153 m/sec, 3186653 t fired, .

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StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
StigmergyCommit-PT-08a-CTLFireability-02: CTL true CTL model checker
StigmergyCommit-PT-08a-CTLFireability-05: DISJ false DISJ
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker
StigmergyCommit-PT-08a-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 12/1986 5/32 StigmergyCommit-PT-08a-CTLFireability-01 1087002 m, 91826 m/sec, 5515245 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
StigmergyCommit-PT-08a-CTLFireability-02: CTL true CTL model checker
StigmergyCommit-PT-08a-CTLFireability-05: DISJ false DISJ
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker
StigmergyCommit-PT-08a-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-08a-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-08a-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
StigmergyCommit-PT-08a-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-08a-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 17/1986 7/32 StigmergyCommit-PT-08a-CTLFireability-01 1554106 m, 93420 m/sec, 7848086 t fired, .

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lola: result : true
lola: markings : 1835018
lola: fired transitions : 9240616
lola: time used : 20.000000
lola: memory pages used : 8
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-08a-CTLFireability-00: EF true findpath
StigmergyCommit-PT-08a-CTLFireability-01: CTL true CTL model checker
StigmergyCommit-PT-08a-CTLFireability-02: CTL true CTL model checker
StigmergyCommit-PT-08a-CTLFireability-03: CTL unknown AGGR
StigmergyCommit-PT-08a-CTLFireability-04: CTL unknown AGGR
StigmergyCommit-PT-08a-CTLFireability-05: DISJ false DISJ
StigmergyCommit-PT-08a-CTLFireability-06: DISJ unknown DISJ
StigmergyCommit-PT-08a-CTLFireability-07: CTL unknown AGGR
StigmergyCommit-PT-08a-CTLFireability-08: CTL unknown AGGR
StigmergyCommit-PT-08a-CTLFireability-09: CONJ true CONJ
StigmergyCommit-PT-08a-CTLFireability-10: CTL unknown AGGR
StigmergyCommit-PT-08a-CTLFireability-11: EG false state space / EG
StigmergyCommit-PT-08a-CTLFireability-12: CTL unknown AGGR
StigmergyCommit-PT-08a-CTLFireability-13: CTL false CTL model checker
StigmergyCommit-PT-08a-CTLFireability-14: CTL false CTL model checker
StigmergyCommit-PT-08a-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-08a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is StigmergyCommit-PT-08a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912646500490"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-08a.tgz
mv StigmergyCommit-PT-08a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;