About the Execution of LoLA for StigmergyCommit-PT-07a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1381.563 | 116335.00 | 115442.00 | 452.80 | TTFFTFT?TFFFT?FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r454-smll-167912646500476.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is StigmergyCommit-PT-07a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912646500476
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.9M
-rw-r--r-- 1 mcc users 5.4K Feb 26 11:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Feb 26 11:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 26 10:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 10:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:12 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:12 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:12 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 11:01 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Feb 26 11:01 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 11:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 11:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 5.4M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-00
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-01
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-02
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-03
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-04
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-05
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-06
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-07
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-08
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-09
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-10
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-11
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-12
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-13
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-14
FORMULA_NAME StigmergyCommit-PT-07a-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1679380210637
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyCommit-PT-07a
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT StigmergyCommit-PT-07a
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability
FORMULA StigmergyCommit-PT-07a-LTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-07a-LTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679380326972
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 33 (type EXCL) for 32 StigmergyCommit-PT-07a-LTLFireability-08
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-08
lola: result : true
lola: markings : 511
lola: fired transitions : 2048
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 50 StigmergyCommit-PT-07a-LTLFireability-14
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-14
lola: result : false
lola: markings : 52
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 StigmergyCommit-PT-07a-LTLFireability-09
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-09
lola: result : false
lola: markings : 12
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 StigmergyCommit-PT-07a-LTLFireability-06
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-06
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 StigmergyCommit-PT-07a-LTLFireability-04
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-04
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 24 (type EXCL) for 23 StigmergyCommit-PT-07a-LTLFireability-05
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-05
lola: result : false
lola: markings : 53
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 StigmergyCommit-PT-07a-LTLFireability-13
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 61 (type FNDP) for 13 StigmergyCommit-PT-07a-LTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 13 StigmergyCommit-PT-07a-LTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 13 StigmergyCommit-PT-07a-LTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 61 (type FNDP) for StigmergyCommit-PT-07a-LTLFireability-03
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 62 (type EQUN) for StigmergyCommit-PT-07a-LTLFireability-03 (obsolete)
lola: CANCELED task # 64 (type SRCH) for StigmergyCommit-PT-07a-LTLFireability-03 (obsolete)
lola: FINISHED task # 64 (type SRCH) for StigmergyCommit-PT-07a-LTLFireability-03
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type FNDP) for 10 StigmergyCommit-PT-07a-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 10 StigmergyCommit-PT-07a-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 69 (type SRCH) for 10 StigmergyCommit-PT-07a-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type FNDP) for StigmergyCommit-PT-07a-LTLFireability-02
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for StigmergyCommit-PT-07a-LTLFireability-02 (obsolete)
lola: CANCELED task # 69 (type SRCH) for StigmergyCommit-PT-07a-LTLFireability-02 (obsolete)
sara: try reading problem file /home/mcc/execution/LTLFireability-62.sara.
sara: try reading problem file /home/mcc/execution/LTLFireability-67.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 67 (type EQUN) for StigmergyCommit-PT-07a-LTLFireability-02
lola: result : true
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 62 (type EQUN) for StigmergyCommit-PT-07a-LTLFireability-03
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 3/399 3/32 StigmergyCommit-PT-07a-LTLFireability-13 332195 m, 66439 m/sec, 1937241 t fired, .
Time elapsed: 6 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 8/399 6/32 StigmergyCommit-PT-07a-LTLFireability-13 783063 m, 90173 m/sec, 4974390 t fired, .
Time elapsed: 11 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 13/399 9/32 StigmergyCommit-PT-07a-LTLFireability-13 1258287 m, 95044 m/sec, 8228864 t fired, .
Time elapsed: 16 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 18/399 12/32 StigmergyCommit-PT-07a-LTLFireability-13 1733277 m, 94998 m/sec, 11517777 t fired, .
Time elapsed: 21 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 23/399 15/32 StigmergyCommit-PT-07a-LTLFireability-13 2199258 m, 93196 m/sec, 14731977 t fired, .
Time elapsed: 26 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 28/399 18/32 StigmergyCommit-PT-07a-LTLFireability-13 2619162 m, 83980 m/sec, 17571222 t fired, .
Time elapsed: 31 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 33/399 21/32 StigmergyCommit-PT-07a-LTLFireability-13 3063168 m, 88801 m/sec, 20638218 t fired, .
Time elapsed: 36 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 38/399 24/32 StigmergyCommit-PT-07a-LTLFireability-13 3530204 m, 93407 m/sec, 23859506 t fired, .
Time elapsed: 41 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 43/399 26/32 StigmergyCommit-PT-07a-LTLFireability-13 3943065 m, 82572 m/sec, 26762688 t fired, .
Time elapsed: 46 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 48/399 29/32 StigmergyCommit-PT-07a-LTLFireability-13 4382928 m, 87972 m/sec, 29800875 t fired, .
Time elapsed: 51 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 LTL EXCL 53/399 32/32 StigmergyCommit-PT-07a-LTLFireability-13 4818394 m, 87093 m/sec, 32813744 t fired, .
Time elapsed: 56 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 48 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-07a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 58 (type EXCL) for 57 StigmergyCommit-PT-07a-LTLFireability-15
lola: time limit : 442 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-15
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 StigmergyCommit-PT-07a-LTLFireability-12
lola: time limit : 505 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-12
lola: result : true
lola: markings : 18
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 StigmergyCommit-PT-07a-LTLFireability-11
lola: time limit : 589 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-11
lola: result : false
lola: markings : 52
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 StigmergyCommit-PT-07a-LTLFireability-10
lola: time limit : 707 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-10
lola: result : false
lola: markings : 52
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 StigmergyCommit-PT-07a-LTLFireability-07
lola: time limit : 884 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 5/884 4/32 StigmergyCommit-PT-07a-LTLFireability-07 486488 m, 97297 m/sec, 2925708 t fired, .
Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 10/884 7/32 StigmergyCommit-PT-07a-LTLFireability-07 936383 m, 89979 m/sec, 6029716 t fired, .
Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 15/884 10/32 StigmergyCommit-PT-07a-LTLFireability-07 1413021 m, 95327 m/sec, 9323503 t fired, .
Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 20/884 13/32 StigmergyCommit-PT-07a-LTLFireability-07 1869698 m, 91335 m/sec, 12473880 t fired, .
Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 25/884 16/32 StigmergyCommit-PT-07a-LTLFireability-07 2313992 m, 88858 m/sec, 15494183 t fired, .
Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 30/884 18/32 StigmergyCommit-PT-07a-LTLFireability-07 2739182 m, 85038 m/sec, 18414798 t fired, .
Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 35/884 22/32 StigmergyCommit-PT-07a-LTLFireability-07 3210504 m, 94264 m/sec, 21668007 t fired, .
Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 40/884 24/32 StigmergyCommit-PT-07a-LTLFireability-07 3660301 m, 89959 m/sec, 24775847 t fired, .
Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 45/884 27/32 StigmergyCommit-PT-07a-LTLFireability-07 4058776 m, 79695 m/sec, 27528622 t fired, .
Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 LTL EXCL 50/884 30/32 StigmergyCommit-PT-07a-LTLFireability-07 4467916 m, 81828 m/sec, 30401628 t fired, .
Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 30 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
StigmergyCommit-PT-07a-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
StigmergyCommit-PT-07a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
StigmergyCommit-PT-07a-LTLFireability-07: LTL 0 0 0 0 1 0 1 0
StigmergyCommit-PT-07a-LTLFireability-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 8 (type EXCL) for 3 StigmergyCommit-PT-07a-LTLFireability-01
lola: time limit : 1161 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-01
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 StigmergyCommit-PT-07a-LTLFireability-01
lola: time limit : 1742 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-01
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 StigmergyCommit-PT-07a-LTLFireability-00
lola: time limit : 3484 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for StigmergyCommit-PT-07a-LTLFireability-00
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-07a-LTLFireability-00: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-01: CONJ true CONJ
StigmergyCommit-PT-07a-LTLFireability-02: AG false findpath
StigmergyCommit-PT-07a-LTLFireability-03: CONJ false findpath
StigmergyCommit-PT-07a-LTLFireability-04: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-05: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-06: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-07: LTL unknown AGGR
StigmergyCommit-PT-07a-LTLFireability-08: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-09: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-10: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-11: LTL false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-12: LTL true LTL model checker
StigmergyCommit-PT-07a-LTLFireability-13: LTL unknown AGGR
StigmergyCommit-PT-07a-LTLFireability-14: CONJ false LTL model checker
StigmergyCommit-PT-07a-LTLFireability-15: LTL true LTL model checker
Time elapsed: 116 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-07a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is StigmergyCommit-PT-07a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912646500476"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-07a.tgz
mv StigmergyCommit-PT-07a execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;