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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r454-smll-167912645900030
Last Updated
May 14, 2023

About the Execution of LoLA for SmallOperatingSystem-PT-MT0064DC0016

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1063.128 30377.00 94678.00 40.20 TTTTFTTTTTFTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r454-smll-167912645900030.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is SmallOperatingSystem-PT-MT0064DC0016, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r454-smll-167912645900030
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.1K Feb 25 12:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 12:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 12:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 12:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 12:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 25 12:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 12:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 12:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 8.2K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679179496944

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT0064DC0016
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT SmallOperatingSystem-PT-MT0064DC0016
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679179527321

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 25 (type CNST) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 28 (type CNST) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type EXCL) for 3 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 0 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 0 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 0 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01
lola: result : false
lola: markings : 3137
lola: fired transitions : 6384
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 74 (type EXCL) for 18 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 74 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06
lola: result : false
lola: markings : 257
lola: fired transitions : 384
lola: time used : 0.000000
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 33 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 79 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11
lola: result : true
lola: markings : 92
lola: fired transitions : 91
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 131 (type EXCL) for 39 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 131 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13
lola: result : true
lola: markings : 2491
lola: fired transitions : 3747
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 139 (type EXCL) for 42 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
lola: time limit : 360 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 139 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14
lola: result : false
lola: markings : 6947
lola: fired transitions : 15591
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 126 (type EXCL) for 6 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 126 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02
lola: result : true
lola: markings : 66
lola: fired transitions : 65
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 123 (type EXCL) for 36 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
lola: time limit : 450 sec
lola: memory limit: 32 pages

lola: FINISHED task # 55 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 49 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 57 (type SRCH) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 51 (type FNDP) for 15 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 15 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 95 (type FNDP) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 47193
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-52.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 52 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 51 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 98 (type FNDP) for 12 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type EQUN) for 12 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 51 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 160480
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-105.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 123 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12
lola: result : false
lola: markings : 106287
lola: fired transitions : 415409
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 121 (type EXCL) for 45 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: time limit : 720 sec
lola: memory limit: 32 pages

lola: FINISHED task # 105 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 98 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 81 (type FNDP) for 9 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type EQUN) for 9 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 98 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 12445
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-82.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 82 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 81 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 87 (type FNDP) for 30 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type EQUN) for 30 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 81 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 12378
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
lola: FINISHED task # 87 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 132
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 88 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 100 (type EQUN) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type SRCH) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 88 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10
lola: result : unknown
lola: CANCELED task # 102 (type SRCH) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 2 2 0 1 0 1 0
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 5/1200 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 5034292 t fired, 6 attempts, .
100 EF STEQ 5/1200 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
121 EF EXCL 5/1800 5/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15 1194475 m, 238895 m/sec, 5440813 t fired, .

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# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 117 (type FNDP) for 45 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 121 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: result : false
lola: markings : 1200546
lola: fired transitions : 5767766
lola: time used : 5.000000
lola: memory pages used : 5
lola: CANCELED task # 117 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 103 (type EXCL) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 3595 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 104 (type SRCH) for 21 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 117 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 142802
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 104 (type SRCH) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: result : unknown
lola: markings : 6
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 10/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 10310832 t fired, 11 attempts, .
100 EF STEQ 10/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
103 EF EXCL 5/3595 7/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 1642757 m, 328551 m/sec, 4219571 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 15/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 16289485 t fired, 17 attempts, .
100 EF STEQ 15/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
103 EF EXCL 10/3595 12/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 3241002 m, 319649 m/sec, 8684500 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 20/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 21846295 t fired, 22 attempts, .
100 EF STEQ 20/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
103 EF EXCL 15/3595 15/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 3864022 m, 124604 m/sec, 14615126 t fired, .

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# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 25/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 27628332 t fired, 28 attempts, .
100 EF STEQ 25/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
103 EF EXCL 20/3595 15/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 4008885 m, 28972 m/sec, 20239361 t fired, .

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# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG 0 0 3 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
95 EF FNDP 30/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 33183164 t fired, 34 attempts, .
100 EF STEQ 30/3600 0/5 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 sara not yet started (preprocessing).
103 EF EXCL 25/3595 15/32 SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 4073002 m, 12823 m/sec, 26001825 t fired, .

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# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 103 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07
lola: result : false
lola: markings : 4075348
lola: fired transitions : 26215818
lola: time used : 25.000000
lola: memory pages used : 15
lola: CANCELED task # 95 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 100 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-00: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-01: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-02: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-03: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-04: EF false state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-05: AG true state equation
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-06: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-07: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-08: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-09: INITIAL true preprocessing
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-10: AG false findpath
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-11: EF true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-12: AG true tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-13: AG false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-14: EF false tandem / relaxed
SmallOperatingSystem-PT-MT0064DC0016-ReachabilityCardinality-15: EF false tandem / relaxed


Time elapsed: 30 secs. Pages in use: 15

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT0064DC0016"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is SmallOperatingSystem-PT-MT0064DC0016, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r454-smll-167912645900030"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT0064DC0016.tgz
mv SmallOperatingSystem-PT-MT0064DC0016 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;