Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976800506.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SimpleLoadBal-PT-05, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976800506
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 732K
-rw-r--r-- 1 mcc users 6.6K Feb 26 03:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 54K Feb 26 03:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 26 03:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 03:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 17:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 17:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 28K Feb 26 03:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 241K Feb 26 03:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 03:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 26 03:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 155K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-00
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-01
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-02
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-03
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-04
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-05
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-06
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-07
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-08
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-09
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-10
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-11
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-12
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-13
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-14
FORMULA_NAME SimpleLoadBal-PT-05-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679250213038

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SimpleLoadBal-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 18:23:37] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 18:23:37] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 18:23:38] [INFO ] Load time of PNML (sax parser for PT used): 74 ms
[2023-03-19 18:23:38] [INFO ] Transformed 59 places.
[2023-03-19 18:23:38] [INFO ] Transformed 180 transitions.
[2023-03-19 18:23:38] [INFO ] Found NUPN structural information;
[2023-03-19 18:23:38] [INFO ] Completing missing partition info from NUPN : creating a component with [P_client_idle_1, P_client_idle_2, P_client_idle_3, P_client_idle_4, P_client_idle_5, P_client_waiting_1, P_client_waiting_2, P_client_waiting_3, P_client_waiting_4, P_client_waiting_5, P_client_request_1, P_client_request_2, P_client_request_3, P_client_request_4, P_client_request_5, P_client_ack_1, P_client_ack_2, P_client_ack_3, P_client_ack_4, P_client_ack_5, P_server_idle_1, P_server_idle_2, P_server_waiting_1, P_server_waiting_2, P_server_processed_1, P_server_processed_2, P_server_notification_1, P_server_notification_2, P_server_notification_ack_1, P_server_notification_ack_2, P_server_request_1_1, P_server_request_1_2, P_server_request_2_1, P_server_request_2_2, P_server_request_3_1, P_server_request_3_2, P_server_request_4_1, P_server_request_4_2, P_server_request_5_1, P_server_request_5_2, P_lb_idle_1, P_lb_routing_1_1, P_lb_routing_1_2, P_lb_routing_1_3, P_lb_routing_1_4, P_lb_routing_1_5, P_lb_balancing_1, P_lb_load_1_0, P_lb_load_1_1, P_lb_load_1_2, P_lb_load_1_3, P_lb_load_1_4, P_lb_load_1_5, P_lb_load_2_0, P_lb_load_2_1, P_lb_load_2_2, P_lb_load_2_3, P_lb_load_2_4, P_lb_load_2_5]
[2023-03-19 18:23:38] [INFO ] Parsed PT model containing 59 places and 180 transitions and 1158 arcs in 284 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Support contains 40 out of 59 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 59/59 places, 180/180 transitions.
Applied a total of 0 rules in 25 ms. Remains 59 /59 variables (removed 0) and now considering 180/180 (removed 0) transitions.
[2023-03-19 18:23:38] [INFO ] Flow matrix only has 140 transitions (discarded 40 similar events)
// Phase 1: matrix 140 rows 59 cols
[2023-03-19 18:23:38] [INFO ] Computed 19 place invariants in 13 ms
[2023-03-19 18:23:38] [INFO ] Implicit Places using invariants in 469 ms returned [6, 8, 9, 22, 23]
Discarding 5 places :
Implicit Place search using SMT only with invariants took 515 ms to find 5 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 54/59 places, 180/180 transitions.
Applied a total of 0 rules in 9 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 550 ms. Remains : 54/59 places, 180/180 transitions.
Support contains 40 out of 54 places after structural reductions.
[2023-03-19 18:23:39] [INFO ] Flatten gal took : 117 ms
[2023-03-19 18:23:39] [INFO ] Flatten gal took : 61 ms
[2023-03-19 18:23:39] [INFO ] Input system was already deterministic with 180 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 677 ms. (steps per millisecond=14 ) properties (out of 69) seen :48
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=500 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=21 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 21) seen :0
Running SMT prover for 21 properties.
[2023-03-19 18:23:40] [INFO ] Flow matrix only has 140 transitions (discarded 40 similar events)
// Phase 1: matrix 140 rows 54 cols
[2023-03-19 18:23:40] [INFO ] Computed 14 place invariants in 3 ms
[2023-03-19 18:23:41] [INFO ] [Real]Absence check using 10 positive place invariants in 2 ms returned sat
[2023-03-19 18:23:41] [INFO ] [Real]Absence check using 10 positive and 4 generalized place invariants in 3 ms returned sat
[2023-03-19 18:23:41] [INFO ] After 903ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:13
[2023-03-19 18:23:42] [INFO ] [Nat]Absence check using 10 positive place invariants in 71 ms returned sat
[2023-03-19 18:23:42] [INFO ] [Nat]Absence check using 10 positive and 4 generalized place invariants in 28 ms returned sat
[2023-03-19 18:23:43] [INFO ] After 238ms SMT Verify possible using state equation in natural domain returned unsat :17 sat :4
[2023-03-19 18:23:43] [INFO ] State equation strengthened by 55 read => feed constraints.
[2023-03-19 18:23:43] [INFO ] After 139ms SMT Verify possible using 55 Read/Feed constraints in natural domain returned unsat :17 sat :4
[2023-03-19 18:23:43] [INFO ] Deduced a trap composed of 8 places in 102 ms of which 7 ms to minimize.
[2023-03-19 18:23:43] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 106 ms
[2023-03-19 18:23:43] [INFO ] Deduced a trap composed of 28 places in 345 ms of which 1 ms to minimize.
[2023-03-19 18:23:43] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 395 ms
[2023-03-19 18:23:43] [INFO ] Deduced a trap composed of 11 places in 114 ms of which 13 ms to minimize.
[2023-03-19 18:23:44] [INFO ] Deduced a trap composed of 8 places in 880 ms of which 27 ms to minimize.
[2023-03-19 18:23:45] [INFO ] Deduced a trap composed of 8 places in 187 ms of which 2 ms to minimize.
[2023-03-19 18:23:45] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 3 trap constraints in 1232 ms
[2023-03-19 18:23:45] [INFO ] After 1985ms SMT Verify possible using trap constraints in natural domain returned unsat :19 sat :2
Attempting to minimize the solution found.
Minimization took 85 ms.
[2023-03-19 18:23:45] [INFO ] After 3496ms SMT Verify possible using all constraints in natural domain returned unsat :19 sat :2
Fused 21 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 7 ms.
Support contains 5 out of 54 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 54/54 places, 180/180 transitions.
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 5 Pre rules applied. Total rules applied 0 place count 54 transition count 175
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 10 rules applied. Total rules applied 10 place count 49 transition count 175
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 44 transition count 170
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 26 place count 40 transition count 168
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 30 place count 38 transition count 166
Free-agglomeration rule (complex) applied 5 times.
Iterating global reduction 0 with 5 rules applied. Total rules applied 35 place count 38 transition count 161
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 40 place count 33 transition count 161
Applied a total of 40 rules in 74 ms. Remains 33 /54 variables (removed 21) and now considering 161/180 (removed 19) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 86 ms. Remains : 33/54 places, 161/180 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 139 ms. (steps per millisecond=71 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 2) seen :0
Probably explored full state space saw : 1308 states, properties seen :0
Probabilistic random walk after 6810 steps, saw 1308 distinct states, run finished after 81 ms. (steps per millisecond=84 ) properties seen :0
Explored full state space saw : 1308 states, properties seen :0
Exhaustive walk after 6810 steps, saw 1308 distinct states, run finished after 36 ms. (steps per millisecond=189 ) properties seen :0
Successfully simplified 21 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA SimpleLoadBal-PT-05-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 18:23:45] [INFO ] Flatten gal took : 49 ms
[2023-03-19 18:23:45] [INFO ] Flatten gal took : 23 ms
[2023-03-19 18:23:45] [INFO ] Input system was already deterministic with 180 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:45] [INFO ] Flatten gal took : 22 ms
[2023-03-19 18:23:45] [INFO ] Flatten gal took : 18 ms
[2023-03-19 18:23:45] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 21 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 49 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 5 Pre rules applied. Total rules applied 0 place count 54 transition count 175
Deduced a syphon composed of 5 places in 13 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 10 rules applied. Total rules applied 10 place count 49 transition count 175
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 18 place count 45 transition count 171
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 24 place count 41 transition count 169
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 28 place count 39 transition count 167
Applied a total of 28 rules in 43 ms. Remains 39 /54 variables (removed 15) and now considering 167/180 (removed 13) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 44 ms. Remains : 39/54 places, 167/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 25 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 22 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 167 transitions.
Finished random walk after 82 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=41 )
FORMULA SimpleLoadBal-PT-05-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 21 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 11 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 22 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 22 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 8 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 12 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 14 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 8 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 12 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 0 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 20 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 7 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 7 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 24 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 19 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 7 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 180/180 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 180/180 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 180/180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 19 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 7 ms
[2023-03-19 18:23:46] [INFO ] Input system was already deterministic with 180 transitions.
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 8 ms
[2023-03-19 18:23:46] [INFO ] Flatten gal took : 7 ms
[2023-03-19 18:23:46] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 15 ms.
[2023-03-19 18:23:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 180 transitions and 1148 arcs took 2 ms.
Total runtime 9220 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SimpleLoadBal-PT-05
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA SimpleLoadBal-PT-05-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679250232202

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 3 SimpleLoadBal-PT-05-CTLFireability-02
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 51 (type FNDP) for 3 SimpleLoadBal-PT-05-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 3 SimpleLoadBal-PT-05-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SRCH) for 3 SimpleLoadBal-PT-05-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 54 (type SRCH) for SimpleLoadBal-PT-05-CTLFireability-02
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-02
lola: result : true
lola: markings : 13
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 51 (type FNDP) for SimpleLoadBal-PT-05-CTLFireability-02 (obsolete)
lola: CANCELED task # 52 (type EQUN) for SimpleLoadBal-PT-05-CTLFireability-02 (obsolete)
lola: LAUNCH task # 30 (type EXCL) for 21 SimpleLoadBal-PT-05-CTLFireability-05
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type FNDP) for SimpleLoadBal-PT-05-CTLFireability-02
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 30 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-05
lola: result : true
lola: markings : 101
lola: fired transitions : 166
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/374/CTLFireability-52.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 28 (type EXCL) for 21 SimpleLoadBal-PT-05-CTLFireability-05
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-05
lola: result : true
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 19 (type EXCL) for 14 SimpleLoadBal-PT-05-CTLFireability-04
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 19 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-04
lola: result : true
lola: markings : 12336
lola: fired transitions : 30309
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 SimpleLoadBal-PT-05-CTLFireability-15
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 62 (type FNDP) for 41 SimpleLoadBal-PT-05-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-15
lola: result : false
lola: markings : 3421
lola: fired transitions : 8260
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 SimpleLoadBal-PT-05-CTLFireability-14
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-14
lola: result : false
lola: markings : 116176
lola: fired transitions : 566336
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 SimpleLoadBal-PT-05-CTLFireability-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
sara: warning, failure of lp_solve (at job 100)
lola: FINISHED task # 39 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-12
lola: result : true
lola: markings : 116176
lola: fired transitions : 1412713
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 SimpleLoadBal-PT-05-CTLFireability-10
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-10
lola: result : true
lola: markings : 116176
lola: fired transitions : 1413944
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 SimpleLoadBal-PT-05-CTLFireability-07
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-07
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 SimpleLoadBal-PT-05-CTLFireability-00
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-00
lola: result : false
lola: markings : 116176
lola: fired transitions : 566333
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 41 SimpleLoadBal-PT-05-CTLFireability-13
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 61 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-13
lola: result : false
lola: markings : 2268
lola: fired transitions : 6462
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 62 (type FNDP) for SimpleLoadBal-PT-05-CTLFireability-13 (obsolete)
lola: LAUNCH task # 55 (type EXCL) for 14 SimpleLoadBal-PT-05-CTLFireability-04
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type FNDP) for SimpleLoadBal-PT-05-CTLFireability-13
lola: result : unknown
lola: fired transitions : 154420
lola: tried executions : 2
lola: time used : 5.000000
lola: memory pages used : 0
lola: FINISHED task # 55 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-04
lola: result : true
lola: markings : 2268
lola: fired transitions : 7862
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 SimpleLoadBal-PT-05-CTLFireability-02
lola: time limit : 3595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for SimpleLoadBal-PT-05-CTLFireability-02
lola: result : false
lola: markings : 269
lola: fired transitions : 385
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SimpleLoadBal-PT-05-CTLFireability-00: CTL false CTL model checker
SimpleLoadBal-PT-05-CTLFireability-02: DISJ false DISJ
SimpleLoadBal-PT-05-CTLFireability-04: CONJ false tscc_search
SimpleLoadBal-PT-05-CTLFireability-05: DISJ true DISJ
SimpleLoadBal-PT-05-CTLFireability-07: LTL/CTL true CTL model checker
SimpleLoadBal-PT-05-CTLFireability-10: CTL true CTL model checker
SimpleLoadBal-PT-05-CTLFireability-12: CTL true CTL model checker
SimpleLoadBal-PT-05-CTLFireability-13: AG NODL true state space
SimpleLoadBal-PT-05-CTLFireability-14: CTL false CTL model checker
SimpleLoadBal-PT-05-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SimpleLoadBal-PT-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976800506"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-05.tgz
mv SimpleLoadBal-PT-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;