Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976800498.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SimpleLoadBal-PT-02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976800498
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 524K
-rw-r--r-- 1 mcc users 7.9K Feb 26 03:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 26 03:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 26 03:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 03:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 17:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 17:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 26 03:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 173K Feb 26 03:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 03:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 26 03:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 38K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-00
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-01
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-02
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-03
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-04
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-05
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-06
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-07
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-08
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-09
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-10
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-11
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-12
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-13
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-14
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679250144318

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SimpleLoadBal-PT-02
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 18:22:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 18:22:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 18:22:26] [INFO ] Load time of PNML (sax parser for PT used): 27 ms
[2023-03-19 18:22:26] [INFO ] Transformed 32 places.
[2023-03-19 18:22:26] [INFO ] Transformed 45 transitions.
[2023-03-19 18:22:26] [INFO ] Found NUPN structural information;
[2023-03-19 18:22:26] [INFO ] Completing missing partition info from NUPN : creating a component with [P_client_idle_1, P_client_idle_2, P_client_waiting_1, P_client_waiting_2, P_client_request_1, P_client_request_2, P_client_ack_1, P_client_ack_2, P_server_idle_1, P_server_idle_2, P_server_waiting_1, P_server_waiting_2, P_server_processed_1, P_server_processed_2, P_server_notification_1, P_server_notification_2, P_server_notification_ack_1, P_server_notification_ack_2, P_server_request_1_1, P_server_request_1_2, P_server_request_2_1, P_server_request_2_2, P_lb_idle_1, P_lb_routing_1_1, P_lb_routing_1_2, P_lb_balancing_1, P_lb_load_1_0, P_lb_load_1_1, P_lb_load_1_2, P_lb_load_2_0, P_lb_load_2_1, P_lb_load_2_2]
[2023-03-19 18:22:26] [INFO ] Parsed PT model containing 32 places and 45 transitions and 252 arcs in 112 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Initial state reduction rules removed 5 formulas.
FORMULA SimpleLoadBal-PT-02-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-02-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-02-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-02-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-02-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 28 out of 32 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 45/45 transitions.
Applied a total of 0 rules in 10 ms. Remains 32 /32 variables (removed 0) and now considering 45/45 (removed 0) transitions.
[2023-03-19 18:22:26] [INFO ] Flow matrix only has 35 transitions (discarded 10 similar events)
// Phase 1: matrix 35 rows 32 cols
[2023-03-19 18:22:26] [INFO ] Computed 13 place invariants in 5 ms
[2023-03-19 18:22:26] [INFO ] Implicit Places using invariants in 166 ms returned [11]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 190 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 31/32 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 201 ms. Remains : 31/32 places, 45/45 transitions.
Support contains 28 out of 31 places after structural reductions.
[2023-03-19 18:22:26] [INFO ] Flatten gal took : 18 ms
[2023-03-19 18:22:26] [INFO ] Flatten gal took : 7 ms
[2023-03-19 18:22:26] [INFO ] Input system was already deterministic with 45 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 530 ms. (steps per millisecond=18 ) properties (out of 53) seen :45
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-19 18:22:27] [INFO ] Flow matrix only has 35 transitions (discarded 10 similar events)
// Phase 1: matrix 35 rows 31 cols
[2023-03-19 18:22:27] [INFO ] Computed 12 place invariants in 1 ms
[2023-03-19 18:22:27] [INFO ] [Real]Absence check using 8 positive place invariants in 1 ms returned sat
[2023-03-19 18:22:27] [INFO ] [Real]Absence check using 8 positive and 4 generalized place invariants in 0 ms returned sat
[2023-03-19 18:22:27] [INFO ] After 71ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:7
[2023-03-19 18:22:27] [INFO ] [Nat]Absence check using 8 positive place invariants in 3 ms returned sat
[2023-03-19 18:22:27] [INFO ] [Nat]Absence check using 8 positive and 4 generalized place invariants in 1 ms returned sat
[2023-03-19 18:22:28] [INFO ] After 43ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :2
[2023-03-19 18:22:28] [INFO ] State equation strengthened by 10 read => feed constraints.
[2023-03-19 18:22:28] [INFO ] After 11ms SMT Verify possible using 10 Read/Feed constraints in natural domain returned unsat :6 sat :2
[2023-03-19 18:22:28] [INFO ] After 47ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :2
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-19 18:22:28] [INFO ] After 183ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :2
Fused 8 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 5 ms.
Support contains 6 out of 31 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 31/31 places, 45/45 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 31 transition count 44
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 30 transition count 44
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 6 place count 28 transition count 42
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 24 transition count 40
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 22 transition count 38
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 17 place count 22 transition count 37
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 18 place count 21 transition count 37
Applied a total of 18 rules in 35 ms. Remains 21 /31 variables (removed 10) and now considering 37/45 (removed 8) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 35 ms. Remains : 21/31 places, 37/45 transitions.
Finished random walk after 3399 steps, including 1 resets, run visited all 2 properties in 29 ms. (steps per millisecond=117 )
Successfully simplified 6 atomic propositions for a total of 11 simplifications.
[2023-03-19 18:22:28] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 14 ms
FORMULA SimpleLoadBal-PT-02-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 10 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 29 transition count 43
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 7 place count 27 transition count 42
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 9 place count 26 transition count 41
Applied a total of 9 rules in 6 ms. Remains 26 /31 variables (removed 5) and now considering 41/45 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 26/31 places, 41/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 9 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 29 transition count 43
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 10 place count 25 transition count 41
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 14 place count 23 transition count 39
Applied a total of 14 rules in 12 ms. Remains 23 /31 variables (removed 8) and now considering 39/45 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 23/31 places, 39/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 4 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 32 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 29 transition count 43
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 10 place count 25 transition count 41
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 14 place count 23 transition count 39
Applied a total of 14 rules in 11 ms. Remains 23 /31 variables (removed 8) and now considering 39/45 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 23/31 places, 39/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 4 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 3 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 31 /31 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 31/31 places, 45/45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Input system was already deterministic with 45 transitions.
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Flatten gal took : 2 ms
[2023-03-19 18:22:28] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 18:22:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 31 places, 45 transitions and 250 arcs took 1 ms.
Total runtime 2341 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SimpleLoadBal-PT-02
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability

FORMULA SimpleLoadBal-PT-02-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-02-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679250148954

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:203
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 41 (type CNST) for 24 SimpleLoadBal-PT-02-CTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 46 (type EXCL) for 9 SimpleLoadBal-PT-02-CTLFireability-07
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type CNST) for SimpleLoadBal-PT-02-CTLFireability-12
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 46 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-07
lola: result : true
lola: markings : 162
lola: fired transitions : 389
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH INITIAL
lola: LAUNCH task # 29 (type CNST) for 24 SimpleLoadBal-PT-02-CTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 29 (type CNST) for SimpleLoadBal-PT-02-CTLFireability-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH INITIAL
lola: LAUNCH task # 35 (type CNST) for 24 SimpleLoadBal-PT-02-CTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 1 (type EXCL) for 0 SimpleLoadBal-PT-02-CTLFireability-00
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type CNST) for SimpleLoadBal-PT-02-CTLFireability-12
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 1 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-00
lola: result : false
lola: markings : 23
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 7 (type EXCL) for 6 SimpleLoadBal-PT-02-CTLFireability-02
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-02
lola: result : false
lola: markings : 7
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 13 (type EXCL) for 12 SimpleLoadBal-PT-02-CTLFireability-08
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-08
lola: result : true
lola: markings : 296
lola: fired transitions : 1359
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 16 (type EXCL) for 15 SimpleLoadBal-PT-02-CTLFireability-09
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-09
lola: result : false
lola: markings : 220
lola: fired transitions : 359
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 SimpleLoadBal-PT-02-CTLFireability-01
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 4 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-01
lola: result : true
lola: markings : 177
lola: fired transitions : 527
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 SimpleLoadBal-PT-02-CTLFireability-11
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-11
lola: result : false
lola: markings : 11
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 24 SimpleLoadBal-PT-02-CTLFireability-12
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-12
lola: result : true
lola: markings : 7
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 SimpleLoadBal-PT-02-CTLFireability-10
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-10
lola: result : true
lola: markings : 6
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 44 (type EXCL) for 43 SimpleLoadBal-PT-02-CTLFireability-15
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for SimpleLoadBal-PT-02-CTLFireability-15
lola: result : false
lola: markings : 78
lola: fired transitions : 211
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SimpleLoadBal-PT-02-CTLFireability-00: CTL false CTL model checker
SimpleLoadBal-PT-02-CTLFireability-01: CTL true CTL model checker
SimpleLoadBal-PT-02-CTLFireability-02: CTL false CTL model checker
SimpleLoadBal-PT-02-CTLFireability-07: EFAG false tscc_search
SimpleLoadBal-PT-02-CTLFireability-08: CTL true CTL model checker
SimpleLoadBal-PT-02-CTLFireability-09: CTL false CTL model checker
SimpleLoadBal-PT-02-CTLFireability-10: CTL true CTL model checker
SimpleLoadBal-PT-02-CTLFireability-11: CTL false CTL model checker
SimpleLoadBal-PT-02-CTLFireability-12: CONJ true CONJ
SimpleLoadBal-PT-02-CTLFireability-15: CTL false CTL model checker


Time elapsed: 0 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SimpleLoadBal-PT-02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976800498"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-02.tgz
mv SimpleLoadBal-PT-02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;