About the Execution of LoLa+red for SieveSingleMsgMbox-PT-d2m36
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
2369.039 | 427529.00 | 466796.00 | 185.10 | TFF?TTFFTF?T??FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976800474.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SieveSingleMsgMbox-PT-d2m36, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976800474
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 8.6K Feb 26 10:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 26 10:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 10:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 10:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.2K Feb 26 10:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 26 10:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 10:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 26 10:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 1.1M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d2m36-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679248388351
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SieveSingleMsgMbox-PT-d2m36
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 17:53:10] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 17:53:10] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 17:53:10] [INFO ] Load time of PNML (sax parser for PT used): 203 ms
[2023-03-19 17:53:10] [INFO ] Transformed 2398 places.
[2023-03-19 17:53:10] [INFO ] Transformed 1954 transitions.
[2023-03-19 17:53:10] [INFO ] Parsed PT model containing 2398 places and 1954 transitions and 7816 arcs in 328 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Deduced a syphon composed of 1984 places in 27 ms
Reduce places removed 1984 places and 0 transitions.
Support contains 66 out of 414 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 414/414 places, 1954/1954 transitions.
Reduce places removed 25 places and 0 transitions.
Ensure Unique test removed 828 transitions
Reduce isomorphic transitions removed 828 transitions.
Iterating post reduction 0 with 853 rules applied. Total rules applied 853 place count 389 transition count 1126
Discarding 74 places :
Symmetric choice reduction at 1 with 74 rule applications. Total rules 927 place count 315 transition count 992
Iterating global reduction 1 with 74 rules applied. Total rules applied 1001 place count 315 transition count 992
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 1014 place count 315 transition count 979
Discarding 47 places :
Symmetric choice reduction at 2 with 47 rule applications. Total rules 1061 place count 268 transition count 932
Iterating global reduction 2 with 47 rules applied. Total rules applied 1108 place count 268 transition count 932
Ensure Unique test removed 41 transitions
Reduce isomorphic transitions removed 41 transitions.
Iterating post reduction 2 with 41 rules applied. Total rules applied 1149 place count 268 transition count 891
Discarding 18 places :
Symmetric choice reduction at 3 with 18 rule applications. Total rules 1167 place count 250 transition count 869
Iterating global reduction 3 with 18 rules applied. Total rules applied 1185 place count 250 transition count 869
Ensure Unique test removed 110 transitions
Reduce isomorphic transitions removed 110 transitions.
Iterating post reduction 3 with 110 rules applied. Total rules applied 1295 place count 250 transition count 759
Discarding 4 places :
Symmetric choice reduction at 4 with 4 rule applications. Total rules 1299 place count 246 transition count 753
Iterating global reduction 4 with 4 rules applied. Total rules applied 1303 place count 246 transition count 753
Discarding 4 places :
Symmetric choice reduction at 4 with 4 rule applications. Total rules 1307 place count 242 transition count 749
Iterating global reduction 4 with 4 rules applied. Total rules applied 1311 place count 242 transition count 749
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 1313 place count 240 transition count 746
Iterating global reduction 4 with 2 rules applied. Total rules applied 1315 place count 240 transition count 746
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1316 place count 239 transition count 745
Iterating global reduction 4 with 1 rules applied. Total rules applied 1317 place count 239 transition count 745
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1318 place count 238 transition count 744
Iterating global reduction 4 with 1 rules applied. Total rules applied 1319 place count 238 transition count 744
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1320 place count 237 transition count 743
Iterating global reduction 4 with 1 rules applied. Total rules applied 1321 place count 237 transition count 743
Applied a total of 1321 rules in 131 ms. Remains 237 /414 variables (removed 177) and now considering 743/1954 (removed 1211) transitions.
// Phase 1: matrix 743 rows 237 cols
[2023-03-19 17:53:10] [INFO ] Computed 5 place invariants in 20 ms
[2023-03-19 17:53:12] [INFO ] Implicit Places using invariants in 2022 ms returned []
[2023-03-19 17:53:12] [INFO ] Invariant cache hit.
[2023-03-19 17:53:13] [INFO ] State equation strengthened by 568 read => feed constraints.
[2023-03-19 17:53:14] [INFO ] Implicit Places using invariants and state equation in 1992 ms returned []
Implicit Place search using SMT with State Equation took 4043 ms to find 0 implicit places.
[2023-03-19 17:53:14] [INFO ] Invariant cache hit.
[2023-03-19 17:53:15] [INFO ] Dead Transitions using invariants and state equation in 382 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 237/414 places, 743/1954 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4568 ms. Remains : 237/414 places, 743/1954 transitions.
Support contains 66 out of 237 places after structural reductions.
[2023-03-19 17:53:15] [INFO ] Flatten gal took : 104 ms
[2023-03-19 17:53:15] [INFO ] Flatten gal took : 48 ms
[2023-03-19 17:53:16] [INFO ] Input system was already deterministic with 743 transitions.
Support contains 65 out of 237 places (down from 66) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2249 resets, run finished after 458 ms. (steps per millisecond=21 ) properties (out of 59) seen :2
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 34 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 40 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 51 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 100 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 57 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 83 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 46 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 40 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 29 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 60 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 97 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 52 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 51 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 43 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 41 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 60 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 55 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1000 steps, including 53 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 57) seen :0
Incomplete Best-First random walk after 1001 steps, including 56 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 57) seen :0
Interrupted probabilistic random walk after 170051 steps, run timeout after 3001 ms. (steps per millisecond=56 ) properties seen :{3=1, 4=1, 6=1, 8=1, 13=1, 17=1, 20=1, 23=1, 24=1, 25=1, 26=1, 28=1, 29=1, 30=1, 33=1, 34=1, 35=1, 39=1, 42=1, 43=1, 44=1, 45=1, 53=1, 54=1, 55=1}
Probabilistic random walk after 170051 steps, saw 83488 distinct states, run finished after 3002 ms. (steps per millisecond=56 ) properties seen :25
Running SMT prover for 32 properties.
[2023-03-19 17:53:20] [INFO ] Invariant cache hit.
[2023-03-19 17:53:20] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:53:20] [INFO ] [Real]Absence check using 2 positive and 3 generalized place invariants in 5 ms returned sat
[2023-03-19 17:53:20] [INFO ] After 312ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:32
[2023-03-19 17:53:20] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:53:20] [INFO ] [Nat]Absence check using 2 positive and 3 generalized place invariants in 6 ms returned sat
[2023-03-19 17:53:22] [INFO ] After 2100ms SMT Verify possible using state equation in natural domain returned unsat :8 sat :24
[2023-03-19 17:53:22] [INFO ] State equation strengthened by 568 read => feed constraints.
[2023-03-19 17:53:27] [INFO ] After 4420ms SMT Verify possible using 568 Read/Feed constraints in natural domain returned unsat :8 sat :24
[2023-03-19 17:53:30] [INFO ] Deduced a trap composed of 24 places in 147 ms of which 20 ms to minimize.
[2023-03-19 17:53:30] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 178 ms
[2023-03-19 17:53:30] [INFO ] Deduced a trap composed of 76 places in 81 ms of which 2 ms to minimize.
[2023-03-19 17:53:30] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 333 ms
[2023-03-19 17:53:32] [INFO ] After 9737ms SMT Verify possible using trap constraints in natural domain returned unsat :9 sat :23
Attempting to minimize the solution found.
Minimization took 4871 ms.
[2023-03-19 17:53:37] [INFO ] After 17031ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :23
Fused 32 Parikh solutions to 23 different solutions.
Parikh walk visited 0 properties in 1991 ms.
Support contains 27 out of 237 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 237/237 places, 743/743 transitions.
Graph (complete) has 1099 edges and 237 vertex of which 236 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.3 ms
Discarding 1 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 3 place count 236 transition count 741
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 28 place count 211 transition count 466
Iterating global reduction 1 with 25 rules applied. Total rules applied 53 place count 211 transition count 466
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 55 place count 211 transition count 464
Discarding 22 places :
Symmetric choice reduction at 2 with 22 rule applications. Total rules 77 place count 189 transition count 442
Iterating global reduction 2 with 22 rules applied. Total rules applied 99 place count 189 transition count 442
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 106 place count 189 transition count 435
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 111 place count 184 transition count 427
Iterating global reduction 3 with 5 rules applied. Total rules applied 116 place count 184 transition count 427
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 120 place count 184 transition count 423
Applied a total of 120 rules in 91 ms. Remains 184 /237 variables (removed 53) and now considering 423/743 (removed 320) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 92 ms. Remains : 184/237 places, 423/743 transitions.
Incomplete random walk after 10000 steps, including 2249 resets, run finished after 412 ms. (steps per millisecond=24 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 96 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 52 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 111 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 43 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 51 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 49 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 43 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 43 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 54 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1001 steps, including 43 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 103 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 23) seen :0
Incomplete Best-First random walk after 1000 steps, including 110 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 23) seen :0
Interrupted probabilistic random walk after 182391 steps, run timeout after 3001 ms. (steps per millisecond=60 ) properties seen :{6=1, 18=1, 19=1, 20=1}
Probabilistic random walk after 182391 steps, saw 83580 distinct states, run finished after 3001 ms. (steps per millisecond=60 ) properties seen :4
Running SMT prover for 19 properties.
// Phase 1: matrix 423 rows 184 cols
[2023-03-19 17:53:43] [INFO ] Computed 4 place invariants in 6 ms
[2023-03-19 17:53:44] [INFO ] [Real]Absence check using 2 positive place invariants in 21 ms returned sat
[2023-03-19 17:53:44] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 3 ms returned sat
[2023-03-19 17:53:46] [INFO ] After 2615ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:19
[2023-03-19 17:53:46] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:53:46] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 3 ms returned sat
[2023-03-19 17:53:47] [INFO ] After 1150ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :19
[2023-03-19 17:53:47] [INFO ] State equation strengthened by 286 read => feed constraints.
[2023-03-19 17:53:49] [INFO ] After 1797ms SMT Verify possible using 286 Read/Feed constraints in natural domain returned unsat :0 sat :19
[2023-03-19 17:53:49] [INFO ] Deduced a trap composed of 22 places in 155 ms of which 2 ms to minimize.
[2023-03-19 17:53:49] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 220 ms
[2023-03-19 17:53:50] [INFO ] Deduced a trap composed of 64 places in 85 ms of which 1 ms to minimize.
[2023-03-19 17:53:50] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 115 ms
[2023-03-19 17:53:51] [INFO ] After 4373ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :19
Attempting to minimize the solution found.
Minimization took 1973 ms.
[2023-03-19 17:53:53] [INFO ] After 7719ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :19
Parikh walk visited 0 properties in 1566 ms.
Support contains 24 out of 184 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 184/184 places, 423/423 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 181 transition count 394
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 181 transition count 394
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 9 place count 178 transition count 391
Iterating global reduction 0 with 3 rules applied. Total rules applied 12 place count 178 transition count 391
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 14 place count 178 transition count 389
Applied a total of 14 rules in 69 ms. Remains 178 /184 variables (removed 6) and now considering 389/423 (removed 34) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 69 ms. Remains : 178/184 places, 389/423 transitions.
Incomplete random walk after 10000 steps, including 2216 resets, run finished after 290 ms. (steps per millisecond=34 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 58 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 110 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 44 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 108 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 41 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 56 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 36 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 114 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 102 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 19) seen :0
Interrupted probabilistic random walk after 294117 steps, run timeout after 3001 ms. (steps per millisecond=98 ) properties seen :{6=1}
Probabilistic random walk after 294117 steps, saw 134582 distinct states, run finished after 3001 ms. (steps per millisecond=98 ) properties seen :1
Running SMT prover for 18 properties.
// Phase 1: matrix 389 rows 178 cols
[2023-03-19 17:53:58] [INFO ] Computed 4 place invariants in 5 ms
[2023-03-19 17:53:59] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:53:59] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:53:59] [INFO ] After 786ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:18
[2023-03-19 17:53:59] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:53:59] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 2 ms returned sat
[2023-03-19 17:54:00] [INFO ] After 990ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :18
[2023-03-19 17:54:00] [INFO ] State equation strengthened by 257 read => feed constraints.
[2023-03-19 17:54:02] [INFO ] After 1770ms SMT Verify possible using 257 Read/Feed constraints in natural domain returned unsat :0 sat :18
[2023-03-19 17:54:04] [INFO ] Deduced a trap composed of 64 places in 58 ms of which 1 ms to minimize.
[2023-03-19 17:54:04] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 98 ms
[2023-03-19 17:54:05] [INFO ] After 4293ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :18
Attempting to minimize the solution found.
Minimization took 2363 ms.
[2023-03-19 17:54:07] [INFO ] After 7819ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :18
Parikh walk visited 0 properties in 569 ms.
Support contains 23 out of 178 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 178/178 places, 389/389 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 177 transition count 375
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 177 transition count 375
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 176 transition count 374
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 176 transition count 374
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 175 transition count 372
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 175 transition count 372
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 7 place count 175 transition count 371
Applied a total of 7 rules in 32 ms. Remains 175 /178 variables (removed 3) and now considering 371/389 (removed 18) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 32 ms. Remains : 175/178 places, 371/389 transitions.
Incomplete random walk after 10000 steps, including 2215 resets, run finished after 249 ms. (steps per millisecond=40 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 60 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 109 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 38 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 53 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 122 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 43 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 43 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 108 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 98 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 18) seen :0
Interrupted probabilistic random walk after 269969 steps, run timeout after 3001 ms. (steps per millisecond=89 ) properties seen :{}
Probabilistic random walk after 269969 steps, saw 118528 distinct states, run finished after 3002 ms. (steps per millisecond=89 ) properties seen :0
Running SMT prover for 18 properties.
// Phase 1: matrix 371 rows 175 cols
[2023-03-19 17:54:11] [INFO ] Computed 4 place invariants in 11 ms
[2023-03-19 17:54:11] [INFO ] [Real]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:54:11] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 3 ms returned sat
[2023-03-19 17:54:12] [INFO ] After 842ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:18
[2023-03-19 17:54:12] [INFO ] [Nat]Absence check using 2 positive place invariants in 2 ms returned sat
[2023-03-19 17:54:12] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 3 ms returned sat
[2023-03-19 17:54:13] [INFO ] After 869ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :18
[2023-03-19 17:54:13] [INFO ] State equation strengthened by 242 read => feed constraints.
[2023-03-19 17:54:15] [INFO ] After 1567ms SMT Verify possible using 242 Read/Feed constraints in natural domain returned unsat :0 sat :18
[2023-03-19 17:54:17] [INFO ] Deduced a trap composed of 64 places in 67 ms of which 1 ms to minimize.
[2023-03-19 17:54:17] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 151 ms
[2023-03-19 17:54:17] [INFO ] After 3700ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :18
Attempting to minimize the solution found.
Minimization took 1775 ms.
[2023-03-19 17:54:19] [INFO ] After 6571ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :18
Parikh walk visited 0 properties in 807 ms.
Support contains 23 out of 175 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 175/175 places, 371/371 transitions.
Applied a total of 0 rules in 27 ms. Remains 175 /175 variables (removed 0) and now considering 371/371 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 27 ms. Remains : 175/175 places, 371/371 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 175/175 places, 371/371 transitions.
Applied a total of 0 rules in 12 ms. Remains 175 /175 variables (removed 0) and now considering 371/371 (removed 0) transitions.
[2023-03-19 17:54:20] [INFO ] Invariant cache hit.
[2023-03-19 17:54:20] [INFO ] Implicit Places using invariants in 70 ms returned []
[2023-03-19 17:54:20] [INFO ] Invariant cache hit.
[2023-03-19 17:54:20] [INFO ] State equation strengthened by 242 read => feed constraints.
[2023-03-19 17:54:20] [INFO ] Implicit Places using invariants and state equation in 376 ms returned []
Implicit Place search using SMT with State Equation took 475 ms to find 0 implicit places.
[2023-03-19 17:54:20] [INFO ] Redundant transitions in 17 ms returned []
[2023-03-19 17:54:20] [INFO ] Invariant cache hit.
[2023-03-19 17:54:20] [INFO ] Dead Transitions using invariants and state equation in 114 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 637 ms. Remains : 175/175 places, 371/371 transitions.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 175 transition count 366
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 9 place count 171 transition count 366
Performed 19 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 19 Pre rules applied. Total rules applied 9 place count 171 transition count 347
Deduced a syphon composed of 19 places in 1 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 2 with 38 rules applied. Total rules applied 47 place count 152 transition count 347
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 75 place count 138 transition count 333
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -12
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 79 place count 136 transition count 345
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 81 place count 136 transition count 345
Applied a total of 81 rules in 30 ms. Remains 136 /175 variables (removed 39) and now considering 345/371 (removed 26) transitions.
Running SMT prover for 18 properties.
// Phase 1: matrix 345 rows 136 cols
[2023-03-19 17:54:20] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-19 17:54:20] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:54:20] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-03-19 17:54:21] [INFO ] After 530ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:18
[2023-03-19 17:54:21] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:54:21] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 4 ms returned sat
[2023-03-19 17:54:22] [INFO ] After 734ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :18
[2023-03-19 17:54:22] [INFO ] Deduced a trap composed of 13 places in 64 ms of which 0 ms to minimize.
[2023-03-19 17:54:22] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 93 ms
[2023-03-19 17:54:22] [INFO ] Deduced a trap composed of 46 places in 51 ms of which 1 ms to minimize.
[2023-03-19 17:54:22] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 77 ms
[2023-03-19 17:54:22] [INFO ] After 1589ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :18
Attempting to minimize the solution found.
Minimization took 699 ms.
[2023-03-19 17:54:23] [INFO ] After 2413ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :18
Successfully simplified 9 atomic propositions for a total of 16 simplifications.
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:54:23] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
[2023-03-19 17:54:23] [INFO ] Flatten gal took : 50 ms
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:54:23] [INFO ] Flatten gal took : 36 ms
[2023-03-19 17:54:23] [INFO ] Input system was already deterministic with 743 transitions.
Support contains 47 out of 237 places (down from 53) after GAL structural reductions.
Computed a total of 54 stabilizing places and 104 stable transitions
Graph (complete) has 1187 edges and 237 vertex of which 236 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.26 ms
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 41 places :
Symmetric choice reduction at 0 with 41 rule applications. Total rules 41 place count 196 transition count 320
Iterating global reduction 0 with 41 rules applied. Total rules applied 82 place count 196 transition count 320
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 84 place count 196 transition count 318
Discarding 39 places :
Symmetric choice reduction at 1 with 39 rule applications. Total rules 123 place count 157 transition count 279
Iterating global reduction 1 with 39 rules applied. Total rules applied 162 place count 157 transition count 279
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 174 place count 157 transition count 267
Discarding 14 places :
Symmetric choice reduction at 2 with 14 rule applications. Total rules 188 place count 143 transition count 246
Iterating global reduction 2 with 14 rules applied. Total rules applied 202 place count 143 transition count 246
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 2 with 9 rules applied. Total rules applied 211 place count 143 transition count 237
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 215 place count 139 transition count 232
Iterating global reduction 3 with 4 rules applied. Total rules applied 219 place count 139 transition count 232
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 222 place count 136 transition count 229
Iterating global reduction 3 with 3 rules applied. Total rules applied 225 place count 136 transition count 229
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 227 place count 134 transition count 227
Iterating global reduction 3 with 2 rules applied. Total rules applied 229 place count 134 transition count 227
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 3 with 6 rules applied. Total rules applied 235 place count 134 transition count 221
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 237 place count 132 transition count 219
Iterating global reduction 4 with 2 rules applied. Total rules applied 239 place count 132 transition count 219
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 240 place count 131 transition count 218
Iterating global reduction 4 with 1 rules applied. Total rules applied 241 place count 131 transition count 218
Applied a total of 241 rules in 24 ms. Remains 131 /237 variables (removed 106) and now considering 218/743 (removed 525) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 131/237 places, 218/743 transitions.
[2023-03-19 17:54:23] [INFO ] Flatten gal took : 11 ms
[2023-03-19 17:54:23] [INFO ] Flatten gal took : 10 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 218 transitions.
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 42 places :
Symmetric choice reduction at 0 with 42 rule applications. Total rules 42 place count 195 transition count 332
Iterating global reduction 0 with 42 rules applied. Total rules applied 84 place count 195 transition count 332
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 87 place count 195 transition count 329
Discarding 38 places :
Symmetric choice reduction at 1 with 38 rule applications. Total rules 125 place count 157 transition count 291
Iterating global reduction 1 with 38 rules applied. Total rules applied 163 place count 157 transition count 291
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 176 place count 157 transition count 278
Discarding 15 places :
Symmetric choice reduction at 2 with 15 rule applications. Total rules 191 place count 142 transition count 255
Iterating global reduction 2 with 15 rules applied. Total rules applied 206 place count 142 transition count 255
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 220 place count 142 transition count 241
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 223 place count 139 transition count 237
Iterating global reduction 3 with 3 rules applied. Total rules applied 226 place count 139 transition count 237
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 228 place count 137 transition count 235
Iterating global reduction 3 with 2 rules applied. Total rules applied 230 place count 137 transition count 235
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 232 place count 135 transition count 233
Iterating global reduction 3 with 2 rules applied. Total rules applied 234 place count 135 transition count 233
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 236 place count 133 transition count 231
Iterating global reduction 3 with 2 rules applied. Total rules applied 238 place count 133 transition count 231
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 239 place count 132 transition count 230
Iterating global reduction 3 with 1 rules applied. Total rules applied 240 place count 132 transition count 230
Applied a total of 240 rules in 20 ms. Remains 132 /237 variables (removed 105) and now considering 230/743 (removed 513) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 132/237 places, 230/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 9 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 10 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 230 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 46 places :
Symmetric choice reduction at 0 with 46 rule applications. Total rules 46 place count 191 transition count 263
Iterating global reduction 0 with 46 rules applied. Total rules applied 92 place count 191 transition count 263
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 95 place count 191 transition count 260
Discarding 43 places :
Symmetric choice reduction at 1 with 43 rule applications. Total rules 138 place count 148 transition count 217
Iterating global reduction 1 with 43 rules applied. Total rules applied 181 place count 148 transition count 217
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 1 with 15 rules applied. Total rules applied 196 place count 148 transition count 202
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 214 place count 130 transition count 172
Iterating global reduction 2 with 18 rules applied. Total rules applied 232 place count 130 transition count 172
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 246 place count 130 transition count 158
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 251 place count 125 transition count 153
Iterating global reduction 3 with 5 rules applied. Total rules applied 256 place count 125 transition count 153
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 260 place count 121 transition count 149
Iterating global reduction 3 with 4 rules applied. Total rules applied 264 place count 121 transition count 149
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 266 place count 119 transition count 147
Iterating global reduction 3 with 2 rules applied. Total rules applied 268 place count 119 transition count 147
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 270 place count 119 transition count 145
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 272 place count 117 transition count 143
Iterating global reduction 4 with 2 rules applied. Total rules applied 274 place count 117 transition count 143
Applied a total of 274 rules in 40 ms. Remains 117 /237 variables (removed 120) and now considering 143/743 (removed 600) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 117/237 places, 143/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 143 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 47 place count 190 transition count 262
Iterating global reduction 0 with 47 rules applied. Total rules applied 94 place count 190 transition count 262
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 97 place count 190 transition count 259
Discarding 44 places :
Symmetric choice reduction at 1 with 44 rule applications. Total rules 141 place count 146 transition count 215
Iterating global reduction 1 with 44 rules applied. Total rules applied 185 place count 146 transition count 215
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 199 place count 146 transition count 201
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 219 place count 126 transition count 169
Iterating global reduction 2 with 20 rules applied. Total rules applied 239 place count 126 transition count 169
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 253 place count 126 transition count 155
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 259 place count 120 transition count 148
Iterating global reduction 3 with 6 rules applied. Total rules applied 265 place count 120 transition count 148
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 270 place count 115 transition count 143
Iterating global reduction 3 with 5 rules applied. Total rules applied 275 place count 115 transition count 143
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 278 place count 112 transition count 140
Iterating global reduction 3 with 3 rules applied. Total rules applied 281 place count 112 transition count 140
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 283 place count 112 transition count 138
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 286 place count 109 transition count 135
Iterating global reduction 4 with 3 rules applied. Total rules applied 289 place count 109 transition count 135
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 290 place count 108 transition count 134
Iterating global reduction 4 with 1 rules applied. Total rules applied 291 place count 108 transition count 134
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 292 place count 107 transition count 131
Iterating global reduction 4 with 1 rules applied. Total rules applied 293 place count 107 transition count 131
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 294 place count 106 transition count 130
Iterating global reduction 4 with 1 rules applied. Total rules applied 295 place count 106 transition count 130
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 296 place count 105 transition count 129
Iterating global reduction 4 with 1 rules applied. Total rules applied 297 place count 105 transition count 129
Applied a total of 297 rules in 81 ms. Remains 105 /237 variables (removed 132) and now considering 129/743 (removed 614) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 81 ms. Remains : 105/237 places, 129/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 129 transitions.
Incomplete random walk after 10000 steps, including 2277 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 460 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 1) seen :0
Finished probabilistic random walk after 31884 steps, run visited all 1 properties in 62 ms. (steps per millisecond=514 )
Probabilistic random walk after 31884 steps, saw 14843 distinct states, run finished after 62 ms. (steps per millisecond=514 ) properties seen :1
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 45 place count 192 transition count 290
Iterating global reduction 0 with 45 rules applied. Total rules applied 90 place count 192 transition count 290
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 93 place count 192 transition count 287
Discarding 42 places :
Symmetric choice reduction at 1 with 42 rule applications. Total rules 135 place count 150 transition count 245
Iterating global reduction 1 with 42 rules applied. Total rules applied 177 place count 150 transition count 245
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 191 place count 150 transition count 231
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 209 place count 132 transition count 203
Iterating global reduction 2 with 18 rules applied. Total rules applied 227 place count 132 transition count 203
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 241 place count 132 transition count 189
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 245 place count 128 transition count 184
Iterating global reduction 3 with 4 rules applied. Total rules applied 249 place count 128 transition count 184
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 252 place count 125 transition count 181
Iterating global reduction 3 with 3 rules applied. Total rules applied 255 place count 125 transition count 181
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 257 place count 123 transition count 179
Iterating global reduction 3 with 2 rules applied. Total rules applied 259 place count 123 transition count 179
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 261 place count 121 transition count 177
Iterating global reduction 3 with 2 rules applied. Total rules applied 263 place count 121 transition count 177
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 264 place count 120 transition count 176
Iterating global reduction 3 with 1 rules applied. Total rules applied 265 place count 120 transition count 176
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 266 place count 119 transition count 173
Iterating global reduction 3 with 1 rules applied. Total rules applied 267 place count 119 transition count 173
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 268 place count 118 transition count 172
Iterating global reduction 3 with 1 rules applied. Total rules applied 269 place count 118 transition count 172
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 270 place count 117 transition count 171
Iterating global reduction 3 with 1 rules applied. Total rules applied 271 place count 117 transition count 171
Applied a total of 271 rules in 18 ms. Remains 117 /237 variables (removed 120) and now considering 171/743 (removed 572) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 117/237 places, 171/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 6 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 171 transitions.
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 40 places :
Symmetric choice reduction at 0 with 40 rule applications. Total rules 40 place count 197 transition count 323
Iterating global reduction 0 with 40 rules applied. Total rules applied 80 place count 197 transition count 323
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 83 place count 197 transition count 320
Discarding 37 places :
Symmetric choice reduction at 1 with 37 rule applications. Total rules 120 place count 160 transition count 283
Iterating global reduction 1 with 37 rules applied. Total rules applied 157 place count 160 transition count 283
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 167 place count 160 transition count 273
Discarding 14 places :
Symmetric choice reduction at 2 with 14 rule applications. Total rules 181 place count 146 transition count 251
Iterating global reduction 2 with 14 rules applied. Total rules applied 195 place count 146 transition count 251
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 209 place count 146 transition count 237
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 212 place count 143 transition count 233
Iterating global reduction 3 with 3 rules applied. Total rules applied 215 place count 143 transition count 233
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 217 place count 141 transition count 231
Iterating global reduction 3 with 2 rules applied. Total rules applied 219 place count 141 transition count 231
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 220 place count 140 transition count 230
Iterating global reduction 3 with 1 rules applied. Total rules applied 221 place count 140 transition count 230
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 222 place count 139 transition count 229
Iterating global reduction 3 with 1 rules applied. Total rules applied 223 place count 139 transition count 229
Applied a total of 223 rules in 11 ms. Remains 139 /237 variables (removed 98) and now considering 229/743 (removed 514) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 139/237 places, 229/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 229 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 47 place count 190 transition count 262
Iterating global reduction 0 with 47 rules applied. Total rules applied 94 place count 190 transition count 262
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 97 place count 190 transition count 259
Discarding 44 places :
Symmetric choice reduction at 1 with 44 rule applications. Total rules 141 place count 146 transition count 215
Iterating global reduction 1 with 44 rules applied. Total rules applied 185 place count 146 transition count 215
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 199 place count 146 transition count 201
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 219 place count 126 transition count 169
Iterating global reduction 2 with 20 rules applied. Total rules applied 239 place count 126 transition count 169
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 253 place count 126 transition count 155
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 259 place count 120 transition count 148
Iterating global reduction 3 with 6 rules applied. Total rules applied 265 place count 120 transition count 148
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 270 place count 115 transition count 143
Iterating global reduction 3 with 5 rules applied. Total rules applied 275 place count 115 transition count 143
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 278 place count 112 transition count 140
Iterating global reduction 3 with 3 rules applied. Total rules applied 281 place count 112 transition count 140
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 283 place count 112 transition count 138
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 286 place count 109 transition count 135
Iterating global reduction 4 with 3 rules applied. Total rules applied 289 place count 109 transition count 135
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 290 place count 108 transition count 134
Iterating global reduction 4 with 1 rules applied. Total rules applied 291 place count 108 transition count 134
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 292 place count 107 transition count 131
Iterating global reduction 4 with 1 rules applied. Total rules applied 293 place count 107 transition count 131
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 294 place count 106 transition count 130
Iterating global reduction 4 with 1 rules applied. Total rules applied 295 place count 106 transition count 130
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 296 place count 105 transition count 129
Iterating global reduction 4 with 1 rules applied. Total rules applied 297 place count 105 transition count 129
Applied a total of 297 rules in 64 ms. Remains 105 /237 variables (removed 132) and now considering 129/743 (removed 614) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 105/237 places, 129/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 44 place count 193 transition count 292
Iterating global reduction 0 with 44 rules applied. Total rules applied 88 place count 193 transition count 292
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 91 place count 193 transition count 289
Discarding 41 places :
Symmetric choice reduction at 1 with 41 rule applications. Total rules 132 place count 152 transition count 248
Iterating global reduction 1 with 41 rules applied. Total rules applied 173 place count 152 transition count 248
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 185 place count 152 transition count 236
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 202 place count 135 transition count 209
Iterating global reduction 2 with 17 rules applied. Total rules applied 219 place count 135 transition count 209
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 2 with 13 rules applied. Total rules applied 232 place count 135 transition count 196
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 236 place count 131 transition count 191
Iterating global reduction 3 with 4 rules applied. Total rules applied 240 place count 131 transition count 191
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 243 place count 128 transition count 188
Iterating global reduction 3 with 3 rules applied. Total rules applied 246 place count 128 transition count 188
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 248 place count 126 transition count 186
Iterating global reduction 3 with 2 rules applied. Total rules applied 250 place count 126 transition count 186
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 252 place count 124 transition count 184
Iterating global reduction 3 with 2 rules applied. Total rules applied 254 place count 124 transition count 184
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 255 place count 123 transition count 183
Iterating global reduction 3 with 1 rules applied. Total rules applied 256 place count 123 transition count 183
Applied a total of 256 rules in 9 ms. Remains 123 /237 variables (removed 114) and now considering 183/743 (removed 560) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 123/237 places, 183/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 13 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 183 transitions.
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 38 places :
Symmetric choice reduction at 0 with 38 rule applications. Total rules 38 place count 199 transition count 375
Iterating global reduction 0 with 38 rules applied. Total rules applied 76 place count 199 transition count 375
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 78 place count 199 transition count 373
Discarding 36 places :
Symmetric choice reduction at 1 with 36 rule applications. Total rules 114 place count 163 transition count 337
Iterating global reduction 1 with 36 rules applied. Total rules applied 150 place count 163 transition count 337
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 159 place count 163 transition count 328
Discarding 15 places :
Symmetric choice reduction at 2 with 15 rule applications. Total rules 174 place count 148 transition count 306
Iterating global reduction 2 with 15 rules applied. Total rules applied 189 place count 148 transition count 306
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 17 rules applied. Total rules applied 206 place count 148 transition count 289
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 210 place count 144 transition count 284
Iterating global reduction 3 with 4 rules applied. Total rules applied 214 place count 144 transition count 284
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 217 place count 141 transition count 281
Iterating global reduction 3 with 3 rules applied. Total rules applied 220 place count 141 transition count 281
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 222 place count 139 transition count 279
Iterating global reduction 3 with 2 rules applied. Total rules applied 224 place count 139 transition count 279
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 226 place count 137 transition count 277
Iterating global reduction 3 with 2 rules applied. Total rules applied 228 place count 137 transition count 277
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 229 place count 136 transition count 276
Iterating global reduction 3 with 1 rules applied. Total rules applied 230 place count 136 transition count 276
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 231 place count 135 transition count 273
Iterating global reduction 3 with 1 rules applied. Total rules applied 232 place count 135 transition count 273
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 233 place count 134 transition count 272
Iterating global reduction 3 with 1 rules applied. Total rules applied 234 place count 134 transition count 272
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 235 place count 133 transition count 271
Iterating global reduction 3 with 1 rules applied. Total rules applied 236 place count 133 transition count 271
Applied a total of 236 rules in 25 ms. Remains 133 /237 variables (removed 104) and now considering 271/743 (removed 472) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 133/237 places, 271/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 8 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 271 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 47 place count 190 transition count 262
Iterating global reduction 0 with 47 rules applied. Total rules applied 94 place count 190 transition count 262
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 97 place count 190 transition count 259
Discarding 44 places :
Symmetric choice reduction at 1 with 44 rule applications. Total rules 141 place count 146 transition count 215
Iterating global reduction 1 with 44 rules applied. Total rules applied 185 place count 146 transition count 215
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 199 place count 146 transition count 201
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 219 place count 126 transition count 169
Iterating global reduction 2 with 20 rules applied. Total rules applied 239 place count 126 transition count 169
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 253 place count 126 transition count 155
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 259 place count 120 transition count 148
Iterating global reduction 3 with 6 rules applied. Total rules applied 265 place count 120 transition count 148
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 270 place count 115 transition count 143
Iterating global reduction 3 with 5 rules applied. Total rules applied 275 place count 115 transition count 143
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 278 place count 112 transition count 140
Iterating global reduction 3 with 3 rules applied. Total rules applied 281 place count 112 transition count 140
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 283 place count 112 transition count 138
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 286 place count 109 transition count 135
Iterating global reduction 4 with 3 rules applied. Total rules applied 289 place count 109 transition count 135
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 290 place count 108 transition count 134
Iterating global reduction 4 with 1 rules applied. Total rules applied 291 place count 108 transition count 134
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 292 place count 107 transition count 131
Iterating global reduction 4 with 1 rules applied. Total rules applied 293 place count 107 transition count 131
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 294 place count 106 transition count 130
Iterating global reduction 4 with 1 rules applied. Total rules applied 295 place count 106 transition count 130
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 296 place count 105 transition count 129
Iterating global reduction 4 with 1 rules applied. Total rules applied 297 place count 105 transition count 129
Applied a total of 297 rules in 16 ms. Remains 105 /237 variables (removed 132) and now considering 129/743 (removed 614) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 105/237 places, 129/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 10 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 129 transitions.
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 43 places :
Symmetric choice reduction at 0 with 43 rule applications. Total rules 43 place count 194 transition count 292
Iterating global reduction 0 with 43 rules applied. Total rules applied 86 place count 194 transition count 292
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 89 place count 194 transition count 289
Discarding 39 places :
Symmetric choice reduction at 1 with 39 rule applications. Total rules 128 place count 155 transition count 250
Iterating global reduction 1 with 39 rules applied. Total rules applied 167 place count 155 transition count 250
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 179 place count 155 transition count 238
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 196 place count 138 transition count 211
Iterating global reduction 2 with 17 rules applied. Total rules applied 213 place count 138 transition count 211
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 223 place count 138 transition count 201
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 227 place count 134 transition count 196
Iterating global reduction 3 with 4 rules applied. Total rules applied 231 place count 134 transition count 196
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 234 place count 131 transition count 193
Iterating global reduction 3 with 3 rules applied. Total rules applied 237 place count 131 transition count 193
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 239 place count 129 transition count 191
Iterating global reduction 3 with 2 rules applied. Total rules applied 241 place count 129 transition count 191
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 243 place count 127 transition count 189
Iterating global reduction 3 with 2 rules applied. Total rules applied 245 place count 127 transition count 189
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 246 place count 126 transition count 188
Iterating global reduction 3 with 1 rules applied. Total rules applied 247 place count 126 transition count 188
Applied a total of 247 rules in 8 ms. Remains 126 /237 variables (removed 111) and now considering 188/743 (removed 555) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 126/237 places, 188/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 237/237 places, 743/743 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 45 place count 192 transition count 290
Iterating global reduction 0 with 45 rules applied. Total rules applied 90 place count 192 transition count 290
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 93 place count 192 transition count 287
Discarding 41 places :
Symmetric choice reduction at 1 with 41 rule applications. Total rules 134 place count 151 transition count 246
Iterating global reduction 1 with 41 rules applied. Total rules applied 175 place count 151 transition count 246
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 187 place count 151 transition count 234
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 205 place count 133 transition count 206
Iterating global reduction 2 with 18 rules applied. Total rules applied 223 place count 133 transition count 206
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 237 place count 133 transition count 192
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 242 place count 128 transition count 186
Iterating global reduction 3 with 5 rules applied. Total rules applied 247 place count 128 transition count 186
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 251 place count 124 transition count 182
Iterating global reduction 3 with 4 rules applied. Total rules applied 255 place count 124 transition count 182
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 257 place count 122 transition count 180
Iterating global reduction 3 with 2 rules applied. Total rules applied 259 place count 122 transition count 180
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 261 place count 120 transition count 178
Iterating global reduction 3 with 2 rules applied. Total rules applied 263 place count 120 transition count 178
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 264 place count 119 transition count 177
Iterating global reduction 3 with 1 rules applied. Total rules applied 265 place count 119 transition count 177
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 266 place count 118 transition count 174
Iterating global reduction 3 with 1 rules applied. Total rules applied 267 place count 118 transition count 174
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 268 place count 117 transition count 173
Iterating global reduction 3 with 1 rules applied. Total rules applied 269 place count 117 transition count 173
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 270 place count 116 transition count 172
Iterating global reduction 3 with 1 rules applied. Total rules applied 271 place count 116 transition count 172
Applied a total of 271 rules in 35 ms. Remains 116 /237 variables (removed 121) and now considering 172/743 (removed 571) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 116/237 places, 172/743 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 17 ms
[2023-03-19 17:54:24] [INFO ] Input system was already deterministic with 172 transitions.
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 28 ms
[2023-03-19 17:54:24] [INFO ] Flatten gal took : 16 ms
[2023-03-19 17:54:24] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-19 17:54:24] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 237 places, 743 transitions and 2935 arcs took 4 ms.
Total runtime 74709 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SieveSingleMsgMbox-PT-d2m36
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679248815880
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 36 (type EXCL) for 35 SieveSingleMsgMbox-PT-d2m36-CTLFireability-08
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 36 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-08
lola: result : true
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 18 (type EXCL) for 7 SieveSingleMsgMbox-PT-d2m36-CTLFireability-02
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 18 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-02
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 38 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 5/240 4/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 815696 m, 163139 m/sec, 1040368 t fired, .
Time elapsed: 5 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 10/240 8/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 1602177 m, 157296 m/sec, 2018162 t fired, .
Time elapsed: 10 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 15/240 11/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 2449454 m, 169455 m/sec, 3143329 t fired, .
Time elapsed: 15 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 20/240 15/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 3311679 m, 172445 m/sec, 4274911 t fired, .
Time elapsed: 20 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 25/240 19/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 4188065 m, 175277 m/sec, 5360505 t fired, .
Time elapsed: 25 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 30/240 23/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 5048215 m, 172030 m/sec, 6468115 t fired, .
Time elapsed: 30 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 35/240 27/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 5923451 m, 175047 m/sec, 7545844 t fired, .
Time elapsed: 35 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 40/240 30/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 6762920 m, 167893 m/sec, 8693653 t fired, .
Time elapsed: 40 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 43 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ 0 4 0 0 6 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 58 (type EXCL) for 7 SieveSingleMsgMbox-PT-d2m36-CTLFireability-02
lola: time limit : 253 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-02
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13
lola: time limit : 355 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 5/355 3/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 528869 m, 105773 m/sec, 1194858 t fired, .
Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 10/355 5/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 1088219 m, 111870 m/sec, 2458822 t fired, .
Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 15/355 8/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 1645233 m, 111402 m/sec, 3721246 t fired, .
Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 20/355 10/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 2188914 m, 108736 m/sec, 4994444 t fired, .
Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 25/355 13/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 2736404 m, 109498 m/sec, 6289602 t fired, .
Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 30/355 15/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 3258858 m, 104490 m/sec, 7474514 t fired, .
Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 35/355 17/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 3817880 m, 111804 m/sec, 8728643 t fired, .
Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 40/355 20/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 4368764 m, 110176 m/sec, 9969614 t fired, .
Time elapsed: 85 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 45/355 22/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 4919099 m, 110067 m/sec, 11236320 t fired, .
Time elapsed: 90 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 50/355 25/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 5476013 m, 111382 m/sec, 12470072 t fired, .
Time elapsed: 95 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 55/355 27/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 6031997 m, 111196 m/sec, 13733359 t fired, .
Time elapsed: 100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 60/355 29/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 6559167 m, 105434 m/sec, 14975405 t fired, .
Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 65/355 32/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 7076658 m, 103498 m/sec, 16198167 t fired, .
Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 52 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 46 (type EXCL) for 45 SieveSingleMsgMbox-PT-d2m36-CTLFireability-11
lola: time limit : 387 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-11
lola: result : true
lola: markings : 12
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-06
lola: time limit : 435 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-06
lola: result : false
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 SieveSingleMsgMbox-PT-d2m36-CTLFireability-05
lola: time limit : 497 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-05
lola: result : true
lola: markings : 12
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 5 (type EXCL) for 0 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01
lola: time limit : 580 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 5/580 4/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 653163 m, 130632 m/sec, 832041 t fired, .
Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 10/580 7/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 1358417 m, 141050 m/sec, 1709139 t fired, .
Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 15/580 10/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 2045028 m, 137322 m/sec, 2617876 t fired, .
Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 20/580 13/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 2724738 m, 135942 m/sec, 3539821 t fired, .
Time elapsed: 135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 25/580 16/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 3422798 m, 139612 m/sec, 4410165 t fired, .
Time elapsed: 140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 30/580 19/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 4122120 m, 139864 m/sec, 5276627 t fired, .
Time elapsed: 145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 35/580 22/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 4822374 m, 140050 m/sec, 6176985 t fired, .
Time elapsed: 150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 40/580 25/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 5530373 m, 141599 m/sec, 7059859 t fired, .
Time elapsed: 155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 45/580 28/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 6225302 m, 138985 m/sec, 7988467 t fired, .
Time elapsed: 160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 50/580 31/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 6917906 m, 138520 m/sec, 8898387 t fired, .
Time elapsed: 165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 5 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 57 (type EXCL) for 48 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12
lola: time limit : 686 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 5/686 4/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 822346 m, 164469 m/sec, 1047594 t fired, .
Time elapsed: 175 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 10/686 7/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 1682863 m, 172103 m/sec, 2121328 t fired, .
Time elapsed: 180 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 15/686 11/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 2518767 m, 167180 m/sec, 3250366 t fired, .
Time elapsed: 185 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 20/686 14/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 3369346 m, 170115 m/sec, 4344786 t fired, .
Time elapsed: 190 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 25/686 18/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 4224361 m, 171003 m/sec, 5413485 t fired, .
Time elapsed: 195 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 30/686 21/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 5066949 m, 168517 m/sec, 6490227 t fired, .
Time elapsed: 200 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 35/686 24/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 5917811 m, 170172 m/sec, 7538621 t fired, .
Time elapsed: 205 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 40/686 28/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 6743230 m, 165083 m/sec, 8666688 t fired, .
Time elapsed: 210 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
57 AGEF EXCL 45/686 31/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 7564734 m, 164300 m/sec, 9804297 t fired, .
Time elapsed: 215 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 57 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 220 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 27 (type EXCL) for 26 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03
lola: time limit : 845 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 5/845 3/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 588225 m, 117645 m/sec, 1434151 t fired, .
Time elapsed: 225 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 10/845 6/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 1225899 m, 127534 m/sec, 2942874 t fired, .
Time elapsed: 230 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 15/845 9/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 1854120 m, 125644 m/sec, 4465700 t fired, .
Time elapsed: 235 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 20/845 12/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 2463225 m, 121821 m/sec, 5987771 t fired, .
Time elapsed: 240 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 25/845 14/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 3084107 m, 124176 m/sec, 7534549 t fired, .
Time elapsed: 245 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 30/845 17/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 3719476 m, 127073 m/sec, 9036327 t fired, .
Time elapsed: 250 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 35/845 20/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 4347595 m, 125623 m/sec, 10544651 t fired, .
Time elapsed: 255 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 40/845 22/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 4913638 m, 113208 m/sec, 11924127 t fired, .
Time elapsed: 260 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 45/845 25/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 5470437 m, 111359 m/sec, 13223656 t fired, .
Time elapsed: 265 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 50/845 27/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 6024420 m, 110796 m/sec, 14547118 t fired, .
Time elapsed: 270 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 55/845 29/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 6556905 m, 106497 m/sec, 15882978 t fired, .
Time elapsed: 275 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
27 CTL EXCL 60/845 32/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 7111517 m, 110922 m/sec, 17289223 t fired, .
Time elapsed: 280 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 27 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 285 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 41 (type EXCL) for 38 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10
lola: time limit : 1105 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 5/1105 3/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 505517 m, 101103 m/sec, 1647348 t fired, .
Time elapsed: 290 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 10/1105 5/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 1050737 m, 109044 m/sec, 3422525 t fired, .
Time elapsed: 295 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 15/1105 8/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 1629622 m, 115777 m/sec, 5316789 t fired, .
Time elapsed: 300 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 20/1105 10/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 2210410 m, 116157 m/sec, 7253224 t fired, .
Time elapsed: 305 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 25/1105 13/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 2792057 m, 116329 m/sec, 9202874 t fired, .
Time elapsed: 310 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 30/1105 16/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 3369698 m, 115528 m/sec, 11084587 t fired, .
Time elapsed: 315 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 35/1105 18/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 3927880 m, 111636 m/sec, 12899336 t fired, .
Time elapsed: 320 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 40/1105 20/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 4485248 m, 111473 m/sec, 14718742 t fired, .
Time elapsed: 325 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 45/1105 23/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 5039074 m, 110765 m/sec, 16535375 t fired, .
Time elapsed: 330 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 50/1105 25/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 5600631 m, 112311 m/sec, 18348470 t fired, .
Time elapsed: 335 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 55/1105 28/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 6166559 m, 113185 m/sec, 20245355 t fired, .
Time elapsed: 340 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 1 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 60/1105 30/32 SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 6735823 m, 113852 m/sec, 22128061 t fired, .
Time elapsed: 345 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: CANCELED task # 41 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ 0 1 0 0 2 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ 0 0 0 0 2 0 2 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 350 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 11
lola: LAUNCH task # 55 (type EXCL) for 54 SieveSingleMsgMbox-PT-d2m36-CTLFireability-14
lola: time limit : 1625 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-14
lola: result : false
lola: markings : 6811
lola: fired transitions : 7897
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 3 (type EXCL) for 0 SieveSingleMsgMbox-PT-d2m36-CTLFireability-01
lola: time limit : 3250 sec
lola: memory limit: 32 pages
lola: FINISHED task # 3 (type EXCL) for SieveSingleMsgMbox-PT-d2m36-CTLFireability-01
lola: result : false
lola: markings : 12
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 11
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d2m36-CTLFireability-01: CONJ false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-02: CONJ false state space /EXEG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-03: CTL unknown AGGR
SieveSingleMsgMbox-PT-d2m36-CTLFireability-05: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-08: EG true state space / EG
SieveSingleMsgMbox-PT-d2m36-CTLFireability-10: DISJ unknown DISJ
SieveSingleMsgMbox-PT-d2m36-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d2m36-CTLFireability-12: EFAG unknown AGGR
SieveSingleMsgMbox-PT-d2m36-CTLFireability-13: CTL unknown AGGR
SieveSingleMsgMbox-PT-d2m36-CTLFireability-14: CTL false CTL model checker
Time elapsed: 350 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d2m36"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SieveSingleMsgMbox-PT-d2m36, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976800474"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d2m36.tgz
mv SieveSingleMsgMbox-PT-d2m36 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;