Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976500258.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVt-PT-010A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976500258
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 8.1K Feb 25 23:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 25 23:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 23:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 25 23:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 23:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Feb 25 23:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 23:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K Feb 25 23:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 27K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-00
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-01
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-02
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-03
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-04
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-05
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-06
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-07
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-08
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-09
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-10
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-11
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-12
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-13
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-14
FORMULA_NAME ShieldRVt-PT-010A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679245007695

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-010A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:56:49] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 16:56:49] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:56:49] [INFO ] Load time of PNML (sax parser for PT used): 42 ms
[2023-03-19 16:56:49] [INFO ] Transformed 83 places.
[2023-03-19 16:56:49] [INFO ] Transformed 83 transitions.
[2023-03-19 16:56:49] [INFO ] Found NUPN structural information;
[2023-03-19 16:56:49] [INFO ] Parsed PT model containing 83 places and 83 transitions and 346 arcs in 113 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
FORMULA ShieldRVt-PT-010A-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 78 out of 83 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 12 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
// Phase 1: matrix 82 rows 83 cols
[2023-03-19 16:56:49] [INFO ] Computed 41 place invariants in 6 ms
[2023-03-19 16:56:49] [INFO ] Implicit Places using invariants in 170 ms returned []
[2023-03-19 16:56:49] [INFO ] Invariant cache hit.
[2023-03-19 16:56:49] [INFO ] Implicit Places using invariants and state equation in 90 ms returned []
Implicit Place search using SMT with State Equation took 291 ms to find 0 implicit places.
[2023-03-19 16:56:49] [INFO ] Invariant cache hit.
[2023-03-19 16:56:49] [INFO ] Dead Transitions using invariants and state equation in 88 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 392 ms. Remains : 83/83 places, 82/82 transitions.
Support contains 78 out of 83 places after structural reductions.
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 27 ms
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 10 ms
[2023-03-19 16:56:50] [INFO ] Input system was already deterministic with 82 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 395 ms. (steps per millisecond=25 ) properties (out of 66) seen :62
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-19 16:56:50] [INFO ] Invariant cache hit.
[2023-03-19 16:56:50] [INFO ] [Real]Absence check using 41 positive place invariants in 11 ms returned sat
[2023-03-19 16:56:50] [INFO ] After 73ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 15 simplifications.
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 10 ms
[2023-03-19 16:56:50] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA ShieldRVt-PT-010A-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 14 ms
[2023-03-19 16:56:50] [INFO ] Input system was already deterministic with 82 transitions.
Support contains 76 out of 83 places (down from 77) after GAL structural reductions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 4 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 6 ms
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:50] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 3 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:50] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 80 transition count 80
Applied a total of 3 rules in 15 ms. Remains 80 /83 variables (removed 3) and now considering 80/82 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 80/83 places, 80/82 transitions.
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:50] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 3 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 10 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 83 /83 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 83/83 places, 82/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 80 transition count 80
Applied a total of 3 rules in 17 ms. Remains 80 /83 variables (removed 3) and now considering 80/82 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 80/83 places, 80/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 80 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA ShieldRVt-PT-010A-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 83/83 places, 82/82 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 82 transition count 81
Applied a total of 2 rules in 5 ms. Remains 82 /83 variables (removed 1) and now considering 81/82 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 82/83 places, 81/82 transitions.
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Input system was already deterministic with 81 transitions.
Finished random walk after 578 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=192 )
FORMULA ShieldRVt-PT-010A-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:56:51] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-19 16:56:51] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 83 places, 82 transitions and 344 arcs took 1 ms.
Total runtime 1930 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldRVt-PT-010A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA ShieldRVt-PT-010A-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-010A-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-010A-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-010A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-010A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-010A-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-010A-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679245242063

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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1 CTL EXCL 5/257 5/32 ShieldRVt-PT-010A-CTLFireability-00 1040296 m, 208059 m/sec, 6456289 t fired, .

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ShieldRVt-PT-010A-CTLFireability-09: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-010A-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-02: AGEF 0 0 1 0 1 0 0 0
ShieldRVt-PT-010A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 AGEF EXCL 43/3423 29/32 ShieldRVt-PT-010A-CTLFireability-02 7476646 m, 137458 m/sec, 22785659 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldRVt-PT-010A-CTLFireability-03: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-06: CTL false CTL model checker
ShieldRVt-PT-010A-CTLFireability-08: CONJ false CTL model checker
ShieldRVt-PT-010A-CTLFireability-09: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-10: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-010A-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-02: AGEF 0 0 1 0 1 0 0 0
ShieldRVt-PT-010A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 AGEF EXCL 48/3423 32/32 ShieldRVt-PT-010A-CTLFireability-02 8144952 m, 133661 m/sec, 24958150 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldRVt-PT-010A-CTLFireability-03: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-06: CTL false CTL model checker
ShieldRVt-PT-010A-CTLFireability-08: CONJ false CTL model checker
ShieldRVt-PT-010A-CTLFireability-09: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-10: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-010A-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-02: AGEF 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldRVt-PT-010A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-010A-CTLFireability-00: CTL unknown AGGR
ShieldRVt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldRVt-PT-010A-CTLFireability-02: AGEF unknown AGGR
ShieldRVt-PT-010A-CTLFireability-03: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-04: CTL unknown AGGR
ShieldRVt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-06: CTL false CTL model checker
ShieldRVt-PT-010A-CTLFireability-07: CTL unknown AGGR
ShieldRVt-PT-010A-CTLFireability-08: CONJ false CTL model checker
ShieldRVt-PT-010A-CTLFireability-09: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-10: CTL true CTL model checker
ShieldRVt-PT-010A-CTLFireability-11: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-010A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVt-PT-010A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976500258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-010A.tgz
mv ShieldRVt-PT-010A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;