About the Execution of LoLa+red for ShieldRVt-PT-005A
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
532.331 | 51351.00 | 180521.00 | 149.30 | TFTTFTTTFTTTTTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976500246.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVt-PT-005A, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976500246
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.1K Feb 25 22:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 25 22:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 22:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 22:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 22:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 25 22:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 22:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 22:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 14K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-00
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-01
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-02
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-03
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-04
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-05
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-06
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-07
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-08
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-09
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-10
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-11
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-12
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-13
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-14
FORMULA_NAME ShieldRVt-PT-005A-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1679244795218
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-005A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:53:17] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 16:53:17] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:53:17] [INFO ] Load time of PNML (sax parser for PT used): 31 ms
[2023-03-19 16:53:17] [INFO ] Transformed 43 places.
[2023-03-19 16:53:17] [INFO ] Transformed 43 transitions.
[2023-03-19 16:53:17] [INFO ] Found NUPN structural information;
[2023-03-19 16:53:17] [INFO ] Parsed PT model containing 43 places and 43 transitions and 176 arcs in 119 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 14 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 108 ms. (steps per millisecond=92 ) properties (out of 8) seen :7
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 42 rows 43 cols
[2023-03-19 16:53:17] [INFO ] Computed 21 place invariants in 7 ms
[2023-03-19 16:53:17] [INFO ] After 274ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 16:53:18] [INFO ] [Nat]Absence check using 21 positive place invariants in 7 ms returned sat
[2023-03-19 16:53:18] [INFO ] After 69ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 725 ms.
starting LoLA
BK_INPUT ShieldRVt-PT-005A
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005A-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679244846569
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 53 (type EXCL) for 18 ShieldRVt-PT-005A-ReachabilityCardinality-06
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 18 ShieldRVt-PT-005A-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 18 ShieldRVt-PT-005A-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 52 (type SRCH) for 18 ShieldRVt-PT-005A-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 ShieldRVt-PT-005A-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 31 (type CNST) for ShieldRVt-PT-005A-ReachabilityCardinality-10
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 ShieldRVt-PT-005A-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 16 (type CNST) for ShieldRVt-PT-005A-ReachabilityCardinality-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 50 (type EQUN) for ShieldRVt-PT-005A-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 49 (type FNDP) for ShieldRVt-PT-005A-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 52 (type SRCH) for ShieldRVt-PT-005A-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 53 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 127 (type EXCL) for 45 ShieldRVt-PT-005A-ReachabilityCardinality-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 134 (type FNDP) for 12 ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type EQUN) for 12 ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 137 (type SRCH) for 12 ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for ShieldRVt-PT-005A-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 51579
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 127 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-15
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 123 (type EXCL) for 0 ShieldRVt-PT-005A-ReachabilityCardinality-00
lola: time limit : 300 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-135.sara.
lola: FINISHED task # 123 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-00
lola: result : false
lola: markings : 302604
lola: fired transitions : 950681
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 92 (type EXCL) for 39 ShieldRVt-PT-005A-ReachabilityCardinality-13
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 92 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-13
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 67 (type EXCL) for 21 ShieldRVt-PT-005A-ReachabilityCardinality-07
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 67 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-07
lola: result : false
lola: markings : 346773
lola: fired transitions : 1092131
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 125 (type EXCL) for 3 ShieldRVt-PT-005A-ReachabilityCardinality-01
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 125 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-01
lola: result : true
lola: markings : 42
lola: fired transitions : 45
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 107 (type EXCL) for 27 ShieldRVt-PT-005A-ReachabilityCardinality-09
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 107 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-09
lola: result : true
lola: markings : 586
lola: fired transitions : 730
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 60 (type EXCL) for 9 ShieldRVt-PT-005A-ReachabilityCardinality-03
lola: time limit : 513 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG 0 5 0 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG 0 4 1 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 2 3 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF 0 5 0 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF 0 5 0 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
60 EF EXCL 2/513 2/32 ShieldRVt-PT-005A-ReachabilityCardinality-03 363658 m, 72731 m/sec, 1123406 t fired, .
134 EF FNDP 5/357 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 3931551 t fired, 4 attempts, .
135 EF STEQ 5/397 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
137 EF SRCH 5/397 3/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 655399 m, 131079 m/sec, 1564132 t fired, .
Time elapsed: 5 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 60 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-03
lola: result : false
lola: markings : 390426
lola: fired transitions : 1406143
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 86 (type EXCL) for 36 ShieldRVt-PT-005A-ReachabilityCardinality-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 86 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-12
lola: result : true
lola: markings : 10
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 112 (type EXCL) for 42 ShieldRVt-PT-005A-ReachabilityCardinality-14
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 112 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-14
lola: result : true
lola: markings : 43
lola: fired transitions : 64
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 80 (type EXCL) for 33 ShieldRVt-PT-005A-ReachabilityCardinality-11
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 80 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-11
lola: result : true
lola: markings : 25
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 132 (type EXCL) for 6 ShieldRVt-PT-005A-ReachabilityCardinality-02
lola: time limit : 1198 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 2 3 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
132 EF EXCL 5/1198 4/32 ShieldRVt-PT-005A-ReachabilityCardinality-02 895913 m, 179182 m/sec, 3026759 t fired, .
134 EF FNDP 10/895 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 7904448 t fired, 8 attempts, .
135 EF STEQ 10/895 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
137 EF SRCH 10/895 3/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 826319 m, 34184 m/sec, 2081445 t fired, .
Time elapsed: 10 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 2 3 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
132 EF EXCL 10/1198 6/32 ShieldRVt-PT-005A-ReachabilityCardinality-02 1580109 m, 136839 m/sec, 6214405 t fired, .
134 EF FNDP 15/890 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 11621801 t fired, 12 attempts, .
135 EF STEQ 15/890 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
137 EF SRCH 15/890 4/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 999894 m, 34715 m/sec, 2625373 t fired, .
Time elapsed: 15 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 2 3 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
132 EF EXCL 15/1198 8/32 ShieldRVt-PT-005A-ReachabilityCardinality-02 2059058 m, 95789 m/sec, 9502562 t fired, .
134 EF FNDP 20/885 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 15404433 t fired, 16 attempts, .
135 EF STEQ 20/885 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
137 EF SRCH 20/885 4/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 1169476 m, 33916 m/sec, 3184715 t fired, .
Time elapsed: 20 secs. Pages in use: 12
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG 0 4 1 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 2 3 0 1 0 0 0
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
132 EF EXCL 20/1198 8/32 ShieldRVt-PT-005A-ReachabilityCardinality-02 2096544 m, 7497 m/sec, 14485959 t fired, .
134 EF FNDP 25/880 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 19164751 t fired, 20 attempts, .
135 EF STEQ 25/880 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
137 EF SRCH 25/880 5/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 1332084 m, 32521 m/sec, 3752408 t fired, .
Time elapsed: 25 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 132 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-02
lola: result : false
lola: markings : 2097130
lola: fired transitions : 20338525
lola: time used : 25.000000
lola: memory pages used : 8
lola: LAUNCH task # 74 (type EXCL) for 24 ShieldRVt-PT-005A-ReachabilityCardinality-08
lola: time limit : 1785 sec
lola: memory limit: 32 pages
lola: FINISHED task # 74 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-08
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 138 (type EXCL) for 12 ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: time limit : 3570 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 1 4 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
134 EF FNDP 30/1770 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 23014012 t fired, 24 attempts, .
135 EF STEQ 30/3570 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
137 EF SRCH 30/3570 5/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 1508281 m, 35239 m/sec, 4412256 t fired, .
138 EF EXCL 0/3570 1/32 ShieldRVt-PT-005A-ReachabilityCardinality-04 53367 m, 10673 m/sec, 97879 t fired, .
Time elapsed: 30 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 137 (type SRCH) for ShieldRVt-PT-005A-ReachabilityCardinality-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 1 3 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
134 EF FNDP 35/1770 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 29033764 t fired, 30 attempts, .
135 EF STEQ 35/3570 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
138 EF EXCL 5/3570 3/32 ShieldRVt-PT-005A-ReachabilityCardinality-04 722434 m, 133813 m/sec, 1769320 t fired, .
Time elapsed: 35 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 139 (type SRCH) for 12 ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 139 (type SRCH) for ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 0 3 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
134 EF FNDP 40/3600 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 35188454 t fired, 36 attempts, .
135 EF STEQ 40/3600 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
138 EF EXCL 10/3570 5/32 ShieldRVt-PT-005A-ReachabilityCardinality-04 1301458 m, 115804 m/sec, 3609450 t fired, .
Time elapsed: 40 secs. Pages in use: 13
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF 0 0 3 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
134 EF FNDP 45/3600 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 42356311 t fired, 43 attempts, .
135 EF STEQ 45/3600 0/5 ShieldRVt-PT-005A-ReachabilityCardinality-04 sara is running.
138 EF EXCL 15/3570 7/32 ShieldRVt-PT-005A-ReachabilityCardinality-04 1784067 m, 96521 m/sec, 6383466 t fired, .
Time elapsed: 45 secs. Pages in use: 13
# running tasks: 3 of 4 Visible: 16
lola: FINISHED task # 138 (type EXCL) for ShieldRVt-PT-005A-ReachabilityCardinality-04
lola: result : false
lola: markings : 1877241
lola: fired transitions : 8820851
lola: time used : 18.000000
lola: memory pages used : 7
lola: CANCELED task # 134 (type FNDP) for ShieldRVt-PT-005A-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 135 (type EQUN) for ShieldRVt-PT-005A-ReachabilityCardinality-04 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-ReachabilityCardinality-00: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-02: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-03: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-04: EF false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-05: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-06: AG true state equation
ShieldRVt-PT-005A-ReachabilityCardinality-07: AG true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-10: INITIAL true preprocessing
ShieldRVt-PT-005A-ReachabilityCardinality-11: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-12: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-13: EF true tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-14: AG false tandem / relaxed
ShieldRVt-PT-005A-ReachabilityCardinality-15: EF true tandem / relaxed
Time elapsed: 48 secs. Pages in use: 13
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-005A"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVt-PT-005A, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976500246"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-005A.tgz
mv ShieldRVt-PT-005A execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;