Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976500242.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVt-PT-005A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976500242
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 7.1K Feb 25 22:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 25 22:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 22:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 22:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 22:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 25 22:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 22:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 22:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 14K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-00
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-01
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-02
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-03
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-04
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-05
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-06
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-07
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-08
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-09
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-10
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-11
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-12
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-13
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-14
FORMULA_NAME ShieldRVt-PT-005A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679244688827

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-005A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:51:30] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 16:51:30] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:51:30] [INFO ] Load time of PNML (sax parser for PT used): 22 ms
[2023-03-19 16:51:30] [INFO ] Transformed 43 places.
[2023-03-19 16:51:30] [INFO ] Transformed 43 transitions.
[2023-03-19 16:51:30] [INFO ] Found NUPN structural information;
[2023-03-19 16:51:30] [INFO ] Parsed PT model containing 43 places and 43 transitions and 176 arcs in 77 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
FORMULA ShieldRVt-PT-005A-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-005A-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 43 out of 43 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 8 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 43 cols
[2023-03-19 16:51:30] [INFO ] Computed 21 place invariants in 7 ms
[2023-03-19 16:51:30] [INFO ] Implicit Places using invariants in 178 ms returned []
[2023-03-19 16:51:30] [INFO ] Invariant cache hit.
[2023-03-19 16:51:30] [INFO ] Implicit Places using invariants and state equation in 63 ms returned []
Implicit Place search using SMT with State Equation took 266 ms to find 0 implicit places.
[2023-03-19 16:51:30] [INFO ] Invariant cache hit.
[2023-03-19 16:51:30] [INFO ] Dead Transitions using invariants and state equation in 65 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 342 ms. Remains : 43/43 places, 42/42 transitions.
Support contains 43 out of 43 places after structural reductions.
[2023-03-19 16:51:31] [INFO ] Flatten gal took : 28 ms
[2023-03-19 16:51:31] [INFO ] Flatten gal took : 10 ms
[2023-03-19 16:51:31] [INFO ] Input system was already deterministic with 42 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 416 ms. (steps per millisecond=24 ) properties (out of 51) seen :49
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 16:51:32] [INFO ] Invariant cache hit.
[2023-03-19 16:51:32] [INFO ] [Real]Absence check using 21 positive place invariants in 5 ms returned sat
[2023-03-19 16:51:32] [INFO ] After 103ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 14 simplifications.
[2023-03-19 16:51:32] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 7 ms
FORMULA ShieldRVt-PT-005A-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 7 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 12 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 2 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 2 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 0 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 6 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 43 /43 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 43/43 places, 42/42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:51:32] [INFO ] Input system was already deterministic with 42 transitions.
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:51:32] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:51:32] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-19 16:51:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 43 places, 42 transitions and 174 arcs took 0 ms.
Total runtime 2197 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldRVt-PT-005A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
CTLFireability

FORMULA ShieldRVt-PT-005A-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-005A-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679244881002

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

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9 CTL EXCL 23/583 9/32 ShieldRVt-PT-005A-CTLFireability-02 2097153 m, 3 m/sec, 28039034 t fired, .

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ShieldRVt-PT-005A-CTLFireability-12: CONJ false CTL model checker
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1 CTL EXCL 5/868 5/32 ShieldRVt-PT-005A-CTLFireability-00 1189799 m, 237959 m/sec, 6965319 t fired, .

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ShieldRVt-PT-005A-CTLFireability-03: CTL true CTL model checker
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ShieldRVt-PT-005A-CTLFireability-06: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-09: CONJ false state space /ER
ShieldRVt-PT-005A-CTLFireability-10: CTL false CTL model checker
ShieldRVt-PT-005A-CTLFireability-11: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-12: CONJ false CTL model checker
ShieldRVt-PT-005A-CTLFireability-13: CTL false CTL model checker
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22 CTL EXCL 1/1725 1/32 ShieldRVt-PT-005A-CTLFireability-05 69833 m, 13966 m/sec, 340745 t fired, .

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22 CTL EXCL 6/1725 4/32 ShieldRVt-PT-005A-CTLFireability-05 799566 m, 145946 m/sec, 4926334 t fired, .

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ShieldRVt-PT-005A-CTLFireability-10: CTL false CTL model checker
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22 CTL EXCL 11/1725 5/32 ShieldRVt-PT-005A-CTLFireability-05 1048562 m, 49799 m/sec, 8547244 t fired, .

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22 CTL EXCL 16/1725 5/32 ShieldRVt-PT-005A-CTLFireability-05 1048576 m, 2 m/sec, 11458204 t fired, .

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ShieldRVt-PT-005A-CTLFireability-11: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-12: CONJ false CTL model checker
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ShieldRVt-PT-005A-CTLFireability-05: DISJ false DISJ
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ShieldRVt-PT-005A-CTLFireability-09: CONJ false state space /ER
ShieldRVt-PT-005A-CTLFireability-10: CTL false CTL model checker
ShieldRVt-PT-005A-CTLFireability-11: CTL true CTL model checker
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ShieldRVt-PT-005A-CTLFireability-05: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-06: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-09: CONJ false state space /ER
ShieldRVt-PT-005A-CTLFireability-10: CTL false CTL model checker
ShieldRVt-PT-005A-CTLFireability-11: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-12: CONJ false CTL model checker
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ShieldRVt-PT-005A-CTLFireability-05: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-06: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-09: CONJ false state space /ER
ShieldRVt-PT-005A-CTLFireability-10: CTL false CTL model checker
ShieldRVt-PT-005A-CTLFireability-11: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-12: CONJ false CTL model checker
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11 CTL EXCL 15/3430 5/32 ShieldRVt-PT-005A-CTLFireability-02 1048576 m, 15 m/sec, 12904254 t fired, .

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-005A-CTLFireability-00: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-02: CONJ true CONJ
ShieldRVt-PT-005A-CTLFireability-03: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-04: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-05: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-06: DISJ false DISJ
ShieldRVt-PT-005A-CTLFireability-09: CONJ false state space /ER
ShieldRVt-PT-005A-CTLFireability-10: CTL false CTL model checker
ShieldRVt-PT-005A-CTLFireability-11: CTL true CTL model checker
ShieldRVt-PT-005A-CTLFireability-12: CONJ false CTL model checker
ShieldRVt-PT-005A-CTLFireability-13: CTL false CTL model checker
ShieldRVt-PT-005A-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-005A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVt-PT-005A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976500242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-005A.tgz
mv ShieldRVt-PT-005A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;