Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976400186.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVt-PT-001B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976400186
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 6.1K Feb 25 23:13 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 23:13 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 23:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 23:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Feb 25 23:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 101K Feb 25 23:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.8K Feb 25 23:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 25 23:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-00
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-01
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-02
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-03
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-04
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-05
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-06
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-07
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-08
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-09
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-10
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-11
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-12
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-13
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-14
FORMULA_NAME ShieldRVt-PT-001B-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679244080544

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-001B
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:41:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 16:41:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:41:22] [INFO ] Load time of PNML (sax parser for PT used): 25 ms
[2023-03-19 16:41:22] [INFO ] Transformed 53 places.
[2023-03-19 16:41:22] [INFO ] Transformed 53 transitions.
[2023-03-19 16:41:22] [INFO ] Found NUPN structural information;
[2023-03-19 16:41:22] [INFO ] Parsed PT model containing 53 places and 53 transitions and 124 arcs in 79 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Initial state reduction rules removed 2 formulas.
FORMULA ShieldRVt-PT-001B-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVt-PT-001B-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 48 out of 53 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 53/53 places, 53/53 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 52 transition count 52
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 52 transition count 52
Applied a total of 2 rules in 12 ms. Remains 52 /53 variables (removed 1) and now considering 52/53 (removed 1) transitions.
// Phase 1: matrix 52 rows 52 cols
[2023-03-19 16:41:22] [INFO ] Computed 5 place invariants in 4 ms
[2023-03-19 16:41:22] [INFO ] Implicit Places using invariants in 130 ms returned []
[2023-03-19 16:41:22] [INFO ] Invariant cache hit.
[2023-03-19 16:41:22] [INFO ] Implicit Places using invariants and state equation in 71 ms returned []
Implicit Place search using SMT with State Equation took 225 ms to find 0 implicit places.
[2023-03-19 16:41:22] [INFO ] Invariant cache hit.
[2023-03-19 16:41:22] [INFO ] Dead Transitions using invariants and state equation in 65 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 52/53 places, 52/53 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 303 ms. Remains : 52/53 places, 52/53 transitions.
Support contains 48 out of 52 places after structural reductions.
[2023-03-19 16:41:22] [INFO ] Flatten gal took : 19 ms
[2023-03-19 16:41:22] [INFO ] Flatten gal took : 6 ms
[2023-03-19 16:41:22] [INFO ] Input system was already deterministic with 52 transitions.
Incomplete random walk after 10000 steps, including 12 resets, run finished after 446 ms. (steps per millisecond=22 ) properties (out of 51) seen :40
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 102 ms. (steps per millisecond=98 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 104 ms. (steps per millisecond=96 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 11) seen :2
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 11 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 6 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
[2023-03-19 16:41:23] [INFO ] Invariant cache hit.
[2023-03-19 16:41:24] [INFO ] [Real]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-19 16:41:24] [INFO ] After 62ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:7
[2023-03-19 16:41:24] [INFO ] [Nat]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-19 16:41:24] [INFO ] After 25ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :3
[2023-03-19 16:41:24] [INFO ] Deduced a trap composed of 11 places in 24 ms of which 4 ms to minimize.
[2023-03-19 16:41:24] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 29 ms
[2023-03-19 16:41:24] [INFO ] Deduced a trap composed of 14 places in 29 ms of which 0 ms to minimize.
[2023-03-19 16:41:24] [INFO ] Deduced a trap composed of 18 places in 24 ms of which 1 ms to minimize.
[2023-03-19 16:41:24] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 67 ms
[2023-03-19 16:41:24] [INFO ] After 132ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :2
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-03-19 16:41:24] [INFO ] After 193ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :2
Fused 9 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 3 ms.
Support contains 10 out of 52 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 52/52 places, 52/52 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 52 transition count 39
Reduce places removed 13 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 1 with 15 rules applied. Total rules applied 28 place count 39 transition count 37
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 2 rules applied. Total rules applied 30 place count 38 transition count 36
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 31 place count 37 transition count 36
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 31 place count 37 transition count 34
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 35 place count 35 transition count 34
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 36 place count 34 transition count 33
Iterating global reduction 4 with 1 rules applied. Total rules applied 37 place count 34 transition count 33
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 4 with 18 rules applied. Total rules applied 55 place count 25 transition count 24
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 57 place count 24 transition count 24
Free-agglomeration rule applied 2 times.
Iterating global reduction 4 with 2 rules applied. Total rules applied 59 place count 24 transition count 22
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 61 place count 22 transition count 22
Applied a total of 61 rules in 12 ms. Remains 22 /52 variables (removed 30) and now considering 22/52 (removed 30) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12 ms. Remains : 22/52 places, 22/52 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=136 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 2) seen :0
Probably explored full state space saw : 211 states, properties seen :1
Probabilistic random walk after 784 steps, saw 211 distinct states, run finished after 17 ms. (steps per millisecond=46 ) properties seen :1
Explored full state space saw : 211 states, properties seen :0
Exhaustive walk after 784 steps, saw 211 distinct states, run finished after 2 ms. (steps per millisecond=392 ) properties seen :0
Successfully simplified 8 atomic propositions for a total of 14 simplifications.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 52 transitions.
Support contains 39 out of 52 places (down from 41) after GAL structural reductions.
Computed a total of 16 stabilizing places and 16 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 42 transition count 42
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 23 place count 40 transition count 40
Iterating global reduction 0 with 1 rules applied. Total rules applied 24 place count 40 transition count 40
Applied a total of 24 rules in 5 ms. Remains 40 /52 variables (removed 12) and now considering 40/52 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 40/52 places, 40/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 42 transition count 42
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Applied a total of 22 rules in 2 ms. Remains 41 /52 variables (removed 11) and now considering 41/52 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 41/52 places, 41/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 44 transition count 44
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 44 transition count 44
Applied a total of 16 rules in 2 ms. Remains 44 /52 variables (removed 8) and now considering 44/52 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 44/52 places, 44/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 47 transition count 47
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 47 transition count 47
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 46 transition count 46
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 46 transition count 46
Applied a total of 12 rules in 3 ms. Remains 46 /52 variables (removed 6) and now considering 46/52 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 46/52 places, 46/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 42 transition count 42
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Applied a total of 22 rules in 3 ms. Remains 41 /52 variables (removed 11) and now considering 41/52 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 41/52 places, 41/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 42 transition count 42
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 23 place count 40 transition count 40
Iterating global reduction 0 with 1 rules applied. Total rules applied 24 place count 40 transition count 40
Applied a total of 24 rules in 3 ms. Remains 40 /52 variables (removed 12) and now considering 40/52 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 40/52 places, 40/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 45 transition count 45
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 45 transition count 45
Applied a total of 14 rules in 1 ms. Remains 45 /52 variables (removed 7) and now considering 45/52 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/52 places, 45/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 44 transition count 44
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 44 transition count 44
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 43 transition count 43
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 43 transition count 43
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 42 transition count 42
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 42 transition count 42
Applied a total of 20 rules in 4 ms. Remains 42 /52 variables (removed 10) and now considering 42/52 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 42/52 places, 42/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 45 transition count 45
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 45 transition count 45
Applied a total of 14 rules in 2 ms. Remains 45 /52 variables (removed 7) and now considering 45/52 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/52 places, 45/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 43 transition count 43
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 43 transition count 43
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 42 transition count 42
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Applied a total of 22 rules in 3 ms. Remains 41 /52 variables (removed 11) and now considering 41/52 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 41/52 places, 41/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 42 transition count 42
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 23 place count 40 transition count 40
Iterating global reduction 0 with 1 rules applied. Total rules applied 24 place count 40 transition count 40
Applied a total of 24 rules in 4 ms. Remains 40 /52 variables (removed 12) and now considering 40/52 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 40/52 places, 40/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 10 places :
Symmetric choice reduction at 0 with 10 rule applications. Total rules 10 place count 42 transition count 42
Iterating global reduction 0 with 10 rules applied. Total rules applied 20 place count 42 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 41 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 41 transition count 41
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 23 place count 40 transition count 40
Iterating global reduction 0 with 1 rules applied. Total rules applied 24 place count 40 transition count 40
Applied a total of 24 rules in 3 ms. Remains 40 /52 variables (removed 12) and now considering 40/52 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 40/52 places, 40/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 44 transition count 44
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 44 transition count 44
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 43 transition count 43
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 43 transition count 43
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 42 transition count 42
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 42 transition count 42
Applied a total of 20 rules in 3 ms. Remains 42 /52 variables (removed 10) and now considering 42/52 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 42/52 places, 42/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 52/52 places, 52/52 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 51 transition count 42
Reduce places removed 9 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 10 rules applied. Total rules applied 19 place count 42 transition count 41
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 20 place count 41 transition count 41
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 20 place count 41 transition count 36
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 30 place count 36 transition count 36
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 36 place count 30 transition count 30
Iterating global reduction 3 with 6 rules applied. Total rules applied 42 place count 30 transition count 30
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 42 place count 30 transition count 29
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 44 place count 29 transition count 29
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 56 place count 23 transition count 23
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 57 place count 22 transition count 22
Applied a total of 57 rules in 8 ms. Remains 22 /52 variables (removed 30) and now considering 22/52 (removed 30) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 22/52 places, 22/52 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:41:24] [INFO ] Input system was already deterministic with 22 transitions.
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:41:24] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:41:24] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 16:41:24] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 52 places, 52 transitions and 122 arcs took 1 ms.
Total runtime 2581 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldRVt-PT-001B
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/363
CTLFireability

FORMULA ShieldRVt-PT-001B-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-001B-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679244085283

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/363/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/363/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/363/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 9 (type EXCL) for 6 ShieldRVt-PT-001B-CTLFireability-02
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 ShieldRVt-PT-001B-CTLFireability-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for ShieldRVt-PT-001B-CTLFireability-00
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 9 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-02
lola: result : false
lola: markings : 1317
lola: fired transitions : 2729
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 32 (type EXCL) for 31 ShieldRVt-PT-001B-CTLFireability-09
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 32 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-09
lola: result : true
lola: markings : 898
lola: fired transitions : 2141
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 23 (type EXCL) for 22 ShieldRVt-PT-001B-CTLFireability-06
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:665
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:665
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:665
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:664
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:674
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 23 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-06
lola: result : false
lola: markings : 20511
lola: fired transitions : 132724
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 40 ShieldRVt-PT-001B-CTLFireability-13
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-13
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 ShieldRVt-PT-001B-CTLFireability-12
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-12
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 ShieldRVt-PT-001B-CTLFireability-11
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 ShieldRVt-PT-001B-CTLFireability-08
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-08
lola: result : true
lola: markings : 109
lola: fired transitions : 116
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 ShieldRVt-PT-001B-CTLFireability-07
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-07
lola: result : false
lola: markings : 1317
lola: fired transitions : 4046
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 ShieldRVt-PT-001B-CTLFireability-05
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-05
lola: result : true
lola: markings : 1317
lola: fired transitions : 2729
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 ShieldRVt-PT-001B-CTLFireability-04
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-04
lola: result : true
lola: markings : 20511
lola: fired transitions : 107470
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 ShieldRVt-PT-001B-CTLFireability-03
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-03
lola: result : false
lola: markings : 5878
lola: fired transitions : 19776
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ShieldRVt-PT-001B-CTLFireability-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-01
lola: result : true
lola: markings : 578
lola: fired transitions : 1621
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 51 ShieldRVt-PT-001B-CTLFireability-14
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for ShieldRVt-PT-001B-CTLFireability-14
lola: result : false
lola: markings : 35
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-001B-CTLFireability-00: INITIAL false preprocessing
ShieldRVt-PT-001B-CTLFireability-01: CTL true CTL model checker
ShieldRVt-PT-001B-CTLFireability-02: CONJ false CTL model checker
ShieldRVt-PT-001B-CTLFireability-03: CTL false CTL model checker
ShieldRVt-PT-001B-CTLFireability-04: CTL true CTL model checker
ShieldRVt-PT-001B-CTLFireability-05: CTL true CTL model checker
ShieldRVt-PT-001B-CTLFireability-06: CTL false CTL model checker
ShieldRVt-PT-001B-CTLFireability-07: CTL false CTL model checker
ShieldRVt-PT-001B-CTLFireability-08: CTL true CTL model checker
ShieldRVt-PT-001B-CTLFireability-09: CTL true CTL model checker
ShieldRVt-PT-001B-CTLFireability-11: EXEG false state space /EXEG
ShieldRVt-PT-001B-CTLFireability-12: CTL true CTL model checker
ShieldRVt-PT-001B-CTLFireability-13: DISJ true CTL model checker
ShieldRVt-PT-001B-CTLFireability-14: SP ECTL true LTL model checker


Time elapsed: 1 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-001B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVt-PT-001B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976400186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-001B.tgz
mv ShieldRVt-PT-001B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;