Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976200034.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVs-PT-003A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976200034
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 6.4K Feb 26 18:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 26 18:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 26 18:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 26 18:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 17:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 17:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 18:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 26 18:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Feb 26 18:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 26 18:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 19K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-00
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-01
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-02
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-03
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-04
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-05
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-06
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-07
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-08
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-09
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-10
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-11
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-12
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-13
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-14
FORMULA_NAME ShieldRVs-PT-003A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679242082342

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVs-PT-003A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:08:04] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 16:08:04] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:08:04] [INFO ] Load time of PNML (sax parser for PT used): 33 ms
[2023-03-19 16:08:04] [INFO ] Transformed 45 places.
[2023-03-19 16:08:04] [INFO ] Transformed 60 transitions.
[2023-03-19 16:08:04] [INFO ] Found NUPN structural information;
[2023-03-19 16:08:04] [INFO ] Parsed PT model containing 45 places and 60 transitions and 276 arcs in 106 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 40 out of 45 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 11 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
// Phase 1: matrix 60 rows 45 cols
[2023-03-19 16:08:04] [INFO ] Computed 13 place invariants in 7 ms
[2023-03-19 16:08:04] [INFO ] Implicit Places using invariants in 149 ms returned []
[2023-03-19 16:08:04] [INFO ] Invariant cache hit.
[2023-03-19 16:08:04] [INFO ] Implicit Places using invariants and state equation in 59 ms returned []
Implicit Place search using SMT with State Equation took 235 ms to find 0 implicit places.
[2023-03-19 16:08:04] [INFO ] Invariant cache hit.
[2023-03-19 16:08:04] [INFO ] Dead Transitions using invariants and state equation in 66 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 316 ms. Remains : 45/45 places, 60/60 transitions.
Support contains 40 out of 45 places after structural reductions.
[2023-03-19 16:08:04] [INFO ] Flatten gal took : 28 ms
[2023-03-19 16:08:04] [INFO ] Flatten gal took : 10 ms
[2023-03-19 16:08:04] [INFO ] Input system was already deterministic with 60 transitions.
Incomplete random walk after 10000 steps, including 195 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 52) seen :51
Incomplete Best-First random walk after 10001 steps, including 54 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 16:08:05] [INFO ] Invariant cache hit.
[2023-03-19 16:08:05] [INFO ] [Real]Absence check using 13 positive place invariants in 4 ms returned sat
[2023-03-19 16:08:05] [INFO ] After 43ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
FORMULA ShieldRVs-PT-003A-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 7 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 7 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 44 transition count 59
Applied a total of 2 rules in 11 ms. Remains 44 /45 variables (removed 1) and now considering 59/60 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 44/45 places, 59/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 6 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 44 transition count 59
Applied a total of 2 rules in 6 ms. Remains 44 /45 variables (removed 1) and now considering 59/60 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 44/45 places, 59/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 6 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 43 transition count 58
Applied a total of 2 rules in 6 ms. Remains 43 /45 variables (removed 2) and now considering 58/60 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 43/45 places, 58/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 58 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 45 /45 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 45/45 places, 60/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 45/45 places, 60/60 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 44 transition count 59
Applied a total of 2 rules in 5 ms. Remains 44 /45 variables (removed 1) and now considering 59/60 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 44/45 places, 59/60 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:08:05] [INFO ] Input system was already deterministic with 59 transitions.
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 12 ms
[2023-03-19 16:08:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:08:05] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-19 16:08:05] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 45 places, 60 transitions and 276 arcs took 1 ms.
Total runtime 1445 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldRVs-PT-003A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA ShieldRVs-PT-003A-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-003A-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679242106045

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 9 (type EXCL) for 6 ShieldRVs-PT-003A-CTLFireability-02
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 9 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-02
lola: result : false
lola: markings : 193788
lola: fired transitions : 450853
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 ShieldRVs-PT-003A-CTLFireability-14
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-14
lola: result : false
lola: markings : 49
lola: fired transitions : 97
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 ShieldRVs-PT-003A-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-13
lola: result : true
lola: markings : 160
lola: fired transitions : 206
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 35 ShieldRVs-PT-003A-CTLFireability-10
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 35 ShieldRVs-PT-003A-CTLFireability-10
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-10
lola: result : false
lola: markings : 48
lola: fired transitions : 47
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 28 ShieldRVs-PT-003A-CTLFireability-09
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-09
lola: result : true
lola: markings : 5746
lola: fired transitions : 54691
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 ShieldRVs-PT-003A-CTLFireability-07
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-07
lola: result : false
lola: markings : 48
lola: fired transitions : 96
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 ShieldRVs-PT-003A-CTLFireability-06
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-06
lola: result : false
lola: markings : 912
lola: fired transitions : 1412
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 ShieldRVs-PT-003A-CTLFireability-05
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-05
lola: result : true
lola: markings : 322163
lola: fired transitions : 866224
lola: time used : 0.000000
lola: memory pages used : 2
lola: LAUNCH task # 14 (type EXCL) for 13 ShieldRVs-PT-003A-CTLFireability-04
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-04
lola: result : true
lola: markings : 5795
lola: fired transitions : 29783
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 6 ShieldRVs-PT-003A-CTLFireability-02
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-02
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 ShieldRVs-PT-003A-CTLFireability-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-12
lola: result : false
lola: markings : 45
lola: fired transitions : 45
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ShieldRVs-PT-003A-CTLFireability-01
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-01
lola: result : false
lola: markings : 98319
lola: fired transitions : 453239
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 ShieldRVs-PT-003A-CTLFireability-15
lola: time limit : 899 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVs-PT-003A-CTLFireability-01: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-02: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-04: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-05: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-06: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-07: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-09: DISJ true CTL model checker
ShieldRVs-PT-003A-CTLFireability-10: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-12: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-13: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVs-PT-003A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldRVs-PT-003A-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldRVs-PT-003A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldRVs-PT-003A-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 4/899 3/32 ShieldRVs-PT-003A-CTLFireability-15 732614 m, 146522 m/sec, 5682266 t fired, .

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lola: FINISHED task # 55 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-15
lola: result : false
lola: markings : 1094197
lola: fired transitions : 8499945
lola: time used : 5.000000
lola: memory pages used : 5
lola: LAUNCH task # 1 (type EXCL) for 0 ShieldRVs-PT-003A-CTLFireability-00
lola: time limit : 1197 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVs-PT-003A-CTLFireability-01: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-02: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-04: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-05: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-06: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-07: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-09: DISJ true CTL model checker
ShieldRVs-PT-003A-CTLFireability-10: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-12: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-13: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-14: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVs-PT-003A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldRVs-PT-003A-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldRVs-PT-003A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 4/1197 2/32 ShieldRVs-PT-003A-CTLFireability-00 474014 m, 94802 m/sec, 4171039 t fired, .

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lola: FINISHED task # 1 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-00
lola: result : false
lola: markings : 1093954
lola: fired transitions : 9880608
lola: time used : 7.000000
lola: memory pages used : 5
lola: LAUNCH task # 26 (type EXCL) for 25 ShieldRVs-PT-003A-CTLFireability-08
lola: time limit : 1793 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVs-PT-003A-CTLFireability-00: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-01: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-02: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-04: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-05: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-06: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-07: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-09: DISJ true CTL model checker
ShieldRVs-PT-003A-CTLFireability-10: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-12: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-13: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-14: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVs-PT-003A-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
ShieldRVs-PT-003A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 2/1793 2/32 ShieldRVs-PT-003A-CTLFireability-08 290454 m, 58090 m/sec, 1477186 t fired, .

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lola: FINISHED task # 26 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-08
lola: result : false
lola: markings : 1429463
lola: fired transitions : 7561248
lola: time used : 7.000000
lola: memory pages used : 6
lola: LAUNCH task # 43 (type EXCL) for 42 ShieldRVs-PT-003A-CTLFireability-11
lola: time limit : 3579 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for ShieldRVs-PT-003A-CTLFireability-11
lola: result : true
lola: markings : 49
lola: fired transitions : 55
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVs-PT-003A-CTLFireability-00: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-01: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-02: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-04: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-05: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-06: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-07: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-08: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-09: DISJ true CTL model checker
ShieldRVs-PT-003A-CTLFireability-10: DISJ false DISJ
ShieldRVs-PT-003A-CTLFireability-11: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-12: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-13: CTL true CTL model checker
ShieldRVs-PT-003A-CTLFireability-14: CTL false CTL model checker
ShieldRVs-PT-003A-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-003A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVs-PT-003A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976200034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-003A.tgz
mv ShieldRVs-PT-003A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;