Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976100010.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVs-PT-001B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976100010
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 7.9K Feb 26 18:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 26 18:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 26 18:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 18:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Feb 26 18:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 26 18:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 18:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 111K Feb 26 18:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 13K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-00
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-01
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-02
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-03
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-04
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-05
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-06
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-07
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-08
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-09
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-10
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-11
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-12
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-13
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-14
FORMULA_NAME ShieldRVs-PT-001B-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679242064888

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVs-PT-001B
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:07:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 16:07:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:07:46] [INFO ] Load time of PNML (sax parser for PT used): 26 ms
[2023-03-19 16:07:46] [INFO ] Transformed 43 places.
[2023-03-19 16:07:46] [INFO ] Transformed 48 transitions.
[2023-03-19 16:07:46] [INFO ] Found NUPN structural information;
[2023-03-19 16:07:46] [INFO ] Parsed PT model containing 43 places and 48 transitions and 144 arcs in 86 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Initial state reduction rules removed 1 formulas.
FORMULA ShieldRVs-PT-001B-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 40 out of 43 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Applied a total of 0 rules in 10 ms. Remains 43 /43 variables (removed 0) and now considering 48/48 (removed 0) transitions.
// Phase 1: matrix 48 rows 43 cols
[2023-03-19 16:07:46] [INFO ] Computed 5 place invariants in 6 ms
[2023-03-19 16:07:46] [INFO ] Implicit Places using invariants in 159 ms returned []
[2023-03-19 16:07:46] [INFO ] Invariant cache hit.
[2023-03-19 16:07:46] [INFO ] Implicit Places using invariants and state equation in 72 ms returned []
Implicit Place search using SMT with State Equation took 259 ms to find 0 implicit places.
[2023-03-19 16:07:46] [INFO ] Invariant cache hit.
[2023-03-19 16:07:46] [INFO ] Dead Transitions using invariants and state equation in 62 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 334 ms. Remains : 43/43 places, 48/48 transitions.
Support contains 40 out of 43 places after structural reductions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 22 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 10 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 48 transitions.
Incomplete random walk after 10000 steps, including 23 resets, run finished after 466 ms. (steps per millisecond=21 ) properties (out of 59) seen :49
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10000 steps, including 16 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 7 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-19 16:07:48] [INFO ] Invariant cache hit.
[2023-03-19 16:07:48] [INFO ] [Real]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-19 16:07:48] [INFO ] After 57ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0 real:3
[2023-03-19 16:07:48] [INFO ] [Nat]Absence check using 5 positive place invariants in 1 ms returned sat
[2023-03-19 16:07:48] [INFO ] After 49ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 7 atomic propositions for a total of 15 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA ShieldRVs-PT-001B-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 6 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 5 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 48 transitions.
Computed a total of 12 stabilizing places and 12 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 37 transition count 42
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 37 transition count 42
Applied a total of 12 rules in 5 ms. Remains 37 /43 variables (removed 6) and now considering 42/48 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 37/43 places, 42/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 4 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 39 transition count 44
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 39 transition count 44
Applied a total of 8 rules in 1 ms. Remains 39 /43 variables (removed 4) and now considering 44/48 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 39/43 places, 44/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 42 transition count 44
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 39 transition count 44
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 6 place count 39 transition count 39
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 16 place count 34 transition count 39
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 22 place count 28 transition count 33
Iterating global reduction 2 with 6 rules applied. Total rules applied 28 place count 28 transition count 33
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 28 place count 28 transition count 32
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 30 place count 27 transition count 32
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 38 place count 23 transition count 28
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 39 place count 22 transition count 27
Applied a total of 39 rules in 15 ms. Remains 22 /43 variables (removed 21) and now considering 27/48 (removed 21) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 22/43 places, 27/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 27 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 37 transition count 42
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 37 transition count 42
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 36 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 36 transition count 41
Applied a total of 14 rules in 2 ms. Remains 36 /43 variables (removed 7) and now considering 41/48 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 36/43 places, 41/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 42 transition count 42
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 37 transition count 42
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 10 place count 37 transition count 37
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 20 place count 32 transition count 37
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 26 place count 26 transition count 31
Iterating global reduction 2 with 6 rules applied. Total rules applied 32 place count 26 transition count 31
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 32 place count 26 transition count 29
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 36 place count 24 transition count 29
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 48 place count 18 transition count 23
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 49 place count 17 transition count 22
Applied a total of 49 rules in 6 ms. Remains 17 /43 variables (removed 26) and now considering 22/48 (removed 26) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 17/43 places, 22/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 42 transition count 44
Reduce places removed 3 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 4 rules applied. Total rules applied 7 place count 39 transition count 43
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 8 place count 38 transition count 43
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 4 Pre rules applied. Total rules applied 8 place count 38 transition count 39
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 16 place count 34 transition count 39
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 21 place count 29 transition count 34
Iterating global reduction 3 with 5 rules applied. Total rules applied 26 place count 29 transition count 34
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 26 place count 29 transition count 32
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 30 place count 27 transition count 32
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 3 with 12 rules applied. Total rules applied 42 place count 21 transition count 26
Applied a total of 42 rules in 6 ms. Remains 21 /43 variables (removed 22) and now considering 26/48 (removed 22) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 21/43 places, 26/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 26 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 38 transition count 43
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 38 transition count 43
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 37 transition count 42
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 37 transition count 42
Applied a total of 12 rules in 2 ms. Remains 37 /43 variables (removed 6) and now considering 42/48 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/43 places, 42/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 43 transition count 43
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 38 transition count 43
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 10 place count 38 transition count 40
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 16 place count 35 transition count 40
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 23 place count 28 transition count 33
Iterating global reduction 2 with 7 rules applied. Total rules applied 30 place count 28 transition count 33
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 30 place count 28 transition count 30
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 36 place count 25 transition count 30
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 46 place count 20 transition count 25
Applied a total of 46 rules in 6 ms. Remains 20 /43 variables (removed 23) and now considering 25/48 (removed 23) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 20/43 places, 25/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 25 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 42 transition count 42
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 37 transition count 42
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 10 place count 37 transition count 37
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 20 place count 32 transition count 37
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 27 place count 25 transition count 30
Iterating global reduction 2 with 7 rules applied. Total rules applied 34 place count 25 transition count 30
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 34 place count 25 transition count 27
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 40 place count 22 transition count 27
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 52 place count 16 transition count 21
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 53 place count 15 transition count 20
Applied a total of 53 rules in 6 ms. Remains 15 /43 variables (removed 28) and now considering 20/48 (removed 28) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 15/43 places, 20/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 36 transition count 41
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 36 transition count 41
Applied a total of 14 rules in 1 ms. Remains 36 /43 variables (removed 7) and now considering 41/48 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 36/43 places, 41/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 45
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 45
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 39 transition count 44
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 39 transition count 44
Applied a total of 8 rules in 2 ms. Remains 39 /43 variables (removed 4) and now considering 44/48 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 39/43 places, 44/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 44 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 42 transition count 42
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 37 transition count 42
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 10 place count 37 transition count 37
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 20 place count 32 transition count 37
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 27 place count 25 transition count 30
Iterating global reduction 2 with 7 rules applied. Total rules applied 34 place count 25 transition count 30
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 34 place count 25 transition count 28
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 38 place count 23 transition count 28
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 50 place count 17 transition count 22
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 51 place count 16 transition count 21
Applied a total of 51 rules in 6 ms. Remains 16 /43 variables (removed 27) and now considering 21/48 (removed 27) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 16/43 places, 21/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 21 transitions.
Finished random walk after 8 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=8 )
FORMULA ShieldRVs-PT-001B-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 45
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 45
Applied a total of 6 rules in 2 ms. Remains 40 /43 variables (removed 3) and now considering 45/48 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 40/43 places, 45/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 48/48 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 37 transition count 42
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 37 transition count 42
Applied a total of 12 rules in 2 ms. Remains 37 /43 variables (removed 6) and now considering 42/48 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 37/43 places, 42/48 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:48] [INFO ] Input system was already deterministic with 42 transitions.
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:48] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 16:07:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 43 places, 48 transitions and 144 arcs took 0 ms.
Total runtime 2323 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldRVs-PT-001B
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA ShieldRVs-PT-001B-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001B-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679242069087

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 8 (type EXCL) for 3 ShieldRVs-PT-001B-CTLFireability-01
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 8 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-01
lola: result : false
lola: markings : 235
lola: fired transitions : 1259
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 ShieldRVs-PT-001B-CTLFireability-06
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 20 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-06
lola: result : false
lola: markings : 43
lola: fired transitions : 51
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 ShieldRVs-PT-001B-CTLFireability-03
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-03
lola: result : true
lola: markings : 72
lola: fired transitions : 109
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 ShieldRVs-PT-001B-CTLFireability-09
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 29 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-09
lola: result : false
lola: markings : 20
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 ShieldRVs-PT-001B-CTLFireability-08
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 26 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-08
lola: result : true
lola: markings : 198
lola: fired transitions : 468
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 ShieldRVs-PT-001B-CTLFireability-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 39 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-12
lola: result : false
lola: markings : 707
lola: fired transitions : 1628
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 31 ShieldRVs-PT-001B-CTLFireability-11
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-11
lola: result : false
lola: markings : 20
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 31 ShieldRVs-PT-001B-CTLFireability-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-11
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 ShieldRVs-PT-001B-CTLFireability-07
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 23 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-07
lola: result : false
lola: markings : 379
lola: fired transitions : 784
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 6 (type EXCL) for 3 ShieldRVs-PT-001B-CTLFireability-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 6 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-01
lola: result : false
lola: markings : 3596
lola: fired transitions : 11341
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 ShieldRVs-PT-001B-CTLFireability-15
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-15
lola: result : true
lola: markings : 48
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 ShieldRVs-PT-001B-CTLFireability-14
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-14
lola: result : true
lola: markings : 51
lola: fired transitions : 51
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ShieldRVs-PT-001B-CTLFireability-00
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-00
lola: result : true
lola: markings : 2260
lola: fired transitions : 16813
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 ShieldRVs-PT-001B-CTLFireability-02
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-02
lola: result : false
lola: markings : 502
lola: fired transitions : 2192
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 ShieldRVs-PT-001B-CTLFireability-04
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for ShieldRVs-PT-001B-CTLFireability-04
lola: result : true
lola: markings : 205
lola: fired transitions : 1489
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVs-PT-001B-CTLFireability-00: CTL true CTL model checker
ShieldRVs-PT-001B-CTLFireability-01: DISJ false DISJ
ShieldRVs-PT-001B-CTLFireability-02: CTL false CTL model checker
ShieldRVs-PT-001B-CTLFireability-03: CTL true CTL model checker
ShieldRVs-PT-001B-CTLFireability-04: CTL true CTL model checker
ShieldRVs-PT-001B-CTLFireability-06: AGEF false tscc_search
ShieldRVs-PT-001B-CTLFireability-07: CTL false CTL model checker
ShieldRVs-PT-001B-CTLFireability-08: CTL true CTL model checker
ShieldRVs-PT-001B-CTLFireability-09: CTL false CTL model checker
ShieldRVs-PT-001B-CTLFireability-11: DISJ true CTL model checker
ShieldRVs-PT-001B-CTLFireability-12: CTL false CTL model checker
ShieldRVs-PT-001B-CTLFireability-14: CTL true CTL model checker
ShieldRVs-PT-001B-CTLFireability-15: CTL true CTL model checker


Time elapsed: 1 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-001B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVs-PT-001B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976100010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-001B.tgz
mv ShieldRVs-PT-001B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;