Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976100002.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldRVs-PT-001A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976100002
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 6.6K Feb 26 18:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 18:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 26 18:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 18:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 17:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 17:01 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 18:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 133K Feb 26 18:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 26 18:21 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 18:21 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:01 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:01 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 6.8K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-00
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-01
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-02
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-03
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-04
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-05
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-06
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-07
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-08
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-09
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-10
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-11
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-12
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-13
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-14
FORMULA_NAME ShieldRVs-PT-001A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679242064187

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVs-PT-001A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 16:07:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 16:07:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 16:07:46] [INFO ] Load time of PNML (sax parser for PT used): 29 ms
[2023-03-19 16:07:46] [INFO ] Transformed 17 places.
[2023-03-19 16:07:46] [INFO ] Transformed 22 transitions.
[2023-03-19 16:07:46] [INFO ] Found NUPN structural information;
[2023-03-19 16:07:46] [INFO ] Parsed PT model containing 17 places and 22 transitions and 92 arcs in 105 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Initial state reduction rules removed 2 formulas.
FORMULA ShieldRVs-PT-001A-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVs-PT-001A-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 17 out of 17 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 11 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
// Phase 1: matrix 22 rows 17 cols
[2023-03-19 16:07:46] [INFO ] Computed 5 place invariants in 6 ms
[2023-03-19 16:07:46] [INFO ] Implicit Places using invariants in 155 ms returned []
[2023-03-19 16:07:46] [INFO ] Invariant cache hit.
[2023-03-19 16:07:46] [INFO ] Implicit Places using invariants and state equation in 40 ms returned []
Implicit Place search using SMT with State Equation took 227 ms to find 0 implicit places.
[2023-03-19 16:07:46] [INFO ] Invariant cache hit.
[2023-03-19 16:07:46] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 283 ms. Remains : 17/17 places, 22/22 transitions.
Support contains 17 out of 17 places after structural reductions.
[2023-03-19 16:07:46] [INFO ] Flatten gal took : 21 ms
[2023-03-19 16:07:46] [INFO ] Flatten gal took : 8 ms
[2023-03-19 16:07:46] [INFO ] Input system was already deterministic with 22 transitions.
Incomplete random walk after 10000 steps, including 174 resets, run finished after 384 ms. (steps per millisecond=26 ) properties (out of 34) seen :30
Incomplete Best-First random walk after 10000 steps, including 91 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-19 16:07:47] [INFO ] Invariant cache hit.
[2023-03-19 16:07:47] [INFO ] [Real]Absence check using 5 positive place invariants in 2 ms returned sat
[2023-03-19 16:07:47] [INFO ] After 74ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 14 simplifications.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 7 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 6 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
FORMULA ShieldRVs-PT-001A-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVs-PT-001A-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 6 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 9 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Finished random walk after 6 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=6 )
FORMULA ShieldRVs-PT-001A-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 16 transition count 21
Applied a total of 2 rules in 5 ms. Remains 16 /17 variables (removed 1) and now considering 21/22 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 16/17 places, 21/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Finished random walk after 4 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=4 )
FORMULA ShieldRVs-PT-001A-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 3 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 22/22 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 22/22 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 22/22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 1 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Input system was already deterministic with 22 transitions.
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Flatten gal took : 2 ms
[2023-03-19 16:07:47] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 16:07:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 17 places, 22 transitions and 92 arcs took 1 ms.
Total runtime 1764 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldRVs-PT-001A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA ShieldRVs-PT-001A-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVs-PT-001A-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679242068169

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 8 (type EXCL) for 7 ShieldRVs-PT-001A-CTLFireability-04
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 8 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-04
lola: result : true
lola: markings : 41
lola: fired transitions : 169
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 20 (type EXCL) for 19 ShieldRVs-PT-001A-CTLFireability-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 20 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-10
lola: result : false
lola: markings : 2
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 30 (type EXCL) for 29 ShieldRVs-PT-001A-CTLFireability-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 30 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-13
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 22 ShieldRVs-PT-001A-CTLFireability-11
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 27 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-11
lola: result : false
lola: markings : 19
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 ShieldRVs-PT-001A-CTLFireability-08
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-08
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 14 (type EXCL) for 13 ShieldRVs-PT-001A-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 14 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-06
lola: result : false
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 3 (type EXCL) for 0 ShieldRVs-PT-001A-CTLFireability-01
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 3 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-01
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 ShieldRVs-PT-001A-CTLFireability-05
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-05
lola: result : false
lola: markings : 12
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 36 (type EXCL) for 35 ShieldRVs-PT-001A-CTLFireability-15
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-15
lola: result : true
lola: markings : 164
lola: fired transitions : 301
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 ShieldRVs-PT-001A-CTLFireability-14
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-14
lola: result : true
lola: markings : 21
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 5 (type EXCL) for 0 ShieldRVs-PT-001A-CTLFireability-01
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 5 (type EXCL) for ShieldRVs-PT-001A-CTLFireability-01
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVs-PT-001A-CTLFireability-01: DISJ false DISJ
ShieldRVs-PT-001A-CTLFireability-04: CTL true CTL model checker
ShieldRVs-PT-001A-CTLFireability-05: CTL false CTL model checker
ShieldRVs-PT-001A-CTLFireability-06: CTL false CTL model checker
ShieldRVs-PT-001A-CTLFireability-08: CTL false CTL model checker
ShieldRVs-PT-001A-CTLFireability-10: CTL false CTL model checker
ShieldRVs-PT-001A-CTLFireability-11: CONJ false CTL model checker
ShieldRVs-PT-001A-CTLFireability-13: CTL true CTL model checker
ShieldRVs-PT-001A-CTLFireability-14: CTL true CTL model checker
ShieldRVs-PT-001A-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-001A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldRVs-PT-001A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976100002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-001A.tgz
mv ShieldRVs-PT-001A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;