fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r422-tajo-167905975900410
Last Updated
May 14, 2023

About the Execution of LoLA for SieveSingleMsgMbox-PT-d1m06

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
888.983 105741.00 108429.00 45.00 TFTTFFFTFFFTTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r422-tajo-167905975900410.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is SieveSingleMsgMbox-PT-d1m06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r422-tajo-167905975900410
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 868K
-rw-r--r-- 1 mcc users 6.6K Feb 26 10:26 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 10:26 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 10:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 10:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 17:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 25 17:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 10:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 120K Feb 26 10:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 10:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 26 10:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 450K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679221980544

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SieveSingleMsgMbox-PT-d1m06
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT SieveSingleMsgMbox-PT-d1m06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679222086285

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,1036 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 4 (type EXCL) for 3 SieveSingleMsgMbox-PT-d1m06-CTLFireability-01
lola: time limit : 171 sec
lola: NOTDEADLOCKFREE
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 52 (type SKEL/SRCH) for 43 SieveSingleMsgMbox-PT-d1m06-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 52 (type SKEL/SRCH) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-13
lola: result : false
lola: markings : 6558
lola: fired transitions : 8501
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:776
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:735
lola: rewrite Frontend/Parser/formula_rewrite.k:695
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/211 5/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-01 723055 m, 144611 m/sec, 1480560 t fired, .

Time elapsed: 6 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/211 9/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-01 1487280 m, 152845 m/sec, 3193266 t fired, .

Time elapsed: 11 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 4 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-01
lola: result : false
lola: markings : 1551575
lola: fired transitions : 3331003
lola: time used : 10.000000
lola: memory pages used : 9
lola: LAUNCH task # 50 (type EXCL) for 49 SieveSingleMsgMbox-PT-d1m06-CTLFireability-15
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-15
lola: result : true
lola: markings : 5194
lola: fired transitions : 6517
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 SieveSingleMsgMbox-PT-d1m06-CTLFireability-11
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-11
lola: result : true
lola: markings : 2779
lola: fired transitions : 8604
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 SieveSingleMsgMbox-PT-d1m06-CTLFireability-09
lola: time limit : 256 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 4/256 4/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-09 590726 m, 118145 m/sec, 1225581 t fired, .

Time elapsed: 16 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 9/256 7/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-09 1208875 m, 123629 m/sec, 2526395 t fired, .

Time elapsed: 21 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 32 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-09
lola: result : false
lola: markings : 1551578
lola: fired transitions : 3332133
lola: time used : 12.000000
lola: memory pages used : 9
lola: LAUNCH task # 29 (type EXCL) for 28 SieveSingleMsgMbox-PT-d1m06-CTLFireability-08
lola: time limit : 275 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 2/275 2/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-08 270172 m, 54034 m/sec, 830066 t fired, .

Time elapsed: 26 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 7/275 5/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-08 874555 m, 120876 m/sec, 2656581 t fired, .

Time elapsed: 31 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 CTL EXCL 12/275 9/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-08 1448435 m, 114776 m/sec, 4550955 t fired, .

Time elapsed: 36 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 29 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-08
lola: result : false
lola: markings : 1551578
lola: fired transitions : 4885793
lola: time used : 13.000000
lola: memory pages used : 9
lola: LAUNCH task # 26 (type EXCL) for 25 SieveSingleMsgMbox-PT-d1m06-CTLFireability-07
lola: time limit : 296 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 4/296 3/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-07 478479 m, 95695 m/sec, 1472564 t fired, .

Time elapsed: 41 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 9/296 7/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-07 1110947 m, 126493 m/sec, 3416411 t fired, .

Time elapsed: 46 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 26 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-07
lola: result : true
lola: markings : 1548382
lola: fired transitions : 4867213
lola: time used : 13.000000
lola: memory pages used : 9
lola: LAUNCH task # 17 (type EXCL) for 16 SieveSingleMsgMbox-PT-d1m06-CTLFireability-04
lola: time limit : 322 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 1/322 1/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-04 134203 m, 26840 m/sec, 267534 t fired, .

Time elapsed: 51 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 6/322 5/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-04 713626 m, 115884 m/sec, 1469074 t fired, .

Time elapsed: 56 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ 0 2 0 0 2 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 11/322 7/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-04 1226850 m, 102644 m/sec, 2577453 t fired, .

Time elapsed: 61 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 17 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-04
lola: result : false
lola: markings : 1551578
lola: fired transitions : 3337009
lola: time used : 15.000000
lola: memory pages used : 9
lola: LAUNCH task # 11 (type EXCL) for 6 SieveSingleMsgMbox-PT-d1m06-CTLFireability-02
lola: time limit : 353 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-02
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d1m06-CTLFireability-00
lola: time limit : 441 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 1/441 1/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-00 94814 m, 18962 m/sec, 256574 t fired, .

Time elapsed: 66 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 6/441 3/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-00 513920 m, 83821 m/sec, 1575499 t fired, .

Time elapsed: 71 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-00
lola: result : true
lola: markings : 806318
lola: fired transitions : 2459379
lola: time used : 10.000000
lola: memory pages used : 5
lola: LAUNCH task # 53 (type EXCL) for 19 SieveSingleMsgMbox-PT-d1m06-CTLFireability-05
lola: time limit : 503 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-05
lola: result : true
lola: markings : 455
lola: fired transitions : 890
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 SieveSingleMsgMbox-PT-d1m06-CTLFireability-13
lola: time limit : 587 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-13
lola: result : false
lola: markings : 29240
lola: fired transitions : 46563
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 34 SieveSingleMsgMbox-PT-d1m06-CTLFireability-10
lola: time limit : 705 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-10
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 SieveSingleMsgMbox-PT-d1m06-CTLFireability-12
lola: time limit : 881 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-12
lola: result : true
lola: markings : 8
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06
lola: time limit : 1175 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 1/1175 1/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 47488 m, 9497 m/sec, 334230 t fired, .

Time elapsed: 76 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 6/1175 2/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 293537 m, 49209 m/sec, 2334980 t fired, .

Time elapsed: 81 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 11/1175 3/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 507615 m, 42815 m/sec, 4051110 t fired, .

Time elapsed: 86 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 16/1175 5/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 745129 m, 47502 m/sec, 5930361 t fired, .

Time elapsed: 91 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 21/1175 6/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 996646 m, 50303 m/sec, 7709308 t fired, .

Time elapsed: 96 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 26/1175 8/32 SieveSingleMsgMbox-PT-d1m06-CTLFireability-06 1286298 m, 57930 m/sec, 9555919 t fired, .

Time elapsed: 101 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 23 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-06
lola: result : false
lola: markings : 1551578
lola: fired transitions : 11258559
lola: time used : 31.000000
lola: memory pages used : 9
lola: LAUNCH task # 14 (type EXCL) for 13 SieveSingleMsgMbox-PT-d1m06-CTLFireability-03
lola: time limit : 1747 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-03
lola: result : true
lola: markings : 8
lola: fired transitions : 47
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 SieveSingleMsgMbox-PT-d1m06-CTLFireability-14
lola: time limit : 3494 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-14
lola: result : false
lola: markings : 23
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d1m06-CTLFireability-00: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-02: DISJ true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-03: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-04: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-05: F false state space / EG
SieveSingleMsgMbox-PT-d1m06-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-07: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-08: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-09: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-10: AU false state space /ER
SieveSingleMsgMbox-PT-d1m06-CTLFireability-11: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-12: CTL true CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-14: CTL false CTL model checker
SieveSingleMsgMbox-PT-d1m06-CTLFireability-15: CTL true CTL model checker


Time elapsed: 106 secs. Pages in use: 9

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d1m06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d1m06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r422-tajo-167905975900410"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d1m06.tgz
mv SieveSingleMsgMbox-PT-d1m06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;