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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r422-tajo-167905975800326
Last Updated
May 14, 2023

About the Execution of LoLA for ShieldRVt-PT-050A

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
790.563 17828.00 66993.00 12.50 FFTFTFFFFTFTFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r422-tajo-167905975800326.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ShieldRVt-PT-050A, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r422-tajo-167905975800326
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 620K
-rw-r--r-- 1 mcc users 6.6K Feb 25 23:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 25 23:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 23:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 23:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 17:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 00:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 138K Feb 26 00:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 26 00:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 87K Feb 26 00:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 136K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-00
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-01
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-02
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-03
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-04
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-05
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-06
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-07
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-08
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-09
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-10
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-11
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-12
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-13
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-14
FORMULA_NAME ShieldRVt-PT-050A-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679219234513

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-050A
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT ShieldRVt-PT-050A
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldRVt-PT-050A-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679219252341

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 3 ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 3 ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 3 ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 3 ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: result : true
lola: markings : 151
lola: fired transitions : 150
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 50 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 52 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 50 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: result : unknown
lola: FINISHED task # 49 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-01
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 63 (type EXCL) for 12 ShieldRVt-PT-050A-ReachabilityCardinality-04
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 59 (type FNDP) for 12 ShieldRVt-PT-050A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type EQUN) for 12 ShieldRVt-PT-050A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH) for 12 ShieldRVt-PT-050A-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: FINISHED task # 60 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 59 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 62 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 63 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 101 (type EXCL) for 18 ShieldRVt-PT-050A-ReachabilityCardinality-06
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 72 (type FNDP) for 36 ShieldRVt-PT-050A-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type EQUN) for 36 ShieldRVt-PT-050A-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 75 (type SRCH) for 36 ShieldRVt-PT-050A-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 201857
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-06
lola: result : true
lola: markings : 30
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 6 ShieldRVt-PT-050A-ReachabilityCardinality-02
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 75 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-12
lola: result : true
lola: markings : 1359
lola: fired transitions : 1488
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 73 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 119 (type FNDP) for 39 ShieldRVt-PT-050A-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type EQUN) for 39 ShieldRVt-PT-050A-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SRCH) for 39 ShieldRVt-PT-050A-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 79 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-02
lola: result : true
lola: markings : 121
lola: fired transitions : 120
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 145 (type EXCL) for 0 ShieldRVt-PT-050A-ReachabilityCardinality-00
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 145 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-00
lola: result : true
lola: markings : 153
lola: fired transitions : 152
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 142 (type EXCL) for 45 ShieldRVt-PT-050A-ReachabilityCardinality-15
lola: time limit : 359 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
lola: FINISHED task # 72 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 4878
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 142 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-15
lola: result : true
lola: markings : 71
lola: fired transitions : 70
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 128 (type EXCL) for 15 ShieldRVt-PT-050A-ReachabilityCardinality-05
lola: time limit : 399 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 128 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-05
lola: result : true
lola: markings : 165
lola: fired transitions : 164
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 94 (type EXCL) for 9 ShieldRVt-PT-050A-ReachabilityCardinality-03
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 94 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-03
lola: result : true
lola: markings : 73
lola: fired transitions : 72
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 133 (type EXCL) for 21 ShieldRVt-PT-050A-ReachabilityCardinality-07
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 133 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-07
lola: result : true
lola: markings : 43
lola: fired transitions : 42
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 82 (type EXCL) for 24 ShieldRVt-PT-050A-ReachabilityCardinality-08
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 82 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-08
lola: result : true
lola: markings : 276
lola: fired transitions : 276
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 148 (type EXCL) for 27 ShieldRVt-PT-050A-ReachabilityCardinality-09
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 148 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-09
lola: result : true
lola: markings : 82
lola: fired transitions : 81
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 88 (type EXCL) for 30 ShieldRVt-PT-050A-ReachabilityCardinality-10
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 88 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-10
lola: result : true
lola: markings : 28
lola: fired transitions : 27
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 153 (type EXCL) for 42 ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: time limit : 1199 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 120 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 119 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 122 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 112 (type FNDP) for 33 ShieldRVt-PT-050A-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 33 ShieldRVt-PT-050A-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type SRCH) for 33 ShieldRVt-PT-050A-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 902321
lola: tried executions : 2
lola: time used : 2.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
lola: FINISHED task # 112 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 25389
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 113 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 115 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 135 (type FNDP) for 42 ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type EQUN) for 42 ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SRCH) for 42 ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 113 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-11
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-150.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-050A-ReachabilityCardinality-00: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-02: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-03: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-04: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-05: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-06: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-07: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-10: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-11: EF true findpath
ShieldRVt-PT-050A-ReachabilityCardinality-12: AG false tandem / insertion
ShieldRVt-PT-050A-ReachabilityCardinality-13: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-15: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-050A-ReachabilityCardinality-14: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
135 EF FNDP 2/1798 0/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 321379 t fired, 1 attempts, .
150 EF STEQ 2/3596 0/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 sara is running.
152 EF SRCH 2/3596 1/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 176487 m, 35297 m/sec, 181485 t fired, .
153 EF EXCL 3/3597 1/32 ShieldRVt-PT-050A-ReachabilityCardinality-14 42111 m, 8422 m/sec, 44433 t fired, .

Time elapsed: 6 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-050A-ReachabilityCardinality-00: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-02: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-03: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-04: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-05: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-06: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-07: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-10: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-11: EF true findpath
ShieldRVt-PT-050A-ReachabilityCardinality-12: AG false tandem / insertion
ShieldRVt-PT-050A-ReachabilityCardinality-13: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-15: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-050A-ReachabilityCardinality-14: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
135 EF FNDP 7/1796 0/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 1824307 t fired, 2 attempts, .
150 EF STEQ 7/3594 0/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 sara is running.
152 EF SRCH 7/3594 4/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 875996 m, 139901 m/sec, 1086450 t fired, .
153 EF EXCL 8/3597 1/32 ShieldRVt-PT-050A-ReachabilityCardinality-14 107746 m, 13127 m/sec, 113715 t fired, .

Time elapsed: 11 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 152 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-050A-ReachabilityCardinality-00: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-02: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-03: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-04: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-05: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-06: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-07: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-10: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-11: EF true findpath
ShieldRVt-PT-050A-ReachabilityCardinality-12: AG false tandem / insertion
ShieldRVt-PT-050A-ReachabilityCardinality-13: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-15: EF true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldRVt-PT-050A-ReachabilityCardinality-14: AG 0 1 3 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
135 EF FNDP 12/1791 0/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 3434586 t fired, 4 attempts, .
150 EF STEQ 12/3589 0/5 ShieldRVt-PT-050A-ReachabilityCardinality-14 sara is running.
153 EF EXCL 13/3597 1/32 ShieldRVt-PT-050A-ReachabilityCardinality-14 186451 m, 15741 m/sec, 196793 t fired, .

Time elapsed: 16 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 154 (type SRCH) for 42 ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 154 (type SRCH) for ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1

lola: FINISHED task # 150 (type EQUN) for ShieldRVt-PT-050A-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 135 (type FNDP) for ShieldRVt-PT-050A-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 153 (type EXCL) for ShieldRVt-PT-050A-ReachabilityCardinality-14 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldRVt-PT-050A-ReachabilityCardinality-00: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-01: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-02: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-03: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-04: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-05: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-06: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-07: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-08: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-09: EF true tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-10: AG false tandem / relaxed
ShieldRVt-PT-050A-ReachabilityCardinality-11: EF true findpath
ShieldRVt-PT-050A-ReachabilityCardinality-12: AG false tandem / insertion
ShieldRVt-PT-050A-ReachabilityCardinality-13: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-14: AG true state equation
ShieldRVt-PT-050A-ReachabilityCardinality-15: EF true tandem / relaxed


Time elapsed: 18 secs. Pages in use: 6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-050A"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ShieldRVt-PT-050A, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r422-tajo-167905975800326"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-050A.tgz
mv ShieldRVt-PT-050A execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;