Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715200386.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldPPPs-PT-003A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715200386
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 7.3K Feb 26 01:56 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 26 01:56 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 26 01:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 26 01:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 01:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Feb 26 01:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.3K Feb 26 01:57 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Feb 26 01:57 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:58 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:58 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 27K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-00
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-01
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-02
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-03
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-04
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-05
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-06
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-07
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-08
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-09
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-10
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-11
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-12
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-13
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-14
FORMULA_NAME ShieldPPPs-PT-003A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679274581154

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldPPPs-PT-003A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 01:09:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 01:09:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 01:09:44] [INFO ] Load time of PNML (sax parser for PT used): 36 ms
[2023-03-20 01:09:44] [INFO ] Transformed 96 places.
[2023-03-20 01:09:44] [INFO ] Transformed 81 transitions.
[2023-03-20 01:09:44] [INFO ] Found NUPN structural information;
[2023-03-20 01:09:44] [INFO ] Parsed PT model containing 96 places and 81 transitions and 306 arcs in 172 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 85 out of 96 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 12 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
// Phase 1: matrix 81 rows 96 cols
[2023-03-20 01:09:44] [INFO ] Computed 34 place invariants in 5 ms
[2023-03-20 01:09:44] [INFO ] Implicit Places using invariants in 349 ms returned []
[2023-03-20 01:09:44] [INFO ] Invariant cache hit.
[2023-03-20 01:09:44] [INFO ] Implicit Places using invariants and state equation in 367 ms returned []
Implicit Place search using SMT with State Equation took 746 ms to find 0 implicit places.
[2023-03-20 01:09:44] [INFO ] Invariant cache hit.
[2023-03-20 01:09:45] [INFO ] Dead Transitions using invariants and state equation in 463 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1224 ms. Remains : 96/96 places, 81/81 transitions.
Support contains 85 out of 96 places after structural reductions.
[2023-03-20 01:09:45] [INFO ] Flatten gal took : 34 ms
[2023-03-20 01:09:45] [INFO ] Flatten gal took : 13 ms
[2023-03-20 01:09:45] [INFO ] Input system was already deterministic with 81 transitions.
Support contains 83 out of 96 places (down from 85) after GAL structural reductions.
Finished random walk after 1529 steps, including 6 resets, run visited all 70 properties in 84 ms. (steps per millisecond=18 )
[2023-03-20 01:09:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 01:09:45] [INFO ] Flatten gal took : 7 ms
[2023-03-20 01:09:45] [INFO ] Input system was already deterministic with 81 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:45] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:45] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:45] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 94 transition count 79
Applied a total of 4 rules in 12 ms. Remains 94 /96 variables (removed 2) and now considering 79/81 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 94/96 places, 79/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 79 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 94 transition count 79
Applied a total of 4 rules in 7 ms. Remains 94 /96 variables (removed 2) and now considering 79/81 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 94/96 places, 79/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 79 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 95 transition count 80
Applied a total of 2 rules in 7 ms. Remains 95 /96 variables (removed 1) and now considering 80/81 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 95/96 places, 80/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 11 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 2 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 94 transition count 79
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 93 transition count 78
Applied a total of 4 rules in 9 ms. Remains 93 /96 variables (removed 3) and now considering 78/81 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 93/96 places, 78/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 96/96 places, 81/81 transitions.
Applied a total of 0 rules in 1 ms. Remains 96 /96 variables (removed 0) and now considering 81/81 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 96/96 places, 81/81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Input system was already deterministic with 81 transitions.
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 5 ms
[2023-03-20 01:09:46] [INFO ] Flatten gal took : 4 ms
[2023-03-20 01:09:46] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-20 01:09:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 96 places, 81 transitions and 306 arcs took 1 ms.
Total runtime 2463 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldPPPs-PT-003A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/380
CTLFireability

FORMULA ShieldPPPs-PT-003A-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-003A-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-003A-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-003A-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-003A-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-003A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679275209011

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/380/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/380/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/380/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
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52 CTL EXCL 5/211 10/32 ShieldPPPs-PT-003A-CTLFireability-13 2227026 m, 445405 m/sec, 5783583 t fired, .

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52 CTL EXCL 10/211 17/32 ShieldPPPs-PT-003A-CTLFireability-13 4012588 m, 357112 m/sec, 11668611 t fired, .

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52 CTL EXCL 15/211 26/32 ShieldPPPs-PT-003A-CTLFireability-13 6112411 m, 419964 m/sec, 17584503 t fired, .

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58 CTL EXCL 5/223 4/32 ShieldPPPs-PT-003A-CTLFireability-15 897562 m, 179512 m/sec, 5290749 t fired, .

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58 CTL EXCL 10/223 7/32 ShieldPPPs-PT-003A-CTLFireability-15 1614282 m, 143344 m/sec, 9887667 t fired, .

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58 CTL EXCL 15/223 11/32 ShieldPPPs-PT-003A-CTLFireability-15 2388413 m, 154826 m/sec, 14673156 t fired, .

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58 CTL EXCL 20/223 13/32 ShieldPPPs-PT-003A-CTLFireability-15 3024126 m, 127142 m/sec, 19741902 t fired, .

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10 CTL EXCL 5/379 1/32 ShieldPPPs-PT-003A-CTLFireability-03 215094 m, 43018 m/sec, 1129166 t fired, .

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10 CTL EXCL 10/379 2/32 ShieldPPPs-PT-003A-CTLFireability-03 411461 m, 39273 m/sec, 2159715 t fired, .

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10 CTL EXCL 15/379 3/32 ShieldPPPs-PT-003A-CTLFireability-03 578604 m, 33428 m/sec, 3112176 t fired, .

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10 CTL EXCL 20/379 3/32 ShieldPPPs-PT-003A-CTLFireability-03 686826 m, 21644 m/sec, 3908673 t fired, .

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10 CTL EXCL 25/379 4/32 ShieldPPPs-PT-003A-CTLFireability-03 868332 m, 36301 m/sec, 5160145 t fired, .

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10 CTL EXCL 30/379 5/32 ShieldPPPs-PT-003A-CTLFireability-03 1056483 m, 37630 m/sec, 6280252 t fired, .

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10 CTL EXCL 65/379 10/32 ShieldPPPs-PT-003A-CTLFireability-03 2221665 m, 29142 m/sec, 13635008 t fired, .

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10 CTL EXCL 70/379 11/32 ShieldPPPs-PT-003A-CTLFireability-03 2375512 m, 30769 m/sec, 14607862 t fired, .

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10 CTL EXCL 75/379 11/32 ShieldPPPs-PT-003A-CTLFireability-03 2509369 m, 26771 m/sec, 15572510 t fired, .

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10 CTL EXCL 90/379 13/32 ShieldPPPs-PT-003A-CTLFireability-03 2876813 m, 28362 m/sec, 18788279 t fired, .

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10 CTL EXCL 105/379 15/32 ShieldPPPs-PT-003A-CTLFireability-03 3321911 m, 32723 m/sec, 21527051 t fired, .

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10 CTL EXCL 135/379 17/32 ShieldPPPs-PT-003A-CTLFireability-03 3998298 m, 29969 m/sec, 26746458 t fired, .

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10 CTL EXCL 140/379 18/32 ShieldPPPs-PT-003A-CTLFireability-03 4177392 m, 35818 m/sec, 27793597 t fired, .

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10 CTL EXCL 145/379 19/32 ShieldPPPs-PT-003A-CTLFireability-03 4299402 m, 24402 m/sec, 28701203 t fired, .

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10 CTL EXCL 150/379 19/32 ShieldPPPs-PT-003A-CTLFireability-03 4398858 m, 19891 m/sec, 29823168 t fired, .

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ShieldPPPs-PT-003A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-13: DISJ 0 1 0 0 5 0 2 0
ShieldPPPs-PT-003A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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lola: result : false
lola: markings : 120
lola: fired transitions : 141
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ShieldPPPs-PT-003A-CTLFireability-08: CTL true CTL model checker
ShieldPPPs-PT-003A-CTLFireability-09: CTL false CTL model checker
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19 CTL EXCL 5/3009 7/32 ShieldPPPs-PT-003A-CTLFireability-06 1662233 m, 332446 m/sec, 5828199 t fired, .

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ShieldPPPs-PT-003A-CTLFireability-05: SP ACTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
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ShieldPPPs-PT-003A-CTLFireability-13: DISJ 0 0 0 0 6 0 2 0
ShieldPPPs-PT-003A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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19 CTL EXCL 10/3009 14/32 ShieldPPPs-PT-003A-CTLFireability-06 3272873 m, 322128 m/sec, 11628808 t fired, .

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ShieldPPPs-PT-003A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-05: SP ACTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-003A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
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ShieldPPPs-PT-003A-CTLFireability-13: DISJ 0 0 0 0 6 0 2 0
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19 CTL EXCL 15/3009 20/32 ShieldPPPs-PT-003A-CTLFireability-06 4714256 m, 288276 m/sec, 17068091 t fired, .

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ShieldPPPs-PT-003A-CTLFireability-09: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-10: AFAG false CTL model checker
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ShieldPPPs-PT-003A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-05: SP ACTL 0 0 0 0 1 0 1 0
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19 CTL EXCL 20/3009 26/32 ShieldPPPs-PT-003A-CTLFireability-06 6132909 m, 283730 m/sec, 22410399 t fired, .

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ShieldPPPs-PT-003A-CTLFireability-09: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-10: AFAG false CTL model checker
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ShieldPPPs-PT-003A-CTLFireability-05: SP ACTL 0 0 0 0 1 0 1 0
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ShieldPPPs-PT-003A-CTLFireability-13: DISJ 0 0 0 0 6 0 2 0
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19 CTL EXCL 25/3009 32/32 ShieldPPPs-PT-003A-CTLFireability-06 7535540 m, 280526 m/sec, 27789161 t fired, .

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ShieldPPPs-PT-003A-CTLFireability-02: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-08: CTL true CTL model checker
ShieldPPPs-PT-003A-CTLFireability-09: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-10: AFAG false CTL model checker
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ShieldPPPs-PT-003A-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldPPPs-PT-003A-CTLFireability-01: AGAF 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-05: SP ACTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-003A-CTLFireability-13: DISJ 0 0 0 0 6 0 2 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-003A-CTLFireability-00: CTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-01: AGAF unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-02: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-03: CTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-04: CTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-05: SP ACTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-06: CTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-07: CTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-08: CTL true CTL model checker
ShieldPPPs-PT-003A-CTLFireability-09: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-10: AFAG false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-11: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-12: CTL unknown AGGR
ShieldPPPs-PT-003A-CTLFireability-13: DISJ unknown DISJ
ShieldPPPs-PT-003A-CTLFireability-14: CTL false CTL model checker
ShieldPPPs-PT-003A-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldPPPs-PT-003A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldPPPs-PT-003A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715200386"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldPPPs-PT-003A.tgz
mv ShieldPPPs-PT-003A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;