Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715100306.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPt-PT-040A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715100306
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 620K
-rw-r--r-- 1 mcc users 5.9K Feb 25 17:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Feb 25 17:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 17:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 17:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Feb 25 17:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 92K Feb 25 17:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 17:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 25 17:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 212K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-00
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-01
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-02
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-03
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-04
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-05
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-06
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-07
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-08
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-09
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-10
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-11
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-12
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-13
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-14
FORMULA_NAME ShieldIIPt-PT-040A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679272411991

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPt-PT-040A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 00:33:34] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 00:33:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 00:33:34] [INFO ] Load time of PNML (sax parser for PT used): 95 ms
[2023-03-20 00:33:34] [INFO ] Transformed 763 places.
[2023-03-20 00:33:34] [INFO ] Transformed 563 transitions.
[2023-03-20 00:33:34] [INFO ] Found NUPN structural information;
[2023-03-20 00:33:34] [INFO ] Parsed PT model containing 763 places and 563 transitions and 2406 arcs in 169 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
FORMULA ShieldIIPt-PT-040A-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 172 out of 763 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 44 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
// Phase 1: matrix 562 rows 763 cols
[2023-03-20 00:33:34] [INFO ] Computed 361 place invariants in 12 ms
[2023-03-20 00:33:35] [INFO ] Implicit Places using invariants in 643 ms returned []
[2023-03-20 00:33:35] [INFO ] Invariant cache hit.
[2023-03-20 00:33:36] [INFO ] Implicit Places using invariants and state equation in 902 ms returned []
Implicit Place search using SMT with State Equation took 1570 ms to find 0 implicit places.
[2023-03-20 00:33:36] [INFO ] Invariant cache hit.
[2023-03-20 00:33:36] [INFO ] Dead Transitions using invariants and state equation in 465 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2082 ms. Remains : 763/763 places, 562/562 transitions.
Support contains 172 out of 763 places after structural reductions.
[2023-03-20 00:33:37] [INFO ] Flatten gal took : 121 ms
[2023-03-20 00:33:37] [INFO ] Flatten gal took : 54 ms
[2023-03-20 00:33:37] [INFO ] Input system was already deterministic with 562 transitions.
Support contains 163 out of 763 places (down from 172) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 550 ms. (steps per millisecond=18 ) properties (out of 72) seen :23
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 49) seen :0
Running SMT prover for 49 properties.
[2023-03-20 00:33:38] [INFO ] Invariant cache hit.
[2023-03-20 00:33:39] [INFO ] [Real]Absence check using 361 positive place invariants in 112 ms returned sat
[2023-03-20 00:33:40] [INFO ] After 2195ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:49
[2023-03-20 00:33:42] [INFO ] [Nat]Absence check using 361 positive place invariants in 90 ms returned sat
[2023-03-20 00:33:47] [INFO ] After 3878ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :49
[2023-03-20 00:33:52] [INFO ] After 9642ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :49
Attempting to minimize the solution found.
Minimization took 3389 ms.
[2023-03-20 00:33:56] [INFO ] After 15551ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :49
Parikh walk visited 19 properties in 6944 ms.
Support contains 72 out of 763 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Partial Free-agglomeration rule applied 69 times.
Drop transitions removed 69 transitions
Iterating global reduction 0 with 69 rules applied. Total rules applied 73 place count 761 transition count 560
Applied a total of 73 rules in 117 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 117 ms. Remains : 761/763 places, 560/562 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 471 ms. (steps per millisecond=21 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Interrupted probabilistic random walk after 194160 steps, run timeout after 3001 ms. (steps per millisecond=64 ) properties seen :{0=1, 1=1, 2=1, 3=1, 4=1, 5=1, 6=1, 7=1, 8=1, 9=1, 10=1, 11=1, 12=1, 13=1, 14=1, 15=1, 16=1, 17=1, 18=1, 19=1, 21=1, 22=1, 23=1, 24=1, 25=1, 26=1, 27=1, 28=1, 29=1}
Probabilistic random walk after 194160 steps, saw 189044 distinct states, run finished after 3004 ms. (steps per millisecond=64 ) properties seen :29
Running SMT prover for 1 properties.
// Phase 1: matrix 560 rows 761 cols
[2023-03-20 00:34:07] [INFO ] Computed 361 place invariants in 51 ms
[2023-03-20 00:34:07] [INFO ] [Real]Absence check using 361 positive place invariants in 53 ms returned sat
[2023-03-20 00:34:07] [INFO ] After 625ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:34:08] [INFO ] [Nat]Absence check using 361 positive place invariants in 55 ms returned sat
[2023-03-20 00:34:08] [INFO ] After 308ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:08] [INFO ] State equation strengthened by 37 read => feed constraints.
[2023-03-20 00:34:08] [INFO ] After 139ms SMT Verify possible using 37 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:08] [INFO ] After 335ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 100 ms.
[2023-03-20 00:34:08] [INFO ] After 990ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 57 ms.
Support contains 9 out of 761 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 761/761 places, 560/560 transitions.
Partial Free-agglomeration rule applied 10 times.
Drop transitions removed 10 transitions
Iterating global reduction 0 with 10 rules applied. Total rules applied 10 place count 761 transition count 560
Applied a total of 10 rules in 80 ms. Remains 761 /761 variables (removed 0) and now considering 560/560 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 81 ms. Remains : 761/761 places, 560/560 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 305023 steps, run timeout after 3001 ms. (steps per millisecond=101 ) properties seen :{}
Probabilistic random walk after 305023 steps, saw 295069 distinct states, run finished after 3001 ms. (steps per millisecond=101 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 560 rows 761 cols
[2023-03-20 00:34:12] [INFO ] Computed 361 place invariants in 33 ms
[2023-03-20 00:34:12] [INFO ] [Real]Absence check using 361 positive place invariants in 56 ms returned sat
[2023-03-20 00:34:12] [INFO ] After 630ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:34:13] [INFO ] [Nat]Absence check using 361 positive place invariants in 111 ms returned sat
[2023-03-20 00:34:13] [INFO ] After 352ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:13] [INFO ] State equation strengthened by 42 read => feed constraints.
[2023-03-20 00:34:13] [INFO ] After 139ms SMT Verify possible using 42 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:13] [INFO ] After 274ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 81 ms.
[2023-03-20 00:34:13] [INFO ] After 1014ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 81 ms.
Support contains 9 out of 761 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 761/761 places, 560/560 transitions.
Applied a total of 0 rules in 22 ms. Remains 761 /761 variables (removed 0) and now considering 560/560 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 33 ms. Remains : 761/761 places, 560/560 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 761/761 places, 560/560 transitions.
Applied a total of 0 rules in 40 ms. Remains 761 /761 variables (removed 0) and now considering 560/560 (removed 0) transitions.
[2023-03-20 00:34:13] [INFO ] Invariant cache hit.
[2023-03-20 00:34:14] [INFO ] Implicit Places using invariants in 506 ms returned [753, 754]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 508 ms to find 2 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 759/761 places, 560/560 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 759 transition count 559
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 758 transition count 559
Applied a total of 2 rules in 37 ms. Remains 758 /759 variables (removed 1) and now considering 559/560 (removed 1) transitions.
// Phase 1: matrix 559 rows 758 cols
[2023-03-20 00:34:14] [INFO ] Computed 359 place invariants in 13 ms
[2023-03-20 00:34:15] [INFO ] Implicit Places using invariants in 572 ms returned [747]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 586 ms to find 1 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 2 : 757/761 places, 559/560 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 756 transition count 558
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 756 transition count 558
Applied a total of 2 rules in 60 ms. Remains 756 /757 variables (removed 1) and now considering 558/559 (removed 1) transitions.
// Phase 1: matrix 558 rows 756 cols
[2023-03-20 00:34:15] [INFO ] Computed 358 place invariants in 3 ms
[2023-03-20 00:34:15] [INFO ] Implicit Places using invariants in 408 ms returned []
[2023-03-20 00:34:15] [INFO ] Invariant cache hit.
[2023-03-20 00:34:15] [INFO ] State equation strengthened by 39 read => feed constraints.
[2023-03-20 00:34:16] [INFO ] Implicit Places using invariants and state equation in 1264 ms returned []
Implicit Place search using SMT with State Equation took 1675 ms to find 0 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 3 : 756/761 places, 558/560 transitions.
Finished structural reductions in REACHABILITY mode , in 3 iterations and 2906 ms. Remains : 756/761 places, 558/560 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 360508 steps, run timeout after 3001 ms. (steps per millisecond=120 ) properties seen :{}
Probabilistic random walk after 360508 steps, saw 347889 distinct states, run finished after 3001 ms. (steps per millisecond=120 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-20 00:34:19] [INFO ] Invariant cache hit.
[2023-03-20 00:34:20] [INFO ] [Real]Absence check using 358 positive place invariants in 56 ms returned sat
[2023-03-20 00:34:20] [INFO ] After 528ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:34:20] [INFO ] [Nat]Absence check using 358 positive place invariants in 82 ms returned sat
[2023-03-20 00:34:21] [INFO ] After 420ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:21] [INFO ] State equation strengthened by 39 read => feed constraints.
[2023-03-20 00:34:21] [INFO ] After 131ms SMT Verify possible using 39 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:21] [INFO ] After 200ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 64 ms.
[2023-03-20 00:34:21] [INFO ] After 955ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 51 ms.
Support contains 9 out of 756 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 756/756 places, 558/558 transitions.
Applied a total of 0 rules in 28 ms. Remains 756 /756 variables (removed 0) and now considering 558/558 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 29 ms. Remains : 756/756 places, 558/558 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 756/756 places, 558/558 transitions.
Applied a total of 0 rules in 53 ms. Remains 756 /756 variables (removed 0) and now considering 558/558 (removed 0) transitions.
[2023-03-20 00:34:21] [INFO ] Invariant cache hit.
[2023-03-20 00:34:22] [INFO ] Implicit Places using invariants in 474 ms returned []
[2023-03-20 00:34:22] [INFO ] Invariant cache hit.
[2023-03-20 00:34:22] [INFO ] State equation strengthened by 39 read => feed constraints.
[2023-03-20 00:34:23] [INFO ] Implicit Places using invariants and state equation in 1138 ms returned []
Implicit Place search using SMT with State Equation took 1617 ms to find 0 implicit places.
[2023-03-20 00:34:23] [INFO ] Redundant transitions in 53 ms returned []
[2023-03-20 00:34:23] [INFO ] Invariant cache hit.
[2023-03-20 00:34:23] [INFO ] Dead Transitions using invariants and state equation in 488 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2217 ms. Remains : 756/756 places, 558/558 transitions.
Partial Free-agglomeration rule applied 39 times.
Drop transitions removed 39 transitions
Iterating global reduction 0 with 39 rules applied. Total rules applied 39 place count 756 transition count 558
Drop transitions removed 39 transitions
Redundant transition composition rules discarded 39 transitions
Iterating global reduction 0 with 39 rules applied. Total rules applied 78 place count 756 transition count 519
Applied a total of 78 rules in 45 ms. Remains 756 /756 variables (removed 0) and now considering 519/558 (removed 39) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 519 rows 756 cols
[2023-03-20 00:34:23] [INFO ] Computed 358 place invariants in 5 ms
[2023-03-20 00:34:23] [INFO ] [Real]Absence check using 358 positive place invariants in 46 ms returned sat
[2023-03-20 00:34:24] [INFO ] After 403ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:34:24] [INFO ] [Nat]Absence check using 358 positive place invariants in 45 ms returned sat
[2023-03-20 00:34:24] [INFO ] After 478ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:25] [INFO ] After 674ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 91 ms.
[2023-03-20 00:34:25] [INFO ] After 950ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 85 ms
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 84 ms
[2023-03-20 00:34:25] [INFO ] Input system was already deterministic with 562 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Applied a total of 4 rules in 36 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 761/763 places, 560/562 transitions.
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 29 ms
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 30 ms
[2023-03-20 00:34:25] [INFO ] Input system was already deterministic with 560 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Applied a total of 4 rules in 32 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 761/763 places, 560/562 transitions.
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 27 ms
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 28 ms
[2023-03-20 00:34:25] [INFO ] Input system was already deterministic with 560 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 10 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 29 ms
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 35 ms
[2023-03-20 00:34:25] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 9 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:25] [INFO ] Flatten gal took : 26 ms
[2023-03-20 00:34:25] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Applied a total of 4 rules in 30 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 761/763 places, 560/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 29 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 560 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Applied a total of 4 rules in 29 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 761/763 places, 560/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 26 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 560 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Applied a total of 4 rules in 37 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 761/763 places, 560/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 26 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 560 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 763 transition count 561
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 762 transition count 561
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 761 transition count 560
Applied a total of 4 rules in 30 ms. Remains 761 /763 variables (removed 2) and now considering 560/562 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 761/763 places, 560/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 44 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 57 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 560 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 8 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 9 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 24 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 24 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 15 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 35 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 29 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 8 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 24 ms
[2023-03-20 00:34:26] [INFO ] Flatten gal took : 24 ms
[2023-03-20 00:34:26] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 9 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 23 ms
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 24 ms
[2023-03-20 00:34:27] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 36 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 28 ms
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 28 ms
[2023-03-20 00:34:27] [INFO ] Input system was already deterministic with 562 transitions.
Starting structural reductions in LTL mode, iteration 0 : 763/763 places, 562/562 transitions.
Applied a total of 0 rules in 8 ms. Remains 763 /763 variables (removed 0) and now considering 562/562 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 763/763 places, 562/562 transitions.
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 23 ms
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:27] [INFO ] Input system was already deterministic with 562 transitions.
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 29 ms
[2023-03-20 00:34:27] [INFO ] Flatten gal took : 25 ms
[2023-03-20 00:34:27] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-20 00:34:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 763 places, 562 transitions and 2404 arcs took 4 ms.
Total runtime 53018 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPt-PT-040A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA ShieldIIPt-PT-040A-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-040A-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679272614453

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 20 (type EXCL) for 17 ShieldIIPt-PT-040A-CTLFireability-03
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 20 (type EXCL) for ShieldIIPt-PT-040A-CTLFireability-03
lola: result : true
lola: markings : 102
lola: fired transitions : 102
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 14 ShieldIIPt-PT-040A-CTLFireability-02
lola: time limit : 224 sec
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lola: FINISHED task # 15 (type EXCL) for ShieldIIPt-PT-040A-CTLFireability-02
lola: result : true
lola: markings : 304
lola: fired transitions : 303
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ShieldIIPt-PT-040A-CTLFireability-00
lola: time limit : 239 sec
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lola: FINISHED task # 1 (type EXCL) for ShieldIIPt-PT-040A-CTLFireability-00
lola: result : true
lola: markings : 48
lola: fired transitions : 48
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 ShieldIIPt-PT-040A-CTLFireability-04
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:663
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 57 (type FNDP) for 3 ShieldIIPt-PT-040A-CTLFireability-01
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lola: LAUNCH task # 58 (type EQUN) for 3 ShieldIIPt-PT-040A-CTLFireability-01
lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type SRCH) for 3 ShieldIIPt-PT-040A-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 66 (type SRCH) for ShieldIIPt-PT-040A-CTLFireability-01
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type FNDP) for 3 ShieldIIPt-PT-040A-CTLFireability-01
lola: time limit : 32000000 sec
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lola: FINISHED task # 59 (type FNDP) for ShieldIIPt-PT-040A-CTLFireability-01
lola: result : true
lola: fired transitions : 16
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 57 (type FNDP) for ShieldIIPt-PT-040A-CTLFireability-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for ShieldIIPt-PT-040A-CTLFireability-01 (obsolete)
lola: FINISHED task # 57 (type FNDP) for ShieldIIPt-PT-040A-CTLFireability-01
lola: result : unknown
lola: fired transitions : 7110
lola: tried executions : 2
lola: time used : 0.000000
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lola: FINISHED task # 58 (type EQUN) for ShieldIIPt-PT-040A-CTLFireability-01
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-040A-CTLFireability-03: CONJ 0 1 0 0 3 0 0 0
ShieldIIPt-PT-040A-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 4/299 10/32 ShieldIIPt-PT-040A-CTLFireability-04 822694 m, 164538 m/sec, 1400146 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldIIPt-PT-040A-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-040A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 9/299 19/32 ShieldIIPt-PT-040A-CTLFireability-04 1677766 m, 171014 m/sec, 2908727 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-040A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 14/299 28/32 ShieldIIPt-PT-040A-CTLFireability-04 2464186 m, 157284 m/sec, 4357554 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-040A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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lola: result : true
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lola: FINISHED task # 49 (type EXCL) for ShieldIIPt-PT-040A-CTLFireability-13
lola: result : true
lola: markings : 184
lola: fired transitions : 184
lola: time used : 0.000000
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lola: time limit : 511 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-040A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 5/511 10/32 ShieldIIPt-PT-040A-CTLFireability-12 851152 m, 170230 m/sec, 1450521 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 10/511 20/32 ShieldIIPt-PT-040A-CTLFireability-12 1698706 m, 169510 m/sec, 2951445 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 1 0 1 0 0 0

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46 CTL EXCL 15/511 28/32 ShieldIIPt-PT-040A-CTLFireability-12 2461068 m, 152472 m/sec, 4357610 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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lola: result : false
lola: markings : 9718
lola: fired transitions : 12401
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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 5/711 8/32 ShieldIIPt-PT-040A-CTLFireability-09 633832 m, 126766 m/sec, 1711293 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 10/711 15/32 ShieldIIPt-PT-040A-CTLFireability-09 1264108 m, 126055 m/sec, 3429889 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 15/711 21/32 ShieldIIPt-PT-040A-CTLFireability-09 1855775 m, 118333 m/sec, 5096457 t fired, .

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40 CTL EXCL 20/711 28/32 ShieldIIPt-PT-040A-CTLFireability-09 2432235 m, 115292 m/sec, 6736325 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
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ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/883 5/32 ShieldIIPt-PT-040A-CTLFireability-08 645112 m, 129022 m/sec, 1619907 t fired, .

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37 CTL EXCL 10/883 9/32 ShieldIIPt-PT-040A-CTLFireability-08 1301951 m, 131367 m/sec, 3167999 t fired, .

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37 CTL EXCL 15/883 13/32 ShieldIIPt-PT-040A-CTLFireability-08 1983933 m, 136396 m/sec, 4718928 t fired, .

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37 CTL EXCL 20/883 18/32 ShieldIIPt-PT-040A-CTLFireability-08 2687365 m, 140686 m/sec, 6337885 t fired, .

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37 CTL EXCL 25/883 23/32 ShieldIIPt-PT-040A-CTLFireability-08 3368673 m, 136261 m/sec, 8002450 t fired, .

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37 CTL EXCL 30/883 28/32 ShieldIIPt-PT-040A-CTLFireability-08 4065091 m, 139283 m/sec, 9597833 t fired, .

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34 CTL EXCL 5/1749 7/32 ShieldIIPt-PT-040A-CTLFireability-07 615285 m, 123057 m/sec, 1660480 t fired, .

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34 CTL EXCL 10/1749 14/32 ShieldIIPt-PT-040A-CTLFireability-07 1235569 m, 124056 m/sec, 3352833 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/1749 21/32 ShieldIIPt-PT-040A-CTLFireability-07 1816979 m, 116282 m/sec, 4987475 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/1749 27/32 ShieldIIPt-PT-040A-CTLFireability-07 2389159 m, 114436 m/sec, 6613312 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldIIPt-PT-040A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/3473 10/32 ShieldIIPt-PT-040A-CTLFireability-05 893718 m, 178743 m/sec, 1524148 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

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28 CTL EXCL 10/3473 20/32 ShieldIIPt-PT-040A-CTLFireability-05 1729542 m, 167164 m/sec, 3009139 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 15/3473 28/32 ShieldIIPt-PT-040A-CTLFireability-05 2502361 m, 154563 m/sec, 4436871 t fired, .

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ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker

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ShieldIIPt-PT-040A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-040A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-040A-CTLFireability-00: EFEG true state space /EFEG
ShieldIIPt-PT-040A-CTLFireability-01: DISJ true findpath
ShieldIIPt-PT-040A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-03: CONJ false state space /EXEF
ShieldIIPt-PT-040A-CTLFireability-04: CTL unknown AGGR
ShieldIIPt-PT-040A-CTLFireability-05: CTL unknown AGGR
ShieldIIPt-PT-040A-CTLFireability-06: SP ECTL true LTL model checker
ShieldIIPt-PT-040A-CTLFireability-07: CTL unknown AGGR
ShieldIIPt-PT-040A-CTLFireability-08: CTL unknown AGGR
ShieldIIPt-PT-040A-CTLFireability-09: CTL unknown AGGR
ShieldIIPt-PT-040A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-040A-CTLFireability-12: CTL unknown AGGR
ShieldIIPt-PT-040A-CTLFireability-13: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-14: CTL true CTL model checker
ShieldIIPt-PT-040A-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPt-PT-040A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPt-PT-040A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715100306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPt-PT-040A.tgz
mv ShieldIIPt-PT-040A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;