Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715100274.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPt-PT-020A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715100274
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 6.2K Feb 25 17:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 25 17:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 17:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 17:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 18:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 18:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 18:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 67K Feb 25 18:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 105K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-00
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-01
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-02
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-03
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-04
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-05
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-06
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-07
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-08
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-09
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-10
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-11
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-12
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-13
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-14
FORMULA_NAME ShieldIIPt-PT-020A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679271206009

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPt-PT-020A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 00:13:28] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 00:13:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 00:13:28] [INFO ] Load time of PNML (sax parser for PT used): 93 ms
[2023-03-20 00:13:28] [INFO ] Transformed 383 places.
[2023-03-20 00:13:28] [INFO ] Transformed 283 transitions.
[2023-03-20 00:13:28] [INFO ] Found NUPN structural information;
[2023-03-20 00:13:28] [INFO ] Parsed PT model containing 383 places and 283 transitions and 1206 arcs in 196 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Support contains 147 out of 383 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 63 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
// Phase 1: matrix 282 rows 383 cols
[2023-03-20 00:13:28] [INFO ] Computed 181 place invariants in 13 ms
[2023-03-20 00:13:29] [INFO ] Implicit Places using invariants in 618 ms returned []
[2023-03-20 00:13:29] [INFO ] Invariant cache hit.
[2023-03-20 00:13:29] [INFO ] Implicit Places using invariants and state equation in 426 ms returned []
Implicit Place search using SMT with State Equation took 1081 ms to find 0 implicit places.
[2023-03-20 00:13:29] [INFO ] Invariant cache hit.
[2023-03-20 00:13:30] [INFO ] Dead Transitions using invariants and state equation in 272 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1430 ms. Remains : 383/383 places, 282/282 transitions.
Support contains 147 out of 383 places after structural reductions.
[2023-03-20 00:13:30] [INFO ] Flatten gal took : 94 ms
[2023-03-20 00:13:30] [INFO ] Flatten gal took : 31 ms
[2023-03-20 00:13:30] [INFO ] Input system was already deterministic with 282 transitions.
Support contains 143 out of 383 places (down from 147) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 466 ms. (steps per millisecond=21 ) properties (out of 63) seen :34
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Running SMT prover for 29 properties.
[2023-03-20 00:13:31] [INFO ] Invariant cache hit.
[2023-03-20 00:13:31] [INFO ] [Real]Absence check using 181 positive place invariants in 25 ms returned sat
[2023-03-20 00:13:31] [INFO ] After 511ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:29
[2023-03-20 00:13:32] [INFO ] [Nat]Absence check using 181 positive place invariants in 35 ms returned sat
[2023-03-20 00:13:34] [INFO ] After 1317ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :29
[2023-03-20 00:13:36] [INFO ] After 3307ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :29
Attempting to minimize the solution found.
Minimization took 1400 ms.
[2023-03-20 00:13:37] [INFO ] After 5740ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :29
Parikh walk visited 28 properties in 778 ms.
Support contains 8 out of 383 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Partial Free-agglomeration rule applied 38 times.
Drop transitions removed 38 transitions
Iterating global reduction 0 with 38 rules applied. Total rules applied 42 place count 381 transition count 280
Applied a total of 42 rules in 58 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 58 ms. Remains : 381/383 places, 280/282 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 454533 steps, run timeout after 3001 ms. (steps per millisecond=151 ) properties seen :{}
Probabilistic random walk after 454533 steps, saw 425526 distinct states, run finished after 3003 ms. (steps per millisecond=151 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 280 rows 381 cols
[2023-03-20 00:13:41] [INFO ] Computed 181 place invariants in 4 ms
[2023-03-20 00:13:41] [INFO ] [Real]Absence check using 181 positive place invariants in 40 ms returned sat
[2023-03-20 00:13:41] [INFO ] After 413ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:13:42] [INFO ] [Nat]Absence check using 181 positive place invariants in 29 ms returned sat
[2023-03-20 00:13:42] [INFO ] After 175ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:13:42] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-20 00:13:42] [INFO ] After 69ms SMT Verify possible using 22 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:13:42] [INFO ] After 160ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 71 ms.
[2023-03-20 00:13:42] [INFO ] After 567ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 25 ms.
Support contains 8 out of 381 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 381/381 places, 280/280 transitions.
Applied a total of 0 rules in 27 ms. Remains 381 /381 variables (removed 0) and now considering 280/280 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 27 ms. Remains : 381/381 places, 280/280 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 381/381 places, 280/280 transitions.
Applied a total of 0 rules in 18 ms. Remains 381 /381 variables (removed 0) and now considering 280/280 (removed 0) transitions.
[2023-03-20 00:13:42] [INFO ] Invariant cache hit.
[2023-03-20 00:13:42] [INFO ] Implicit Places using invariants in 229 ms returned [373, 374]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 231 ms to find 2 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 379/381 places, 280/280 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 379 transition count 279
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 378 transition count 279
Applied a total of 2 rules in 14 ms. Remains 378 /379 variables (removed 1) and now considering 279/280 (removed 1) transitions.
// Phase 1: matrix 279 rows 378 cols
[2023-03-20 00:13:42] [INFO ] Computed 179 place invariants in 2 ms
[2023-03-20 00:13:43] [INFO ] Implicit Places using invariants in 323 ms returned [367]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 328 ms to find 1 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 2 : 377/381 places, 279/280 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 376 transition count 278
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 376 transition count 278
Applied a total of 2 rules in 20 ms. Remains 376 /377 variables (removed 1) and now considering 278/279 (removed 1) transitions.
// Phase 1: matrix 278 rows 376 cols
[2023-03-20 00:13:43] [INFO ] Computed 178 place invariants in 40 ms
[2023-03-20 00:13:43] [INFO ] Implicit Places using invariants in 290 ms returned []
[2023-03-20 00:13:43] [INFO ] Invariant cache hit.
[2023-03-20 00:13:43] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-20 00:13:44] [INFO ] Implicit Places using invariants and state equation in 580 ms returned []
Implicit Place search using SMT with State Equation took 873 ms to find 0 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 3 : 376/381 places, 278/280 transitions.
Finished structural reductions in REACHABILITY mode , in 3 iterations and 1484 ms. Remains : 376/381 places, 278/280 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 522905 steps, run timeout after 3001 ms. (steps per millisecond=174 ) properties seen :{}
Probabilistic random walk after 522905 steps, saw 489329 distinct states, run finished after 3001 ms. (steps per millisecond=174 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-20 00:13:47] [INFO ] Invariant cache hit.
[2023-03-20 00:13:47] [INFO ] [Real]Absence check using 178 positive place invariants in 30 ms returned sat
[2023-03-20 00:13:47] [INFO ] After 298ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:13:47] [INFO ] [Nat]Absence check using 178 positive place invariants in 30 ms returned sat
[2023-03-20 00:13:47] [INFO ] After 196ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:13:47] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-20 00:13:47] [INFO ] After 86ms SMT Verify possible using 19 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:13:47] [INFO ] After 144ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 32 ms.
[2023-03-20 00:13:47] [INFO ] After 496ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 20 ms.
Support contains 8 out of 376 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 376/376 places, 278/278 transitions.
Applied a total of 0 rules in 16 ms. Remains 376 /376 variables (removed 0) and now considering 278/278 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 16 ms. Remains : 376/376 places, 278/278 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 376/376 places, 278/278 transitions.
Applied a total of 0 rules in 14 ms. Remains 376 /376 variables (removed 0) and now considering 278/278 (removed 0) transitions.
[2023-03-20 00:13:48] [INFO ] Invariant cache hit.
[2023-03-20 00:13:48] [INFO ] Implicit Places using invariants in 201 ms returned []
[2023-03-20 00:13:48] [INFO ] Invariant cache hit.
[2023-03-20 00:13:48] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-20 00:13:48] [INFO ] Implicit Places using invariants and state equation in 501 ms returned []
Implicit Place search using SMT with State Equation took 704 ms to find 0 implicit places.
[2023-03-20 00:13:48] [INFO ] Redundant transitions in 7 ms returned []
[2023-03-20 00:13:48] [INFO ] Invariant cache hit.
[2023-03-20 00:13:49] [INFO ] Dead Transitions using invariants and state equation in 283 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1034 ms. Remains : 376/376 places, 278/278 transitions.
Partial Free-agglomeration rule applied 18 times.
Drop transitions removed 18 transitions
Iterating global reduction 0 with 18 rules applied. Total rules applied 18 place count 376 transition count 278
Drop transitions removed 18 transitions
Redundant transition composition rules discarded 18 transitions
Iterating global reduction 0 with 18 rules applied. Total rules applied 36 place count 376 transition count 260
Applied a total of 36 rules in 33 ms. Remains 376 /376 variables (removed 0) and now considering 260/278 (removed 18) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 260 rows 376 cols
[2023-03-20 00:13:49] [INFO ] Computed 178 place invariants in 2 ms
[2023-03-20 00:13:49] [INFO ] [Real]Absence check using 178 positive place invariants in 25 ms returned sat
[2023-03-20 00:13:49] [INFO ] After 391ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 00:13:49] [INFO ] [Nat]Absence check using 178 positive place invariants in 28 ms returned sat
[2023-03-20 00:13:49] [INFO ] After 220ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 00:13:49] [INFO ] After 255ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 35 ms.
[2023-03-20 00:13:49] [INFO ] After 386ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
[2023-03-20 00:13:49] [INFO ] Flatten gal took : 28 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 22 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 282 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 36 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 30 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 19 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 5 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 17 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 18 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 5 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 17 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 16 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 5 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 16 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 16 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 50 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 50 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 22 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 22 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 4 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 17 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 29 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 4 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 16 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 15 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 16 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 14 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 14 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 15 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 22 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 14 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 15 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:50] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 14 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:50] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 3 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 4 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 15 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 10 ms
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Input system was already deterministic with 280 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 1) seen :0
Finished probabilistic random walk after 5642 steps, run visited all 1 properties in 31 ms. (steps per millisecond=182 )
Probabilistic random walk after 5642 steps, saw 5435 distinct states, run finished after 32 ms. (steps per millisecond=176 ) properties seen :1
FORMULA ShieldIIPt-PT-020A-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 383 transition count 281
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 382 transition count 281
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 381 transition count 280
Applied a total of 4 rules in 16 ms. Remains 381 /383 variables (removed 2) and now considering 280/282 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 381/383 places, 280/282 transitions.
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Input system was already deterministic with 280 transitions.
Starting structural reductions in LTL mode, iteration 0 : 383/383 places, 282/282 transitions.
Applied a total of 0 rules in 4 ms. Remains 383 /383 variables (removed 0) and now considering 282/282 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 383/383 places, 282/282 transitions.
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:51] [INFO ] Input system was already deterministic with 282 transitions.
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:13:51] [INFO ] Flatten gal took : 13 ms
[2023-03-20 00:13:51] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 16 ms.
[2023-03-20 00:13:51] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 383 places, 282 transitions and 1204 arcs took 2 ms.
Total runtime 23227 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPt-PT-020A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/385
CTLFireability

FORMULA ShieldIIPt-PT-020A-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-020A-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-020A-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-020A-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-020A-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-020A-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-020A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679271478077

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/385/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/385/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/385/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-020A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-020A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-020A-CTLFireability-02: CONJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-020A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-020A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-020A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
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ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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47 CTL EXCL 5/257 6/32 ShieldIIPt-PT-020A-CTLFireability-15 1362154 m, 272430 m/sec, 2143343 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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47 CTL EXCL 10/257 11/32 ShieldIIPt-PT-020A-CTLFireability-15 2611732 m, 249915 m/sec, 4247338 t fired, .

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47 CTL EXCL 15/257 16/32 ShieldIIPt-PT-020A-CTLFireability-15 3828402 m, 243334 m/sec, 6340399 t fired, .

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47 CTL EXCL 20/257 21/32 ShieldIIPt-PT-020A-CTLFireability-15 5018321 m, 237983 m/sec, 8406297 t fired, .

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47 CTL EXCL 25/257 28/32 ShieldIIPt-PT-020A-CTLFireability-15 6300606 m, 256457 m/sec, 10496822 t fired, .

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lola: markings : 632
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ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
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ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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38 CTL EXCL 5/297 4/32 ShieldIIPt-PT-020A-CTLFireability-11 608010 m, 121602 m/sec, 1320886 t fired, .

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38 CTL EXCL 10/297 8/32 ShieldIIPt-PT-020A-CTLFireability-11 1108923 m, 100182 m/sec, 2515054 t fired, .

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38 CTL EXCL 15/297 11/32 ShieldIIPt-PT-020A-CTLFireability-11 1630604 m, 104336 m/sec, 3808198 t fired, .

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14 CTL EXCL 5/347 7/32 ShieldIIPt-PT-020A-CTLFireability-03 1114195 m, 222839 m/sec, 2039390 t fired, .

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14 CTL EXCL 10/347 13/32 ShieldIIPt-PT-020A-CTLFireability-03 2050982 m, 187357 m/sec, 3915320 t fired, .

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14 CTL EXCL 15/347 18/32 ShieldIIPt-PT-020A-CTLFireability-03 2941673 m, 178138 m/sec, 5752386 t fired, .

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14 CTL EXCL 20/347 25/32 ShieldIIPt-PT-020A-CTLFireability-03 3997889 m, 211243 m/sec, 7717811 t fired, .

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14 CTL EXCL 25/347 30/32 ShieldIIPt-PT-020A-CTLFireability-03 4938222 m, 188066 m/sec, 9601607 t fired, .

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4 CTL EXCL 5/492 9/32 ShieldIIPt-PT-020A-CTLFireability-01 1360740 m, 272148 m/sec, 2410057 t fired, .

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4 CTL EXCL 10/492 19/32 ShieldIIPt-PT-020A-CTLFireability-01 2773622 m, 282576 m/sec, 4856624 t fired, .

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4 CTL EXCL 15/492 27/32 ShieldIIPt-PT-020A-CTLFireability-01 3996334 m, 244542 m/sec, 7105411 t fired, .

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29 CTL EXCL 15/685 27/32 ShieldIIPt-PT-020A-CTLFireability-08 4013163 m, 270410 m/sec, 7094866 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 5/852 8/32 ShieldIIPt-PT-020A-CTLFireability-07 1694051 m, 338810 m/sec, 2529352 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
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ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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26 CTL EXCL 15/852 19/32 ShieldIIPt-PT-020A-CTLFireability-07 4383179 m, 261373 m/sec, 6771736 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
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ShieldIIPt-PT-020A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-020A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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26 CTL EXCL 20/852 24/32 ShieldIIPt-PT-020A-CTLFireability-07 5670393 m, 257442 m/sec, 8849063 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-020A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-020A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-020A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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26 CTL EXCL 25/852 30/32 ShieldIIPt-PT-020A-CTLFireability-07 6941849 m, 254291 m/sec, 10914625 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-020A-CTLFireability-14: CTL false CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
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ShieldIIPt-PT-020A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
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1 CTL EXCL 5/3379 9/32 ShieldIIPt-PT-020A-CTLFireability-00 1311985 m, 262397 m/sec, 2251220 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-020A-CTLFireability-14: CTL false CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
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ShieldIIPt-PT-020A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-020A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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1 CTL EXCL 10/3379 16/32 ShieldIIPt-PT-020A-CTLFireability-00 2445067 m, 226616 m/sec, 4329201 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-020A-CTLFireability-14: CTL false CTL model checker

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ShieldIIPt-PT-020A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-020A-CTLFireability-14: CTL false CTL model checker

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1 CTL EXCL 20/3379 32/32 ShieldIIPt-PT-020A-CTLFireability-00 4811909 m, 234906 m/sec, 8521974 t fired, .

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ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-020A-CTLFireability-14: CTL false CTL model checker

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-020A-CTLFireability-00: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-01: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-02: CONJ true CONJ
ShieldIIPt-PT-020A-CTLFireability-03: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-04: SP ECTL true LTL model checker
ShieldIIPt-PT-020A-CTLFireability-05: AG false findpath
ShieldIIPt-PT-020A-CTLFireability-06: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-07: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-08: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-10: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-11: CTL unknown AGGR
ShieldIIPt-PT-020A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-020A-CTLFireability-14: CTL false CTL model checker
ShieldIIPt-PT-020A-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPt-PT-020A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPt-PT-020A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715100274"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPt-PT-020A.tgz
mv ShieldIIPt-PT-020A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;