About the Execution of LoLa+red for ShieldIIPt-PT-010A
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 8008.995 | 167053.00 | 166932.00 | 462.20 | FFTTTTTT?F?FT??T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715100258.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPt-PT-010A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715100258
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 6.2K Feb 25 17:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 25 17:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 17:08 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 25 17:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 17:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 17:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 17:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 25 17:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 53K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-00
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-01
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-02
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-03
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-04
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-05
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-06
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-07
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-08
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-09
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-10
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-11
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-12
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-13
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-14
FORMULA_NAME ShieldIIPt-PT-010A-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679270480009
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPt-PT-010A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 00:01:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 00:01:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 00:01:23] [INFO ] Load time of PNML (sax parser for PT used): 44 ms
[2023-03-20 00:01:23] [INFO ] Transformed 193 places.
[2023-03-20 00:01:23] [INFO ] Transformed 143 transitions.
[2023-03-20 00:01:23] [INFO ] Found NUPN structural information;
[2023-03-20 00:01:23] [INFO ] Parsed PT model containing 193 places and 143 transitions and 606 arcs in 132 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Support contains 120 out of 193 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 12 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
// Phase 1: matrix 142 rows 193 cols
[2023-03-20 00:01:23] [INFO ] Computed 91 place invariants in 6 ms
[2023-03-20 00:01:23] [INFO ] Implicit Places using invariants in 429 ms returned []
[2023-03-20 00:01:23] [INFO ] Invariant cache hit.
[2023-03-20 00:01:24] [INFO ] Implicit Places using invariants and state equation in 455 ms returned []
Implicit Place search using SMT with State Equation took 925 ms to find 0 implicit places.
[2023-03-20 00:01:24] [INFO ] Invariant cache hit.
[2023-03-20 00:01:24] [INFO ] Dead Transitions using invariants and state equation in 249 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1189 ms. Remains : 193/193 places, 142/142 transitions.
Support contains 120 out of 193 places after structural reductions.
[2023-03-20 00:01:24] [INFO ] Flatten gal took : 45 ms
[2023-03-20 00:01:24] [INFO ] Flatten gal took : 15 ms
[2023-03-20 00:01:24] [INFO ] Input system was already deterministic with 142 transitions.
Support contains 112 out of 193 places (down from 120) after GAL structural reductions.
Finished random walk after 4627 steps, including 1 resets, run visited all 58 properties in 220 ms. (steps per millisecond=21 )
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 12 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 6 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 9 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 11 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 6 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 9 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 10 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 11 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 8 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 9 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 3 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 8 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 8 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 3 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 8 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 15 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 193 transition count 141
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 192 transition count 141
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 191 transition count 140
Applied a total of 4 rules in 31 ms. Remains 191 /193 variables (removed 2) and now considering 140/142 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 191/193 places, 140/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 193 transition count 141
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 192 transition count 141
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 191 transition count 140
Applied a total of 4 rules in 12 ms. Remains 191 /193 variables (removed 2) and now considering 140/142 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 191/193 places, 140/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 21 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 20 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 140 transitions.
Finished random walk after 73 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=36 )
FORMULA ShieldIIPt-PT-010A-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 193 transition count 141
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 192 transition count 141
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 191 transition count 140
Applied a total of 4 rules in 11 ms. Remains 191 /193 variables (removed 2) and now considering 140/142 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 191/193 places, 140/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 16 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 1 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 33 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 2 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 1 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 8 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:25] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 192 transition count 140
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 190 transition count 140
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 188 transition count 139
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 6 place count 188 transition count 138
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 8 place count 187 transition count 138
Applied a total of 8 rules in 11 ms. Remains 187 /193 variables (removed 6) and now considering 138/142 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 187/193 places, 138/142 transitions.
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:25] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:26] [INFO ] Input system was already deterministic with 138 transitions.
Finished random walk after 741 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=123 )
FORMULA ShieldIIPt-PT-010A-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 1 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:26] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 1 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:26] [INFO ] Input system was already deterministic with 142 transitions.
Starting structural reductions in LTL mode, iteration 0 : 193/193 places, 142/142 transitions.
Applied a total of 0 rules in 1 ms. Remains 193 /193 variables (removed 0) and now considering 142/142 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 193/193 places, 142/142 transitions.
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 5 ms
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 5 ms
[2023-03-20 00:01:26] [INFO ] Input system was already deterministic with 142 transitions.
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 7 ms
[2023-03-20 00:01:26] [INFO ] Flatten gal took : 6 ms
[2023-03-20 00:01:26] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-20 00:01:26] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 193 places, 142 transitions and 604 arcs took 1 ms.
Total runtime 2925 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPt-PT-010A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/384
CTLFireability
FORMULA ShieldIIPt-PT-010A-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPt-PT-010A-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679270647062
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/384/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/384/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/384/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: RELEASE
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: FINISHED task # 4 (type EXCL) for ShieldIIPt-PT-010A-CTLFireability-01
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: LAUNCH task # 12 (type EXCL) for 9 ShieldIIPt-PT-010A-CTLFireability-03
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: FINISHED task # 54 (type FNDP) for ShieldIIPt-PT-010A-CTLFireability-03
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lola: CANCELED task # 12 (type EXCL) for ShieldIIPt-PT-010A-CTLFireability-03 (obsolete)
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 50 (type EXCL) for ShieldIIPt-PT-010A-CTLFireability-15
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:714
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
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42 CTL EXCL 5/360 6/32 ShieldIIPt-PT-010A-CTLFireability-13 1218699 m, 243739 m/sec, 2747279 t fired, .
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42 CTL EXCL 10/360 10/32 ShieldIIPt-PT-010A-CTLFireability-13 2289251 m, 214110 m/sec, 5422359 t fired, .
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42 CTL EXCL 15/360 15/32 ShieldIIPt-PT-010A-CTLFireability-13 3525161 m, 247182 m/sec, 8292034 t fired, .
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42 CTL EXCL 20/360 20/32 ShieldIIPt-PT-010A-CTLFireability-13 4604088 m, 215785 m/sec, 10975157 t fired, .
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42 CTL EXCL 25/360 24/32 ShieldIIPt-PT-010A-CTLFireability-13 5615157 m, 202213 m/sec, 13583000 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
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lola: result : false
lola: markings : 281
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lola: result : true
lola: markings : 54
lola: fired transitions : 54
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lola: time limit : 3480 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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30 CTL EXCL 5/3480 5/32 ShieldIIPt-PT-010A-CTLFireability-08 1062872 m, 212574 m/sec, 4423354 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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30 CTL EXCL 10/3480 9/32 ShieldIIPt-PT-010A-CTLFireability-08 2007279 m, 188881 m/sec, 8491470 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-010A-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-010A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldIIPt-PT-010A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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30 CTL EXCL 15/3480 13/32 ShieldIIPt-PT-010A-CTLFireability-08 3048080 m, 208160 m/sec, 12813399 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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30 CTL EXCL 20/3480 17/32 ShieldIIPt-PT-010A-CTLFireability-08 4004661 m, 191316 m/sec, 16914175 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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30 CTL EXCL 25/3480 21/32 ShieldIIPt-PT-010A-CTLFireability-08 4920796 m, 183227 m/sec, 20877476 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldIIPt-PT-010A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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ShieldIIPt-PT-010A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
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30 CTL EXCL 30/3480 25/32 ShieldIIPt-PT-010A-CTLFireability-08 5858986 m, 187638 m/sec, 24893701 t fired, .
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ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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30 CTL EXCL 35/3480 30/32 ShieldIIPt-PT-010A-CTLFireability-08 6896843 m, 207571 m/sec, 29194079 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldIIPt-PT-010A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-010A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-03: DISJ true findpath
ShieldIIPt-PT-010A-CTLFireability-04: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-010A-CTLFireability-06: EFEG true state space /EFEG
ShieldIIPt-PT-010A-CTLFireability-08: CTL unknown AGGR
ShieldIIPt-PT-010A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-010A-CTLFireability-10: CTL unknown AGGR
ShieldIIPt-PT-010A-CTLFireability-11: AXAG false state space /EXEF
ShieldIIPt-PT-010A-CTLFireability-13: CTL unknown AGGR
ShieldIIPt-PT-010A-CTLFireability-14: CTL unknown AGGR
ShieldIIPt-PT-010A-CTLFireability-15: DISJ true CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPt-PT-010A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPt-PT-010A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715100258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPt-PT-010A.tgz
mv ShieldIIPt-PT-010A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;