Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715000242.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPt-PT-005A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715000242
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 7.1K Feb 25 17:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 25 17:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 17:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 25 17:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 17:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 25 17:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 17:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 25 17:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 27K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-00
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-01
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-02
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-03
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-04
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-05
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-06
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-07
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-08
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-09
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-10
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-11
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-12
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-13
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-14
FORMULA_NAME ShieldIIPt-PT-005A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679270280666

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPt-PT-005A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 23:58:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 23:58:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 23:58:03] [INFO ] Load time of PNML (sax parser for PT used): 51 ms
[2023-03-19 23:58:03] [INFO ] Transformed 98 places.
[2023-03-19 23:58:03] [INFO ] Transformed 73 transitions.
[2023-03-19 23:58:03] [INFO ] Found NUPN structural information;
[2023-03-19 23:58:03] [INFO ] Parsed PT model containing 98 places and 73 transitions and 306 arcs in 242 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 39 ms.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Support contains 85 out of 98 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 31 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
// Phase 1: matrix 72 rows 98 cols
[2023-03-19 23:58:03] [INFO ] Computed 46 place invariants in 6 ms
[2023-03-19 23:58:04] [INFO ] Implicit Places using invariants in 642 ms returned []
[2023-03-19 23:58:04] [INFO ] Invariant cache hit.
[2023-03-19 23:58:04] [INFO ] Implicit Places using invariants and state equation in 172 ms returned []
Implicit Place search using SMT with State Equation took 861 ms to find 0 implicit places.
[2023-03-19 23:58:04] [INFO ] Invariant cache hit.
[2023-03-19 23:58:04] [INFO ] Dead Transitions using invariants and state equation in 214 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1109 ms. Remains : 98/98 places, 72/72 transitions.
Support contains 85 out of 98 places after structural reductions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 37 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 21 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 184 ms. (steps per millisecond=54 ) properties (out of 73) seen :72
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 23:58:05] [INFO ] Invariant cache hit.
[2023-03-19 23:58:05] [INFO ] [Real]Absence check using 46 positive place invariants in 9 ms returned sat
[2023-03-19 23:58:05] [INFO ] After 67ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 9 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 7 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 3 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 2 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 2 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 98 transition count 71
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 97 transition count 71
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 96 transition count 70
Applied a total of 4 rules in 15 ms. Remains 96 /98 variables (removed 2) and now considering 70/72 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 96/98 places, 70/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 17 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 98 transition count 71
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 97 transition count 71
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 96 transition count 70
Applied a total of 4 rules in 7 ms. Remains 96 /98 variables (removed 2) and now considering 70/72 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 96/98 places, 70/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 2 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 98 transition count 71
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 97 transition count 71
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 96 transition count 70
Applied a total of 4 rules in 6 ms. Remains 96 /98 variables (removed 2) and now considering 70/72 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 96/98 places, 70/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 70 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 97 transition count 70
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 95 transition count 70
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 93 transition count 69
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 6 place count 93 transition count 68
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 8 place count 92 transition count 68
Applied a total of 8 rules in 7 ms. Remains 92 /98 variables (removed 6) and now considering 68/72 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 92/98 places, 68/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 68 transitions.
Finished random walk after 365 steps, including 0 resets, run visited all 1 properties in 5 ms. (steps per millisecond=73 )
FORMULA ShieldIIPt-PT-005A-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 3 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 10 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 7 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:05] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:05] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:06] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:06] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 98/98 places, 72/72 transitions.
Applied a total of 0 rules in 1 ms. Remains 98 /98 variables (removed 0) and now considering 72/72 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 98/98 places, 72/72 transitions.
[2023-03-19 23:58:06] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:58:06] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:06] [INFO ] Input system was already deterministic with 72 transitions.
[2023-03-19 23:58:06] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:58:06] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:58:06] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-19 23:58:06] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 98 places, 72 transitions and 304 arcs took 1 ms.
Total runtime 2815 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPt-PT-005A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/381
CTLFireability

FORMULA ShieldIIPt-PT-005A-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-005A-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-005A-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-005A-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-005A-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-005A-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-005A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679270667274

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/381/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/381/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/381/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/211 9/32 ShieldIIPt-PT-005A-CTLFireability-00 2155029 m, 431005 m/sec, 3120136 t fired, .

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1 CTL EXCL 10/211 16/32 ShieldIIPt-PT-005A-CTLFireability-00 3853770 m, 339748 m/sec, 5708308 t fired, .

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1 CTL EXCL 15/211 24/32 ShieldIIPt-PT-005A-CTLFireability-00 5669438 m, 363133 m/sec, 8527369 t fired, .

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1 CTL EXCL 20/211 31/32 ShieldIIPt-PT-005A-CTLFireability-00 7516688 m, 369450 m/sec, 11451520 t fired, .

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48 CTL EXCL 5/238 5/32 ShieldIIPt-PT-005A-CTLFireability-14 958655 m, 191731 m/sec, 3587828 t fired, .

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48 CTL EXCL 10/238 8/32 ShieldIIPt-PT-005A-CTLFireability-14 1765768 m, 161422 m/sec, 6799379 t fired, .

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48 CTL EXCL 15/238 12/32 ShieldIIPt-PT-005A-CTLFireability-14 2520837 m, 151013 m/sec, 9845582 t fired, .

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41 CTL EXCL 45/251 32/32 ShieldIIPt-PT-005A-CTLFireability-13 7227449 m, 139123 m/sec, 28563509 t fired, .

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32 CTL EXCL 5/289 7/32 ShieldIIPt-PT-005A-CTLFireability-09 1559027 m, 311805 m/sec, 3147060 t fired, .

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32 CTL EXCL 10/289 9/32 ShieldIIPt-PT-005A-CTLFireability-09 2028152 m, 93825 m/sec, 6287213 t fired, .

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32 CTL EXCL 15/289 12/32 ShieldIIPt-PT-005A-CTLFireability-09 2537530 m, 101875 m/sec, 9673279 t fired, .

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32 CTL EXCL 20/289 14/32 ShieldIIPt-PT-005A-CTLFireability-09 3050039 m, 102501 m/sec, 13066810 t fired, .

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32 CTL EXCL 25/289 16/32 ShieldIIPt-PT-005A-CTLFireability-09 3558555 m, 101703 m/sec, 16381723 t fired, .

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32 CTL EXCL 30/289 18/32 ShieldIIPt-PT-005A-CTLFireability-09 4077179 m, 103724 m/sec, 19710684 t fired, .

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32 CTL EXCL 35/289 21/32 ShieldIIPt-PT-005A-CTLFireability-09 4597480 m, 104060 m/sec, 23048139 t fired, .

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32 CTL EXCL 60/289 32/32 ShieldIIPt-PT-005A-CTLFireability-09 7208638 m, 102899 m/sec, 39458391 t fired, .

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6 CTL EXCL 19/823 22/32 ShieldIIPt-PT-005A-CTLFireability-01 4965085 m, 238396 m/sec, 17106925 t fired, .

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ShieldIIPt-PT-005A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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6 CTL EXCL 24/823 27/32 ShieldIIPt-PT-005A-CTLFireability-01 6168746 m, 240732 m/sec, 21370623 t fired, .

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6 CTL EXCL 29/823 32/32 ShieldIIPt-PT-005A-CTLFireability-01 7344744 m, 235199 m/sec, 25504699 t fired, .

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46 CTL EXCL 5/1086 9/32 ShieldIIPt-PT-005A-CTLFireability-14 2008863 m, 401772 m/sec, 4291053 t fired, .

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46 CTL EXCL 10/1086 16/32 ShieldIIPt-PT-005A-CTLFireability-14 3576844 m, 313596 m/sec, 7867757 t fired, .

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35 CTL EXCL 1/3246 3/32 ShieldIIPt-PT-005A-CTLFireability-10 547461 m, 109492 m/sec, 1312802 t fired, .

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35 CTL EXCL 6/3246 10/32 ShieldIIPt-PT-005A-CTLFireability-10 2211930 m, 332893 m/sec, 5581809 t fired, .

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35 CTL EXCL 11/3246 16/32 ShieldIIPt-PT-005A-CTLFireability-10 3738521 m, 305318 m/sec, 9615205 t fired, .

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35 CTL EXCL 16/3246 22/32 ShieldIIPt-PT-005A-CTLFireability-10 5207157 m, 293727 m/sec, 13567950 t fired, .

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35 CTL EXCL 21/3246 28/32 ShieldIIPt-PT-005A-CTLFireability-10 6656821 m, 289932 m/sec, 17518285 t fired, .

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ShieldIIPt-PT-005A-CTLFireability-12: CTL true CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-005A-CTLFireability-00: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-01: CONJ unknown CONJ
ShieldIIPt-PT-005A-CTLFireability-02: CTL true CTL model checker
ShieldIIPt-PT-005A-CTLFireability-03: AGAF false state space /EFEG
ShieldIIPt-PT-005A-CTLFireability-04: CTL false CTL model checker
ShieldIIPt-PT-005A-CTLFireability-05: CTL true CTL model checker
ShieldIIPt-PT-005A-CTLFireability-06: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-07: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-08: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-09: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-10: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-005A-CTLFireability-13: CTL unknown AGGR
ShieldIIPt-PT-005A-CTLFireability-14: CONJ false CTL model checker
ShieldIIPt-PT-005A-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPt-PT-005A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPt-PT-005A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715000242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPt-PT-005A.tgz
mv ShieldIIPt-PT-005A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;