Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715000194.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPt-PT-002A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715000194
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 6.1K Feb 25 17:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 17:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 17:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 17:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 17:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 165K Feb 25 17:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Feb 25 17:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 25 17:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 12K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-00
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-01
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-02
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-03
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-04
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-05
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-06
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-07
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-08
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-09
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-10
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-11
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-12
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-13
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-14
FORMULA_NAME ShieldIIPt-PT-002A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679269716918

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPt-PT-002A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 23:48:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 23:48:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 23:48:39] [INFO ] Load time of PNML (sax parser for PT used): 76 ms
[2023-03-19 23:48:39] [INFO ] Transformed 41 places.
[2023-03-19 23:48:39] [INFO ] Transformed 31 transitions.
[2023-03-19 23:48:39] [INFO ] Found NUPN structural information;
[2023-03-19 23:48:39] [INFO ] Parsed PT model containing 41 places and 31 transitions and 126 arcs in 186 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Initial state reduction rules removed 2 formulas.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
FORMULA ShieldIIPt-PT-002A-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldIIPt-PT-002A-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 41 out of 41 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 8 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
// Phase 1: matrix 30 rows 41 cols
[2023-03-19 23:48:39] [INFO ] Computed 19 place invariants in 3 ms
[2023-03-19 23:48:40] [INFO ] Implicit Places using invariants in 303 ms returned []
[2023-03-19 23:48:40] [INFO ] Invariant cache hit.
[2023-03-19 23:48:40] [INFO ] Implicit Places using invariants and state equation in 137 ms returned []
Implicit Place search using SMT with State Equation took 482 ms to find 0 implicit places.
[2023-03-19 23:48:40] [INFO ] Invariant cache hit.
[2023-03-19 23:48:40] [INFO ] Dead Transitions using invariants and state equation in 114 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 609 ms. Remains : 41/41 places, 30/30 transitions.
Support contains 41 out of 41 places after structural reductions.
[2023-03-19 23:48:40] [INFO ] Flatten gal took : 42 ms
[2023-03-19 23:48:40] [INFO ] Flatten gal took : 6 ms
[2023-03-19 23:48:40] [INFO ] Input system was already deterministic with 30 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 330 ms. (steps per millisecond=30 ) properties (out of 49) seen :47
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 23:48:41] [INFO ] Invariant cache hit.
[2023-03-19 23:48:41] [INFO ] [Real]Absence check using 19 positive place invariants in 11 ms returned sat
[2023-03-19 23:48:41] [INFO ] After 50ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 14 simplifications.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 4 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 5 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 41 transition count 29
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 40 transition count 29
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 39 transition count 28
Applied a total of 4 rules in 8 ms. Remains 39 /41 variables (removed 2) and now considering 28/30 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 39/41 places, 28/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 1 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Reduce places removed 1 places and 1 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 40 transition count 28
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 38 transition count 28
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 36 transition count 27
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 6 place count 36 transition count 26
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 8 place count 35 transition count 26
Applied a total of 8 rules in 5 ms. Remains 35 /41 variables (removed 6) and now considering 26/30 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 35/41 places, 26/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 1 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 26 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA ShieldIIPt-PT-002A-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 1 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 1 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 30/30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 2 ms
[2023-03-19 23:48:41] [INFO ] Input system was already deterministic with 30 transitions.
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Flatten gal took : 3 ms
[2023-03-19 23:48:41] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 23:48:41] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 41 places, 30 transitions and 124 arcs took 0 ms.
Total runtime 2027 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPt-PT-002A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/378
CTLFireability

FORMULA ShieldIIPt-PT-002A-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPt-PT-002A-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679269763019

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/378/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/378/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/378/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 10 (type EXCL) for 9 ShieldIIPt-PT-002A-CTLFireability-03
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type FNDP) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 60 (type SRCH) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SRCH) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 57 (type FNDP) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 58 (type EQUN) for ShieldIIPt-PT-002A-CTLFireability-14 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type FNDP) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 58 (type EQUN) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type SRCH) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 62 (type FNDP) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for ShieldIIPt-PT-002A-CTLFireability-14 (obsolete)
lola: FINISHED task # 63 (type EQUN) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : unknown
lola: FINISHED task # 10 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-03
lola: result : false
lola: markings : 179714
lola: fired transitions : 821983
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 52 ShieldIIPt-PT-002A-CTLFireability-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-15
lola: result : true
lola: markings : 833
lola: fired transitions : 1487
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 ShieldIIPt-PT-002A-CTLFireability-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-12
lola: result : true
lola: markings : 192
lola: fired transitions : 316
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 ShieldIIPt-PT-002A-CTLFireability-09
lola: time limit : 299 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-04: CONJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-05: DISJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 4/299 3/32 ShieldIIPt-PT-002A-CTLFireability-09 628111 m, 125622 m/sec, 4349252 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-04: CONJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-05: DISJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 9/299 4/32 ShieldIIPt-PT-002A-CTLFireability-09 819191 m, 38216 m/sec, 9222269 t fired, .

Time elapsed: 10 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 36 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-09
lola: result : false
lola: markings : 819201
lola: fired transitions : 10076279
lola: time used : 10.000000
lola: memory pages used : 4
lola: LAUNCH task # 33 (type EXCL) for 32 ShieldIIPt-PT-002A-CTLFireability-08
lola: time limit : 326 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-04: CONJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-05: DISJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 4/326 3/32 ShieldIIPt-PT-002A-CTLFireability-08 742107 m, 148421 m/sec, 5003158 t fired, .

Time elapsed: 15 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 33 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-08
lola: result : true
lola: markings : 819201
lola: fired transitions : 8812768
lola: time used : 8.000000
lola: memory pages used : 4
lola: LAUNCH task # 30 (type EXCL) for 29 ShieldIIPt-PT-002A-CTLFireability-07
lola: time limit : 358 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-08: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-04: CONJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-05: DISJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
30 CTL EXCL 1/358 2/32 ShieldIIPt-PT-002A-CTLFireability-07 395182 m, 79036 m/sec, 2197182 t fired, .

Time elapsed: 20 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 30 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-07
lola: result : false
lola: markings : 819201
lola: fired transitions : 7803170
lola: time used : 6.000000
lola: memory pages used : 4
lola: LAUNCH task # 27 (type EXCL) for 26 ShieldIIPt-PT-002A-CTLFireability-06
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-06
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 19 ShieldIIPt-PT-002A-CTLFireability-05
lola: time limit : 446 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-06: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-07: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-08: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-04: CONJ 0 2 0 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-05: DISJ 0 1 1 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 0/446 1/32 ShieldIIPt-PT-002A-CTLFireability-05 74745 m, 14949 m/sec, 274159 t fired, .

Time elapsed: 25 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 24 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-05
lola: result : true
lola: markings : 78977
lola: fired transitions : 291583
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 12 ShieldIIPt-PT-002A-CTLFireability-04
lola: time limit : 595 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-05: DISJ true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-06: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-07: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-08: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-04: CONJ 0 1 1 0 2 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 5/595 4/32 ShieldIIPt-PT-002A-CTLFireability-04 818922 m, 163784 m/sec, 5509505 t fired, .

Time elapsed: 30 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 15 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-04
lola: result : false
lola: markings : 819201
lola: fired transitions : 7780834
lola: time used : 8.000000
lola: memory pages used : 4
lola: LAUNCH task # 4 (type EXCL) for 3 ShieldIIPt-PT-002A-CTLFireability-01
lola: time limit : 891 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-04: CONJ false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-05: DISJ true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-06: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-07: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-08: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 2/891 2/32 ShieldIIPt-PT-002A-CTLFireability-01 477662 m, 95532 m/sec, 2737483 t fired, .

Time elapsed: 35 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 4 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-01
lola: result : false
lola: markings : 819201
lola: fired transitions : 7975875
lola: time used : 7.000000
lola: memory pages used : 4
lola: LAUNCH task # 1 (type EXCL) for 0 ShieldIIPt-PT-002A-CTLFireability-00
lola: time limit : 1186 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-04: CONJ false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-05: DISJ true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-06: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-07: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-08: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPt-PT-002A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPt-PT-002A-CTLFireability-14: DISJ 0 1 0 0 9 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 0/1186 2/32 ShieldIIPt-PT-002A-CTLFireability-00 275445 m, 55089 m/sec, 1083836 t fired, .

Time elapsed: 40 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 1 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-00
lola: result : false
lola: markings : 392105
lola: fired transitions : 1701517
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 48 (type EXCL) for 41 ShieldIIPt-PT-002A-CTLFireability-14
lola: time limit : 1779 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-14
lola: result : false
lola: markings : 4
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ShieldIIPt-PT-002A-CTLFireability-02
lola: time limit : 3559 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for ShieldIIPt-PT-002A-CTLFireability-02
lola: result : false
lola: markings : 145941
lola: fired transitions : 1075383
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPt-PT-002A-CTLFireability-00: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-01: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-02: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-03: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-04: CONJ false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-05: DISJ true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-06: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-07: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-08: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-09: CTL false CTL model checker
ShieldIIPt-PT-002A-CTLFireability-12: CTL true CTL model checker
ShieldIIPt-PT-002A-CTLFireability-14: DISJ false DISJ
ShieldIIPt-PT-002A-CTLFireability-15: CTL true CTL model checker


Time elapsed: 41 secs. Pages in use: 4

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPt-PT-002A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPt-PT-002A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715000194"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPt-PT-002A.tgz
mv ShieldIIPt-PT-002A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;