Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903714800050.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPs-PT-004A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903714800050
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 564K
-rw-r--r-- 1 mcc users 7.2K Feb 25 16:33 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 25 16:33 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 16:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 16:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 176K Feb 25 16:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 25 16:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Feb 25 16:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 34K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-00
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-01
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-02
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-03
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-04
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-05
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-06
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-07
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-08
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-09
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-10
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-11
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-12
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-13
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-14
FORMULA_NAME ShieldIIPs-PT-004A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679265351189

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPs-PT-004A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 22:35:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 22:35:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 22:35:53] [INFO ] Load time of PNML (sax parser for PT used): 39 ms
[2023-03-19 22:35:53] [INFO ] Transformed 103 places.
[2023-03-19 22:35:53] [INFO ] Transformed 99 transitions.
[2023-03-19 22:35:53] [INFO ] Found NUPN structural information;
[2023-03-19 22:35:53] [INFO ] Parsed PT model containing 103 places and 99 transitions and 438 arcs in 148 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 74 out of 103 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 18 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
// Phase 1: matrix 99 rows 103 cols
[2023-03-19 22:35:53] [INFO ] Computed 37 place invariants in 5 ms
[2023-03-19 22:35:54] [INFO ] Implicit Places using invariants in 296 ms returned []
[2023-03-19 22:35:54] [INFO ] Invariant cache hit.
[2023-03-19 22:35:54] [INFO ] Implicit Places using invariants and state equation in 305 ms returned []
Implicit Place search using SMT with State Equation took 657 ms to find 0 implicit places.
[2023-03-19 22:35:54] [INFO ] Invariant cache hit.
[2023-03-19 22:35:54] [INFO ] Dead Transitions using invariants and state equation in 191 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 868 ms. Remains : 103/103 places, 99/99 transitions.
Support contains 74 out of 103 places after structural reductions.
[2023-03-19 22:35:54] [INFO ] Flatten gal took : 39 ms
[2023-03-19 22:35:55] [INFO ] Flatten gal took : 19 ms
[2023-03-19 22:35:55] [INFO ] Input system was already deterministic with 99 transitions.
Incomplete random walk after 10000 steps, including 42 resets, run finished after 358 ms. (steps per millisecond=27 ) properties (out of 63) seen :61
Incomplete Best-First random walk after 10001 steps, including 8 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 9 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 22:35:55] [INFO ] Invariant cache hit.
[2023-03-19 22:35:55] [INFO ] [Real]Absence check using 37 positive place invariants in 15 ms returned sat
[2023-03-19 22:35:55] [INFO ] After 173ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-19 22:35:55] [INFO ] Flatten gal took : 20 ms
[2023-03-19 22:35:55] [INFO ] Flatten gal took : 19 ms
[2023-03-19 22:35:55] [INFO ] Input system was already deterministic with 99 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 26 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 7 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 9 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 1 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 10 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 2 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 8 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 1 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 10 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 1 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 1 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 9 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 17 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 20 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 21 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 1 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 7 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 3 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 12 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 20 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
Finished random walk after 596 steps, including 2 resets, run visited all 1 properties in 4 ms. (steps per millisecond=149 )
FORMULA ShieldIIPs-PT-004A-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 2 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 2 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in LTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Applied a total of 0 rules in 1 ms. Remains 103 /103 variables (removed 0) and now considering 99/99 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 103/103 places, 99/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 99 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 6 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 4 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 103/103 places, 99/99 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 103 transition count 98
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 102 transition count 98
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 101 transition count 97
Applied a total of 4 rules in 5 ms. Remains 101 /103 variables (removed 2) and now considering 97/99 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 101/103 places, 97/99 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 4 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Input system was already deterministic with 97 transitions.
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Flatten gal took : 5 ms
[2023-03-19 22:35:56] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 16 ms.
[2023-03-19 22:35:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 103 places, 99 transitions and 438 arcs took 1 ms.
Total runtime 3277 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPs-PT-004A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/381
CTLFireability

FORMULA ShieldIIPs-PT-004A-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldIIPs-PT-004A-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679265703062

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/381/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/381/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/381/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 24 (type EXCL) for 23 ShieldIIPs-PT-004A-CTLFireability-05
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 64 (type FNDP) for 3 ShieldIIPs-PT-004A-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 3 ShieldIIPs-PT-004A-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 3 ShieldIIPs-PT-004A-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 67 (type SRCH) for ShieldIIPs-PT-004A-CTLFireability-01
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 61 (type FNDP) for 3 ShieldIIPs-PT-004A-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type FNDP) for ShieldIIPs-PT-004A-CTLFireability-01
lola: result : true
lola: fired transitions : 25
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 61 (type FNDP) for ShieldIIPs-PT-004A-CTLFireability-01 (obsolete)
lola: CANCELED task # 65 (type EQUN) for ShieldIIPs-PT-004A-CTLFireability-01 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 65 (type EQUN) for ShieldIIPs-PT-004A-CTLFireability-01
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for (null) stopped (result already fixed).
lola: FINISHED task # 61 (type FNDP) for ShieldIIPs-PT-004A-CTLFireability-01
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldIIPs-PT-004A-CTLFireability-00: EG 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-08: F 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 5/225 5/32 ShieldIIPs-PT-004A-CTLFireability-05 959386 m, 191877 m/sec, 6113000 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
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ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 10/225 8/32 ShieldIIPs-PT-004A-CTLFireability-05 1822870 m, 172696 m/sec, 11878088 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
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24 CTL EXCL 15/225 12/32 ShieldIIPs-PT-004A-CTLFireability-05 2633212 m, 162068 m/sec, 17533578 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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24 CTL EXCL 20/225 15/32 ShieldIIPs-PT-004A-CTLFireability-05 3369113 m, 147180 m/sec, 23013494 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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24 CTL EXCL 25/225 18/32 ShieldIIPs-PT-004A-CTLFireability-05 4061105 m, 138398 m/sec, 28253505 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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24 CTL EXCL 30/225 21/32 ShieldIIPs-PT-004A-CTLFireability-05 4838675 m, 155514 m/sec, 33683497 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EG EXCL 4/822 8/32 ShieldIIPs-PT-004A-CTLFireability-00 2090109 m, 418021 m/sec, 3675847 t fired, .

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lola: result : false
lola: markings : 2349860
lola: fired transitions : 4127478
lola: time used : 5.000000
lola: memory pages used : 9
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lola: markings : 306
lola: fired transitions : 305
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 1642 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 4/1642 7/32 ShieldIIPs-PT-004A-CTLFireability-09 1447472 m, 289494 m/sec, 5561876 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 0 1 0 2 0 1 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 9/1642 13/32 ShieldIIPs-PT-004A-CTLFireability-09 2981398 m, 306785 m/sec, 11579983 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 0 1 0 2 0 1 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 14/1642 19/32 ShieldIIPs-PT-004A-CTLFireability-09 4450094 m, 293739 m/sec, 17343643 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 0 1 0 2 0 1 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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40 CTL EXCL 19/1642 25/32 ShieldIIPs-PT-004A-CTLFireability-09 5875327 m, 285046 m/sec, 22968293 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 0 1 0 2 0 1 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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40 CTL EXCL 24/1642 31/32 ShieldIIPs-PT-004A-CTLFireability-09 7344007 m, 293736 m/sec, 28883468 t fired, .

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ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker

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ShieldIIPs-PT-004A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-09: DISJ 0 0 0 0 2 0 2 0
ShieldIIPs-PT-004A-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldIIPs-PT-004A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPs-PT-004A-CTLFireability-00: EG false state space / EG
ShieldIIPs-PT-004A-CTLFireability-01: DISJ true findpath
ShieldIIPs-PT-004A-CTLFireability-02: CTL unknown AGGR
ShieldIIPs-PT-004A-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-04: CTL unknown AGGR
ShieldIIPs-PT-004A-CTLFireability-05: CTL unknown AGGR
ShieldIIPs-PT-004A-CTLFireability-06: CTL unknown AGGR
ShieldIIPs-PT-004A-CTLFireability-07: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-08: F false state space / EG
ShieldIIPs-PT-004A-CTLFireability-09: DISJ unknown DISJ
ShieldIIPs-PT-004A-CTLFireability-11: CTL unknown AGGR
ShieldIIPs-PT-004A-CTLFireability-12: CTL unknown AGGR
ShieldIIPs-PT-004A-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-004A-CTLFireability-14: DISJ true CTL model checker
ShieldIIPs-PT-004A-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPs-PT-004A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPs-PT-004A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903714800050"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPs-PT-004A.tgz
mv ShieldIIPs-PT-004A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;