About the Execution of LoLa+red for ShieldIIPs-PT-001B
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
203.655 | 4216.00 | 9718.00 | 24.90 | FFTFFFTTFTTTTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903714800010.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldIIPs-PT-001B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903714800010
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 6.9K Feb 25 15:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 25 15:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 15:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 15:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 15:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 111K Feb 25 15:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 15:44 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 25 15:44 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 17K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-00
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-01
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-02
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-03
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-04
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-05
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-06
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-07
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-08
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-09
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-10
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-11
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-12
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-13
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-14
FORMULA_NAME ShieldIIPs-PT-001B-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679265273899
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldIIPs-PT-001B
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 22:34:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 22:34:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 22:34:35] [INFO ] Load time of PNML (sax parser for PT used): 28 ms
[2023-03-19 22:34:35] [INFO ] Transformed 63 places.
[2023-03-19 22:34:35] [INFO ] Transformed 62 transitions.
[2023-03-19 22:34:35] [INFO ] Found NUPN structural information;
[2023-03-19 22:34:35] [INFO ] Parsed PT model containing 63 places and 62 transitions and 184 arcs in 106 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 48 out of 63 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Applied a total of 0 rules in 9 ms. Remains 63 /63 variables (removed 0) and now considering 62/62 (removed 0) transitions.
// Phase 1: matrix 62 rows 63 cols
[2023-03-19 22:34:36] [INFO ] Computed 10 place invariants in 4 ms
[2023-03-19 22:34:36] [INFO ] Implicit Places using invariants in 192 ms returned []
[2023-03-19 22:34:36] [INFO ] Invariant cache hit.
[2023-03-19 22:34:36] [INFO ] Implicit Places using invariants and state equation in 88 ms returned []
Implicit Place search using SMT with State Equation took 311 ms to find 0 implicit places.
[2023-03-19 22:34:36] [INFO ] Invariant cache hit.
[2023-03-19 22:34:36] [INFO ] Dead Transitions using invariants and state equation in 78 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 400 ms. Remains : 63/63 places, 62/62 transitions.
Support contains 48 out of 63 places after structural reductions.
[2023-03-19 22:34:36] [INFO ] Flatten gal took : 27 ms
[2023-03-19 22:34:36] [INFO ] Flatten gal took : 7 ms
[2023-03-19 22:34:36] [INFO ] Input system was already deterministic with 62 transitions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 296 ms. (steps per millisecond=33 ) properties (out of 55) seen :50
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 5) seen :3
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=1250 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-19 22:34:37] [INFO ] Invariant cache hit.
[2023-03-19 22:34:37] [INFO ] [Real]Absence check using 10 positive place invariants in 2 ms returned sat
[2023-03-19 22:34:37] [INFO ] After 77ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:1
[2023-03-19 22:34:37] [INFO ] [Nat]Absence check using 10 positive place invariants in 4 ms returned sat
[2023-03-19 22:34:37] [INFO ] After 22ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :1
[2023-03-19 22:34:37] [INFO ] Deduced a trap composed of 18 places in 41 ms of which 3 ms to minimize.
[2023-03-19 22:34:37] [INFO ] Deduced a trap composed of 10 places in 31 ms of which 0 ms to minimize.
[2023-03-19 22:34:37] [INFO ] Deduced a trap composed of 21 places in 25 ms of which 0 ms to minimize.
[2023-03-19 22:34:37] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 3 trap constraints in 111 ms
[2023-03-19 22:34:37] [INFO ] After 137ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :0
[2023-03-19 22:34:37] [INFO ] After 175ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-19 22:34:37] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 7 ms
FORMULA ShieldIIPs-PT-001B-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 6 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 62 transitions.
Support contains 47 out of 63 places (down from 48) after GAL structural reductions.
Computed a total of 16 stabilizing places and 16 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 59 transition count 58
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 59 transition count 58
Applied a total of 8 rules in 3 ms. Remains 59 /63 variables (removed 4) and now considering 58/62 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 59/63 places, 58/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 4 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 58 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 56 transition count 55
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 56 transition count 55
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 55 transition count 54
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 55 transition count 54
Applied a total of 16 rules in 5 ms. Remains 55 /63 variables (removed 8) and now considering 54/62 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 55/63 places, 54/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 62 transition count 56
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 57 transition count 56
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 10 place count 57 transition count 52
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 18 place count 53 transition count 52
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 25 place count 46 transition count 45
Iterating global reduction 2 with 7 rules applied. Total rules applied 32 place count 46 transition count 45
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 32 place count 46 transition count 42
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 38 place count 43 transition count 42
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 66 place count 29 transition count 28
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 67 place count 28 transition count 27
Applied a total of 67 rules in 17 ms. Remains 28 /63 variables (removed 35) and now considering 27/62 (removed 35) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 28/63 places, 27/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 27 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 63 transition count 57
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 58 transition count 57
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 10 place count 58 transition count 51
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 22 place count 52 transition count 51
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 27 place count 47 transition count 46
Iterating global reduction 2 with 5 rules applied. Total rules applied 32 place count 47 transition count 46
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 32 place count 47 transition count 43
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 38 place count 44 transition count 43
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 62 place count 32 transition count 31
Applied a total of 62 rules in 7 ms. Remains 32 /63 variables (removed 31) and now considering 31/62 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 32/63 places, 31/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 57 transition count 56
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 57 transition count 56
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 56 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 56 transition count 55
Applied a total of 14 rules in 3 ms. Remains 56 /63 variables (removed 7) and now considering 55/62 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/63 places, 55/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 63 transition count 57
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 58 transition count 57
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 10 place count 58 transition count 51
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 22 place count 52 transition count 51
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 28 place count 46 transition count 45
Iterating global reduction 2 with 6 rules applied. Total rules applied 34 place count 46 transition count 45
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 34 place count 46 transition count 42
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 40 place count 43 transition count 42
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 62 place count 32 transition count 31
Applied a total of 62 rules in 6 ms. Remains 32 /63 variables (removed 31) and now considering 31/62 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 32/63 places, 31/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 57 transition count 56
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 57 transition count 56
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 56 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 56 transition count 55
Applied a total of 14 rules in 3 ms. Remains 56 /63 variables (removed 7) and now considering 55/62 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/63 places, 55/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 57 transition count 56
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 57 transition count 56
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 56 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 56 transition count 55
Applied a total of 14 rules in 2 ms. Remains 56 /63 variables (removed 7) and now considering 55/62 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/63 places, 55/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 62 transition count 57
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 58 transition count 57
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 8 place count 58 transition count 53
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 16 place count 54 transition count 53
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 21 place count 49 transition count 48
Iterating global reduction 2 with 5 rules applied. Total rules applied 26 place count 49 transition count 48
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 2 with 18 rules applied. Total rules applied 44 place count 40 transition count 39
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 45 place count 39 transition count 38
Applied a total of 45 rules in 8 ms. Remains 39 /63 variables (removed 24) and now considering 38/62 (removed 24) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 39/63 places, 38/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 38 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 62 transition count 56
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 57 transition count 56
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 10 place count 57 transition count 51
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 20 place count 52 transition count 51
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 25 place count 47 transition count 46
Iterating global reduction 2 with 5 rules applied. Total rules applied 30 place count 47 transition count 46
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 30 place count 47 transition count 43
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 36 place count 44 transition count 43
Performed 13 Post agglomeration using F-continuation condition.Transition count delta: 13
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 2 with 26 rules applied. Total rules applied 62 place count 31 transition count 30
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 63 place count 30 transition count 29
Applied a total of 63 rules in 7 ms. Remains 30 /63 variables (removed 33) and now considering 29/62 (removed 33) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 30/63 places, 29/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 29 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 62 transition count 56
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 6 rules applied. Total rules applied 11 place count 57 transition count 55
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 12 place count 56 transition count 55
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 5 Pre rules applied. Total rules applied 12 place count 56 transition count 50
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 22 place count 51 transition count 50
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 29 place count 44 transition count 43
Iterating global reduction 3 with 7 rules applied. Total rules applied 36 place count 44 transition count 43
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 36 place count 44 transition count 40
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 42 place count 41 transition count 40
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 3 with 28 rules applied. Total rules applied 70 place count 27 transition count 26
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 71 place count 26 transition count 25
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 72 place count 25 transition count 25
Applied a total of 72 rules in 7 ms. Remains 25 /63 variables (removed 38) and now considering 25/62 (removed 37) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 25/63 places, 25/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 25 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 56 transition count 55
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 56 transition count 55
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 55 transition count 54
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 55 transition count 54
Applied a total of 16 rules in 8 ms. Remains 55 /63 variables (removed 8) and now considering 54/62 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 55/63 places, 54/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 57 transition count 56
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 57 transition count 56
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 56 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 56 transition count 55
Applied a total of 14 rules in 2 ms. Remains 56 /63 variables (removed 7) and now considering 55/62 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 56/63 places, 55/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 62 transition count 55
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 12 place count 56 transition count 55
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 12 place count 56 transition count 49
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 24 place count 50 transition count 49
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 31 place count 43 transition count 42
Iterating global reduction 2 with 7 rules applied. Total rules applied 38 place count 43 transition count 42
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 38 place count 43 transition count 39
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 44 place count 40 transition count 39
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 68 place count 28 transition count 27
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 2 with 1 rules applied. Total rules applied 69 place count 27 transition count 26
Applied a total of 69 rules in 6 ms. Remains 27 /63 variables (removed 36) and now considering 26/62 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 27/63 places, 26/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 1 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 26 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 62/62 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 57 transition count 56
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 57 transition count 56
Applied a total of 12 rules in 1 ms. Remains 57 /63 variables (removed 6) and now considering 56/62 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 57/63 places, 56/62 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 2 ms
[2023-03-19 22:34:37] [INFO ] Input system was already deterministic with 56 transitions.
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Flatten gal took : 3 ms
[2023-03-19 22:34:37] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 22:34:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 63 places, 62 transitions and 184 arcs took 1 ms.
Total runtime 1823 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldIIPs-PT-001B
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability
FORMULA ShieldIIPs-PT-001B-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldIIPs-PT-001B-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679265278115
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH task # 19 (type EXCL) for 18 ShieldIIPs-PT-001B-CTLFireability-02
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 19 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-02
lola: result : true
lola: markings : 69
lola: fired transitions : 68
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 38 (type EXCL) for 37 ShieldIIPs-PT-001B-CTLFireability-08
lola: time limit : 120 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-08
lola: result : false
lola: markings : 242
lola: fired transitions : 484
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 ShieldIIPs-PT-001B-CTLFireability-04
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 25 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-04
lola: result : false
lola: markings : 347
lola: fired transitions : 789
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 ShieldIIPs-PT-001B-CTLFireability-03
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 22 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-03
lola: result : false
lola: markings : 229
lola: fired transitions : 467
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 ShieldIIPs-PT-001B-CTLFireability-06
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-06
lola: result : true
lola: markings : 183
lola: fired transitions : 400
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 3 (type EXCL) for 0 ShieldIIPs-PT-001B-CTLFireability-00
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 3 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-00
lola: result : false
lola: markings : 461
lola: fired transitions : 712
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 16 (type EXCL) for 11 ShieldIIPs-PT-001B-CTLFireability-01
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 16 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-01
lola: result : false
lola: markings : 298
lola: fired transitions : 539
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 35 (type EXCL) for 30 ShieldIIPs-PT-001B-CTLFireability-07
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 35 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-07
lola: result : true
lola: markings : 219
lola: fired transitions : 221
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 57 (type EXCL) for 56 ShieldIIPs-PT-001B-CTLFireability-13
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 71 (type FNDP) for 46 ShieldIIPs-PT-001B-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type EQUN) for 46 ShieldIIPs-PT-001B-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type SRCH) for 46 ShieldIIPs-PT-001B-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type SRCH) for ShieldIIPs-PT-001B-CTLFireability-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 57 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-13
lola: result : false
lola: markings : 401
lola: fired transitions : 636
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 49 ShieldIIPs-PT-001B-CTLFireability-12
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-12
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 49 ShieldIIPs-PT-001B-CTLFireability-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-12
lola: result : true
lola: markings : 236
lola: fired transitions : 238
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 73 (type EXCL) for 46 ShieldIIPs-PT-001B-CTLFireability-11
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 73 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-11
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for ShieldIIPs-PT-001B-CTLFireability-11 (obsolete)
lola: CANCELED task # 72 (type EQUN) for ShieldIIPs-PT-001B-CTLFireability-11 (obsolete)
lola: LAUNCH task # 70 (type EXCL) for 59 ShieldIIPs-PT-001B-CTLFireability-14
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type FNDP) for ShieldIIPs-PT-001B-CTLFireability-11
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 72 (type EQUN) for ShieldIIPs-PT-001B-CTLFireability-11
lola: result : unknown
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 70 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-14
lola: result : true
lola: markings : 3392
lola: fired transitions : 12353
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 63 (type EXCL) for 62 ShieldIIPs-PT-001B-CTLFireability-15
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-15
lola: result : false
lola: markings : 33006
lola: fired transitions : 88031
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 ShieldIIPs-PT-001B-CTLFireability-10
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-10
lola: result : true
lola: markings : 466
lola: fired transitions : 1757
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 ShieldIIPs-PT-001B-CTLFireability-09
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for ShieldIIPs-PT-001B-CTLFireability-09
lola: result : true
lola: markings : 3184
lola: fired transitions : 11720
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldIIPs-PT-001B-CTLFireability-00: CONJ false CTL model checker
ShieldIIPs-PT-001B-CTLFireability-01: CONJ false CTL model checker
ShieldIIPs-PT-001B-CTLFireability-02: EFEG true state space /EFEG
ShieldIIPs-PT-001B-CTLFireability-03: CTL false CTL model checker
ShieldIIPs-PT-001B-CTLFireability-04: CTL false CTL model checker
ShieldIIPs-PT-001B-CTLFireability-06: CTL true CTL model checker
ShieldIIPs-PT-001B-CTLFireability-07: DISJ true CTL model checker
ShieldIIPs-PT-001B-CTLFireability-08: CTL false CTL model checker
ShieldIIPs-PT-001B-CTLFireability-09: CTL true CTL model checker
ShieldIIPs-PT-001B-CTLFireability-10: CTL true CTL model checker
ShieldIIPs-PT-001B-CTLFireability-11: EF true state space
ShieldIIPs-PT-001B-CTLFireability-12: CONJ true CONJ
ShieldIIPs-PT-001B-CTLFireability-13: CTL false CTL model checker
ShieldIIPs-PT-001B-CTLFireability-14: EFAG false tscc_search
ShieldIIPs-PT-001B-CTLFireability-15: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldIIPs-PT-001B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldIIPs-PT-001B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903714800010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldIIPs-PT-001B.tgz
mv ShieldIIPs-PT-001B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;