fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r390-oct2-167903714400418
Last Updated
May 14, 2023

About the Execution of LoLA for ShieldPPPs-PT-005A

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2131.575 165831.00 151567.00 20.40 ?TFF???TFFTTFF?T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r390-oct2-167903714400418.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ShieldPPPs-PT-005A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r390-oct2-167903714400418
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 580K
-rw-r--r-- 1 mcc users 7.4K Feb 26 01:51 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 01:51 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 01:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 01:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 01:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 147K Feb 26 01:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 01:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 102K Feb 26 01:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:58 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:58 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 44K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-00
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-01
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-02
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-03
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-04
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-05
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-06
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-07
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-08
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-09
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-10
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-11
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-12
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-13
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-14
FORMULA_NAME ShieldPPPs-PT-005A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679247097113

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldPPPs-PT-005A
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT ShieldPPPs-PT-005A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA ShieldPPPs-PT-005A-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-005A-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679247262944

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 25 (type EXCL) for 24 ShieldPPPs-PT-005A-CTLFireability-08
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 25 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-08
lola: result : false
lola: markings : 460
lola: fired transitions : 462
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ShieldPPPs-PT-005A-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 4 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-01
lola: result : true
lola: markings : 116
lola: fired transitions : 117
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 45 (type EXCL) for 44 ShieldPPPs-PT-005A-CTLFireability-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 57 (type FNDP) for 6 ShieldPPPs-PT-005A-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 6 ShieldPPPs-PT-005A-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SRCH) for 6 ShieldPPPs-PT-005A-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 45 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-12
lola: result : false
lola: markings : 191
lola: fired transitions : 192
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 39 (type EXCL) for 38 ShieldPPPs-PT-005A-CTLFireability-10
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 60 (type SRCH) for ShieldPPPs-PT-005A-CTLFireability-02
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 57 (type FNDP) for ShieldPPPs-PT-005A-CTLFireability-02
lola: result : true
lola: fired transitions : 17
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 58 (type EQUN) for ShieldPPPs-PT-005A-CTLFireability-02 (obsolete)
lola: FINISHED task # 58 (type EQUN) for ShieldPPPs-PT-005A-CTLFireability-02
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 39 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-10
lola: result : true
lola: markings : 23819
lola: fired transitions : 34726
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 53 ShieldPPPs-PT-005A-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-15
lola: result : true
lola: markings : 1204
lola: fired transitions : 2015
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 ShieldPPPs-PT-005A-CTLFireability-14
lola: time limit : 300 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 3 0 0 3 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 5/300 8/32 ShieldPPPs-PT-005A-CTLFireability-14 1854992 m, 370998 m/sec, 7146798 t fired, .

Time elapsed: 5 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 3 0 0 3 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 10/300 16/32 ShieldPPPs-PT-005A-CTLFireability-14 3634798 m, 355961 m/sec, 14635347 t fired, .

Time elapsed: 10 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 3 0 0 3 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 15/300 23/32 ShieldPPPs-PT-005A-CTLFireability-14 5336777 m, 340395 m/sec, 22106477 t fired, .

Time elapsed: 15 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 3 0 0 3 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 20/300 30/32 ShieldPPPs-PT-005A-CTLFireability-14 7027219 m, 338088 m/sec, 29396179 t fired, .

Time elapsed: 20 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 51 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 3 0 0 3 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 25 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 34 (type EXCL) for 27 ShieldPPPs-PT-005A-CTLFireability-09
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 ShieldPPPs-PT-005A-CTLFireability-06
lola: time limit : 357 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/357 9/32 ShieldPPPs-PT-005A-CTLFireability-06 2087703 m, 417540 m/sec, 7071829 t fired, .

Time elapsed: 30 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/357 17/32 ShieldPPPs-PT-005A-CTLFireability-06 3903170 m, 363093 m/sec, 13503800 t fired, .

Time elapsed: 35 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/357 24/32 ShieldPPPs-PT-005A-CTLFireability-06 5646701 m, 348706 m/sec, 19933383 t fired, .

Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/357 31/32 ShieldPPPs-PT-005A-CTLFireability-06 7279537 m, 326567 m/sec, 25678763 t fired, .

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 ShieldPPPs-PT-005A-CTLFireability-05
lola: time limit : 394 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/394 6/32 ShieldPPPs-PT-005A-CTLFireability-05 1221967 m, 244393 m/sec, 7165562 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/394 10/32 ShieldPPPs-PT-005A-CTLFireability-05 2145862 m, 184779 m/sec, 14103165 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/394 14/32 ShieldPPPs-PT-005A-CTLFireability-05 3124530 m, 195733 m/sec, 20710429 t fired, .

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/394 17/32 ShieldPPPs-PT-005A-CTLFireability-05 3946910 m, 164476 m/sec, 27069763 t fired, .

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/394 22/32 ShieldPPPs-PT-005A-CTLFireability-05 5024664 m, 215550 m/sec, 34097667 t fired, .

Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 30/394 26/32 ShieldPPPs-PT-005A-CTLFireability-05 6009245 m, 196916 m/sec, 40855058 t fired, .

Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 35/394 30/32 ShieldPPPs-PT-005A-CTLFireability-05 7081936 m, 214538 m/sec, 47833527 t fired, .

Time elapsed: 85 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 90 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 ShieldPPPs-PT-005A-CTLFireability-04
lola: time limit : 438 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/438 10/32 ShieldPPPs-PT-005A-CTLFireability-04 2225006 m, 445001 m/sec, 7009795 t fired, .

Time elapsed: 95 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/438 17/32 ShieldPPPs-PT-005A-CTLFireability-04 3974399 m, 349878 m/sec, 13491982 t fired, .

Time elapsed: 100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/438 25/32 ShieldPPPs-PT-005A-CTLFireability-04 5838129 m, 372746 m/sec, 20028657 t fired, .

Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/438 32/32 ShieldPPPs-PT-005A-CTLFireability-04 7539180 m, 340210 m/sec, 26437378 t fired, .

Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 10 (type EXCL) for 9 ShieldPPPs-PT-005A-CTLFireability-03
lola: time limit : 497 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-03
lola: result : false
lola: markings : 685
lola: fired transitions : 686
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ShieldPPPs-PT-005A-CTLFireability-00
lola: time limit : 580 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/580 5/32 ShieldPPPs-PT-005A-CTLFireability-00 1000483 m, 200096 m/sec, 6792808 t fired, .

Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/580 8/32 ShieldPPPs-PT-005A-CTLFireability-00 1823459 m, 164595 m/sec, 13259755 t fired, .

Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/580 11/32 ShieldPPPs-PT-005A-CTLFireability-00 2550104 m, 145329 m/sec, 19731563 t fired, .

Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/580 15/32 ShieldPPPs-PT-005A-CTLFireability-00 3390767 m, 168132 m/sec, 25894463 t fired, .

Time elapsed: 135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/580 18/32 ShieldPPPs-PT-005A-CTLFireability-00 4050196 m, 131885 m/sec, 32043268 t fired, .

Time elapsed: 140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/580 21/32 ShieldPPPs-PT-005A-CTLFireability-00 4991253 m, 188211 m/sec, 38896615 t fired, .

Time elapsed: 145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/580 25/32 ShieldPPPs-PT-005A-CTLFireability-00 5817335 m, 165216 m/sec, 45343893 t fired, .

Time elapsed: 150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/580 28/32 ShieldPPPs-PT-005A-CTLFireability-00 6629257 m, 162384 m/sec, 51741437 t fired, .

Time elapsed: 155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 45/580 32/32 ShieldPPPs-PT-005A-CTLFireability-00 7505135 m, 175175 m/sec, 58218554 t fired, .

Time elapsed: 160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-005A-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-005A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-09: DISJ 0 2 0 0 4 0 0 0
ShieldPPPs-PT-005A-CTLFireability-11: EU 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-005A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 42 (type EXCL) for 41 ShieldPPPs-PT-005A-CTLFireability-11
lola: time limit : 687 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-11
lola: result : true
lola: markings : 209
lola: fired transitions : 208
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 27 ShieldPPPs-PT-005A-CTLFireability-09
lola: time limit : 858 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 27 ShieldPPPs-PT-005A-CTLFireability-09
lola: time limit : 1145 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-09
lola: result : false
lola: markings : 30196
lola: fired transitions : 239889
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 ShieldPPPs-PT-005A-CTLFireability-13
lola: time limit : 1717 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-13
lola: result : false
lola: markings : 1198
lola: fired transitions : 2041
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 ShieldPPPs-PT-005A-CTLFireability-07
lola: time limit : 3435 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for ShieldPPPs-PT-005A-CTLFireability-07
lola: result : true
lola: markings : 557
lola: fired transitions : 575
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-005A-CTLFireability-00: CTL unknown AGGR
ShieldPPPs-PT-005A-CTLFireability-01: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-02: AG false findpath
ShieldPPPs-PT-005A-CTLFireability-03: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-04: CTL unknown AGGR
ShieldPPPs-PT-005A-CTLFireability-05: CTL unknown AGGR
ShieldPPPs-PT-005A-CTLFireability-06: CTL unknown AGGR
ShieldPPPs-PT-005A-CTLFireability-07: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-08: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-09: DISJ false DISJ
ShieldPPPs-PT-005A-CTLFireability-10: CTL true CTL model checker
ShieldPPPs-PT-005A-CTLFireability-11: EU true state space /EU
ShieldPPPs-PT-005A-CTLFireability-12: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-13: CTL false CTL model checker
ShieldPPPs-PT-005A-CTLFireability-14: CTL unknown AGGR
ShieldPPPs-PT-005A-CTLFireability-15: CTL true CTL model checker


Time elapsed: 165 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldPPPs-PT-005A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ShieldPPPs-PT-005A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r390-oct2-167903714400418"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldPPPs-PT-005A.tgz
mv ShieldPPPs-PT-005A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;