Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r382-smll-167891832500242.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool gold2022
Input is SatelliteMemory-PT-X03000Y0094, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r382-smll-167891832500242
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 6.5K Feb 26 12:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 12:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 12:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 12:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.2K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 12 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:50 LTLFireability.xml
-rwxr-xr-x 1 mcc users 5.5K Mar 5 18:23 model.pnml
-rw-r--r-- 1 mcc users 14K Feb 26 13:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 153K Feb 26 13:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 26 13:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 26 13:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:50 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:50 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-00
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-01
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-02
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-03
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-04
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-05
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-06
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-07
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-08
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-09
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-10
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-11
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-12
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-13
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-14
FORMULA_NAME SatelliteMemory-PT-X03000Y0094-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679269959691

gold2022
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> gold2022 --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.7bGDk2NIVs
MF=/home/mcc/BenchKit/bin/tmp/tmp.1s4qYVyXmS
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.7bGDk2NIVs --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.1s4qYVyXmS -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml

Time left: 3561

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
No solution found



Time left: 3259
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.09164 on verification
@@@0.10,59420@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.1s4qYVyXmS /home/mcc/BenchKit/bin/tmp/tmp.7bGDk2NIVs --binary-query-io 1 -x 2 -n

FORMULA SatelliteMemory-PT-X03000Y0094-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3259
------------------- QUERY 3 ----------------------
No solution found
Command terminated by signal 9
@@@103.88,6287184@@@
Command terminated by signal 9
@@@160.33,7529308@@@
Command terminated by signal 9
@@@293.46,10100688@@@


Time left: 2956
------------------- QUERY 4 ----------------------
No solution found
Command terminated by signal 9
@@@107.49,6884336@@@
Command terminated by signal 9
@@@203.43,9353128@@@


Time left: 2654
------------------- QUERY 5 ----------------------
No solution found
Command terminated by signal 9
@@@100.08,5764068@@@
Command terminated by signal 9
@@@152.83,7234352@@@
Command terminated by signal 9
@@@274.62,12186212@@@


Time left: 2352
------------------- QUERY 6 ----------------------
No solution found



Time left: 2050
------------------- QUERY 7 ----------------------
No solution found
Command terminated by signal 9
@@@80.52,5607020@@@
Command terminated by signal 9
@@@126.79,6678408@@@
Command terminated by signal 9
@@@223.67,11766456@@@


Time left: 1749
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.161014 on verification
@@@0.18,61876@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.1s4qYVyXmS /home/mcc/BenchKit/bin/tmp/tmp.7bGDk2NIVs --binary-query-io 1 -x 8 -n

FORMULA SatelliteMemory-PT-X03000Y0094-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1748
------------------- QUERY 9 ----------------------
No solution found
Command terminated by signal 9
@@@85.99,5952820@@@
Command terminated by signal 9
@@@140.02,7148044@@@
Command terminated by signal 9
@@@268.87,12329448@@@


Time left: 1447
------------------- QUERY 10 ----------------------
No solution found
Command terminated by signal 9
@@@75.88,5603804@@@
Command terminated by signal 9
@@@121.92,6752528@@@
Command terminated by signal 9
@@@214.88,11844492@@@


Time left: 1145
------------------- QUERY 11 ----------------------
No solution found



Time left: 842
------------------- QUERY 12 ----------------------
No solution found
Command terminated by signal 9
@@@130.03,7587928@@@
Command terminated by signal 9
@@@279.52,13182620@@@


Time left: 540
------------------- QUERY 13 ----------------------
No solution found
Command terminated by signal 9
@@@81.83,6016368@@@
Command terminated by signal 9
@@@134.00,7184112@@@
Command terminated by signal 9
@@@251.29,12087784@@@


Time left: 238
------------------- QUERY 14 ----------------------
No solution found
Command terminated by signal 9
@@@150.03,7456952@@@


Time left: -3
Out of time, terminating!
terminated-with-cleanup

BK_STOP 1679273552497

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X03000Y0094"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gold2022"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool gold2022"
echo " Input is SatelliteMemory-PT-X03000Y0094, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r382-smll-167891832500242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X03000Y0094.tgz
mv SatelliteMemory-PT-X03000Y0094 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;