Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r363-smll-167891814600574.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is SharedMemory-COL-000050, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r363-smll-167891814600574
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 6.3K Feb 25 16:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 25 16:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 25 15:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 15:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 18:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 149K Feb 25 18:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 17:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 25 17:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 14K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-00
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-01
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-02
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-03
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-04
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-05
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-06
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-07
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-08
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-09
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-10
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-11
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-12
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-13
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-14
FORMULA_NAME SharedMemory-COL-000050-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679273581609

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-COL-000050
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-20 00:53:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-20 00:53:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 00:53:05] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-20 00:53:05] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-20 00:53:05] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 645 ms
[2023-03-20 00:53:05] [INFO ] Imported 6 HL places and 5 HL transitions for a total of 2701 PT places and 7600.0 transition bindings in 24 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 44 ms.
Working with output stream class java.io.PrintStream
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 00:53:05] [INFO ] Built PT skeleton of HLPN with 6 places and 5 transitions 16 arcs in 5 ms.
[2023-03-20 00:53:05] [INFO ] Skeletonized 14 HLPN properties in 2 ms.
Remains 14 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
[2023-03-20 00:53:06] [INFO ] Flatten gal took : 20 ms
[2023-03-20 00:53:06] [INFO ] Flatten gal took : 3 ms
Domain [P(50), P(50)] of place Ext_Mem_Acc breaks symmetries in sort P
[2023-03-20 00:53:06] [INFO ] Unfolded HLPN to a Petri net with 2701 places and 5100 transitions 20200 arcs in 133 ms.
[2023-03-20 00:53:06] [INFO ] Unfolded 14 HLPN properties in 7 ms.
Deduced a syphon composed of 50 places in 9 ms
Reduce places removed 50 places and 50 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 8144 ms. (steps per millisecond=1 ) properties (out of 14) seen :2
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 4149 ms. (steps per millisecond=2 ) properties (out of 12) seen :1
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Interrupted Best-First random walk after 5947 steps, including 1 resets, run timeout after 5047 ms. (steps per millisecond=1 ) properties seen 0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 703 ms. (steps per millisecond=14 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 2488 ms. (steps per millisecond=4 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 4833 ms. (steps per millisecond=2 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 2161 ms. (steps per millisecond=4 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 2426 ms. (steps per millisecond=4 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 2384 ms. (steps per millisecond=4 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 775 ms. (steps per millisecond=12 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
// Phase 1: matrix 5050 rows 2651 cols
[2023-03-20 00:53:40] [INFO ] Computed 101 place invariants in 334 ms
[2023-03-20 00:53:57] [INFO ] [Real]Absence check using 101 positive place invariants in 129 ms returned sat
[2023-03-20 00:54:00] [INFO ] After 2791ms SMT Verify possible using state equation in real domain returned unsat :6 sat :1 real:4
[2023-03-20 00:54:00] [INFO ] After 3129ms SMT Verify possible using trap constraints in real domain returned unsat :6 sat :1 real:4
Attempting to minimize the solution found.
Minimization took 284 ms.
[2023-03-20 00:54:01] [INFO ] After 5981ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :1 real:4
[2023-03-20 00:54:02] [INFO ] [Nat]Absence check using 101 positive place invariants in 147 ms returned sat
[2023-03-20 00:54:06] [INFO ] After 2811ms SMT Verify possible using state equation in natural domain returned unsat :10 sat :1
[2023-03-20 00:54:06] [INFO ] After 3102ms SMT Verify possible using trap constraints in natural domain returned unsat :10 sat :1
Attempting to minimize the solution found.
Minimization took 194 ms.
[2023-03-20 00:54:06] [INFO ] After 5431ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :1
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 11 Parikh solutions to 1 different solutions.
Finished Parikh walk after 50 steps, including 0 resets, run visited all 1 properties in 4 ms. (steps per millisecond=12 )
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 12 ms.
All properties solved without resorting to model-checking.
Total runtime 61524 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running SharedMemory (COL), instance 000050
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart

GOT IT HERE. BS
Petri model created: 6 places, 5 transitions, 16 arcs.
Final Score: 15.017
Took : 0 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-00 (reachable &!potential( ( (tk(P2)) <= (tk(P3)) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-01 (reachable &!potential( ( (! ( ( ( 24 ) <= (tk(P1)) ) | ( ( 65 ) <= (tk(P1)) ) )) | ( ( (! ( ( ( (tk(P6)) <= (tk(P3)) ) & ( ( ( (tk(P5)) <= (tk(P5)) ) | ( (tk(P4)) <= (tk(P4)) ) ) | ( ( (tk(P6)) <= (tk(P4)) ) & ( (tk(P1)) <= (tk(P1)) ) ) ) ) & ( (tk(P5)) <= ( 69 ) ) )) | ( ( 27 ) <= (tk(P6)) ) ) | ( ( ( ( (tk(P4)) <= (tk(P6)) ) & ( (tk(P3)) <= ( 100 ) ) ) & ( ( ( ( (tk(P1)) <= ( 69 ) ) & ( ( 63 ) <= (tk(P2)) ) ) & ( (tk(P4)) <= ( 56 ) ) ) & ( (tk(P3)) <= (tk(P1)) ) ) ) & ( ( ( ( ( (! ( (tk(P3)) <= ( 17 ) )) & ( ( ( 18 ) <= (tk(P5)) ) | ( ( 90 ) <= (tk(P5)) ) ) ) & (! ( ( 76 ) <= (tk(P4)) )) ) & ( ( 44 ) <= (tk(P1)) ) ) | (! ( (tk(P4)) <= (tk(P4)) )) ) & ( ( ( ( (! ( (tk(P3)) <= (tk(P4)) )) | ( (tk(P3)) <= (tk(P2)) ) ) | ( ( 23 ) <= (tk(P2)) ) ) | ( ( ( ( (tk(P5)) <= ( 79 ) ) | ( (tk(P6)) <= (tk(P5)) ) ) & ( ( (tk(P4)) <= ( 78 ) ) | ( (tk(P4)) <= ( 5 ) ) ) ) | ( (tk(P4)) <= (tk(P2)) ) ) ) & (! ( ( ( (tk(P2)) <= (tk(P3)) ) & ( ( (tk(P3)) <= ( 21 ) ) & ( ( 92 ) <= (tk(P3)) ) ) ) & ( ( ( (tk(P6)) <= (tk(P5)) ) | ( (tk(P6)) <= ( 32 ) ) ) | ( ( ( 8 ) <= (tk(P2)) ) & ( (tk(P2)) <= (tk(P4)) ) ) ) )) ) ) ) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-02 (reachable &!potential( ( (tk(P1)) <= (tk(P1)) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-03 (reachable & potential(( (! ( ( ( ( (! ( ( (tk(P1)) <= (tk(P5)) ) | ( ( 97 ) <= (tk(P4)) ) )) & ( ( ( ( (tk(P5)) <= (tk(P4)) ) & ( (tk(P6)) <= ( 24 ) ) ) & (! ( ( 38 ) <= (tk(P6)) )) ) & ( (tk(P2)) <= ( 39 ) ) ) ) | ( ( ( ( 34 ) <= (tk(P2)) ) | (! ( ( (tk(P5)) <= ( 77 ) ) | ( ( 24 ) <= (tk(P4)) ) )) ) | ( ( ( ( ( 11 ) <= (tk(P4)) ) & ( (tk(P4)) <= (tk(P6)) ) ) | ( ( ( 65 ) <= (tk(P5)) ) & ( (tk(P3)) <= ( 3 ) ) ) ) & ( ( ( ( 44 ) <= (tk(P4)) ) | ( (tk(P5)) <= (tk(P1)) ) ) & ( (tk(P5)) <= (tk(P4)) ) ) ) ) ) | ( ( ( 100 ) <= (tk(P2)) ) & ( (tk(P1)) <= (tk(P3)) ) ) ) & ( (tk(P2)) <= (tk(P6)) ) )) & ( (! ( ( ( ( 72 ) <= (tk(P2)) ) & ( ( 68 ) <= (tk(P5)) ) ) | ( ( (! ( ( ( (tk(P2)) <= ( 12 ) ) & ( (tk(P6)) <= ( 89 ) ) ) & (! ( (tk(P4)) <= (tk(P1)) )) )) | (! ( ( ( 30 ) <= (tk(P1)) ) | ( ( ( 59 ) <= (tk(P3)) ) & ( (tk(P2)) <= (tk(P3)) ) ) )) ) | ( ( ( ( ( ( 93 ) <= (tk(P6)) ) | ( (tk(P5)) <= (tk(P2)) ) ) & ( ( ( 63 ) <= (tk(P3)) ) | ( (tk(P2)) <= ( 17 ) ) ) ) | ( ( ( (tk(P6)) <= ( 97 ) ) & ( ( 83 ) <= (tk(P1)) ) ) | ( ( ( 62 ) <= (tk(P2)) ) & ( (tk(P5)) <= ( 16 ) ) ) ) ) & ( ( (! ( (tk(P4)) <= ( 74 ) )) | (! ( (tk(P4)) <= (tk(P3)) )) ) | (! ( (tk(P2)) <= (tk(P4)) )) ) ) ) )) & ( ( (tk(P2)) <= (tk(P1)) ) | ( (! ( ( ( 81 ) <= (tk(P5)) ) & ( ( ( (tk(P5)) <= ( 31 ) ) & ( (tk(P2)) <= ( 62 ) ) ) | ( ( ( 91 ) <= (tk(P4)) ) & ( (tk(P5)) <= (tk(P1)) ) ) ) )) | ( ( ( ( 27 ) <= (tk(P3)) ) & ( ( (! ( (tk(P2)) <= (tk(P1)) )) & ( ( (tk(P6)) <= (tk(P1)) ) | ( ( 35 ) <= (tk(P6)) ) ) ) | ( (! ( (tk(P4)) <= (tk(P5)) )) | ( (tk(P2)) <= ( 83 ) ) ) ) ) & ( (tk(P3)) <= ( 24 ) ) ) ) ) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-04 (reachable & potential(( (! ( ( ( ( ( 26 ) <= (tk(P3)) ) & ( ( (! ( ( (tk(P6)) <= ( 75 ) ) & ( ( 48 ) <= (tk(P1)) ) )) & (! ( (tk(P3)) <= (tk(P6)) )) ) & (! ( (! ( ( 31 ) <= (tk(P5)) )) | ( ( (tk(P4)) <= ( 74 ) ) & ( ( 82 ) <= (tk(P5)) ) ) )) ) ) & ( ( (! ( ( (tk(P3)) <= (tk(P2)) ) | ( (tk(P1)) <= ( 64 ) ) )) | ( (! ( (tk(P4)) <= (tk(P3)) )) & (! ( ( (tk(P4)) <= ( 3 ) ) & ( (tk(P2)) <= (tk(P2)) ) )) ) ) & ( (tk(P3)) <= (tk(P4)) ) ) ) | ( ( ( ( ( ( ( ( 42 ) <= (tk(P4)) ) & ( (tk(P3)) <= ( 52 ) ) ) | ( ( ( 80 ) <= (tk(P4)) ) | ( (tk(P2)) <= ( 10 ) ) ) ) & ( ( (tk(P1)) <= ( 41 ) ) & (! ( ( 67 ) <= (tk(P4)) )) ) ) & (! ( (tk(P2)) <= ( 44 ) )) ) | (! ( ( (! ( ( 30 ) <= (tk(P1)) )) & ( (tk(P4)) <= (tk(P6)) ) ) | ( ( ( (tk(P3)) <= (tk(P6)) ) & ( ( 43 ) <= (tk(P5)) ) ) & ( ( (tk(P6)) <= (tk(P5)) ) & ( (tk(P1)) <= (tk(P4)) ) ) ) )) ) | ( (! ( ( 43 ) <= (tk(P3)) )) & ( ( ( ( ( (tk(P1)) <= ( 4 ) ) & ( (tk(P1)) <= (tk(P3)) ) ) & ( ( (tk(P6)) <= (tk(P3)) ) & ( (tk(P5)) <= (tk(P2)) ) ) ) | ( ( ( (tk(P2)) <= ( 1 ) ) & ( ( 45 ) <= (tk(P1)) ) ) | (! ( (tk(P3)) <= (tk(P3)) )) ) ) | (! ( ( (tk(P4)) <= (tk(P5)) ) | ( (tk(P3)) <= ( 41 ) ) )) ) ) ) )) & ( ( (tk(P6)) <= (tk(P2)) ) | ( ( 88 ) <= (tk(P6)) ) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-05 (reachable & potential((! ( ( 11 ) <= (tk(P4)) ))))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-06 (reachable & potential(( ( 88 ) <= (tk(P1)) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-07 (reachable &!potential( ( ( ( (tk(P3)) <= ( 78 ) ) | ( ( ( (tk(P3)) <= (tk(P1)) ) | ( ( (tk(P2)) <= ( 81 ) ) & (! ( ( 1 ) <= (tk(P2)) )) ) ) | ( ( ( 74 ) <= (tk(P5)) ) | ( (tk(P1)) <= (tk(P3)) ) ) ) ) | (! ( ( 41 ) <= (tk(P6)) )) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-08 (reachable & potential(( ( (tk(P5)) <= (tk(P5)) ) & ( ( 50 ) <= (tk(P2)) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-09 (reachable &!potential( ( ( ( ( 47 ) <= (tk(P2)) ) | ( ( ( ( 26 ) <= (tk(P6)) ) & ( (tk(P2)) <= ( 57 ) ) ) & ( (tk(P1)) <= ( 24 ) ) ) ) | ( (tk(P4)) <= (tk(P4)) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-10 (reachable &!potential( (! ( ( ( (! ( ( ( ( ( (tk(P6)) <= (tk(P6)) ) | ( (tk(P3)) <= (tk(P4)) ) ) & ( (tk(P4)) <= (tk(P4)) ) ) & ( (tk(P3)) <= ( 98 ) ) ) | (! ( ( 22 ) <= (tk(P3)) )) )) | (! ( ( ( ( ( 64 ) <= (tk(P3)) ) | ( (tk(P1)) <= (tk(P6)) ) ) | ( (tk(P4)) <= (tk(P2)) ) ) & ( (! ( ( 15 ) <= (tk(P5)) )) | ( (! ( (tk(P3)) <= ( 39 ) )) | ( ( (tk(P2)) <= (tk(P3)) ) & ( ( 45 ) <= (tk(P2)) ) ) ) ) )) ) & (! ( ( (tk(P5)) <= ( 76 ) ) & ( ( ( (! ( ( 85 ) <= (tk(P1)) )) | ( ( ( 49 ) <= (tk(P1)) ) & ( (tk(P3)) <= ( 27 ) ) ) ) & ( ( (tk(P5)) <= (tk(P4)) ) & ( ( (tk(P1)) <= ( 28 ) ) & ( ( 96 ) <= (tk(P1)) ) ) ) ) | ( ( 15 ) <= (tk(P5)) ) ) )) ) & ( ( 51 ) <= (tk(P6)) ) ))))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-11 (reachable & potential((! ( ( ( ( (tk(P5)) <= (tk(P2)) ) & ( ( ( (tk(P2)) <= (tk(P3)) ) & ( (! ( (tk(P4)) <= ( 5 ) )) | (! ( ( ( 4 ) <= (tk(P6)) ) | ( (tk(P5)) <= (tk(P2)) ) )) ) ) | ( ( ( ( (tk(P4)) <= ( 78 ) ) | ( ( ( 65 ) <= (tk(P3)) ) & ( (tk(P5)) <= ( 14 ) ) ) ) & (! ( (tk(P3)) <= (tk(P2)) )) ) & ( (! ( (tk(P5)) <= ( 8 ) )) | (! ( ( ( 84 ) <= (tk(P5)) ) | ( (tk(P1)) <= (tk(P2)) ) )) ) ) ) ) | ( (! ( ( ( ( ( ( 71 ) <= (tk(P6)) ) | ( (tk(P2)) <= ( 46 ) ) ) & (! ( ( 80 ) <= (tk(P5)) )) ) | ( ( ( (tk(P1)) <= ( 39 ) ) & ( (tk(P4)) <= (tk(P4)) ) ) & (! ( (tk(P3)) <= ( 47 ) )) ) ) & ( (! ( ( (tk(P3)) <= ( 8 ) ) & ( (tk(P4)) <= (tk(P3)) ) )) & ( ( ( ( 19 ) <= (tk(P1)) ) & ( ( 71 ) <= (tk(P3)) ) ) | ( ( ( 72 ) <= (tk(P4)) ) & ( (tk(P6)) <= (tk(P2)) ) ) ) ) )) | ( ( ( 56 ) <= (tk(P2)) ) & ( ( 5 ) <= (tk(P1)) ) ) ) ) | ( ( (! ( (tk(P2)) <= (tk(P2)) )) | (! ( ( 64 ) <= (tk(P3)) )) ) | (! ( ( ( 90 ) <= (tk(P5)) ) | (! ( ( (tk(P1)) <= ( 50 ) ) & ( (tk(P2)) <= ( 67 ) ) )) )) ) ))))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-12 (reachable & potential(( ( (! ( ( ( ( 73 ) <= (tk(P6)) ) | (! ( (! ( (tk(P2)) <= ( 12 ) )) | ( ( (tk(P4)) <= ( 51 ) ) | ( ( 84 ) <= (tk(P4)) ) ) )) ) | ( ( (tk(P2)) <= (tk(P4)) ) | (! ( ( ( ( (tk(P5)) <= (tk(P5)) ) & ( (tk(P2)) <= ( 48 ) ) ) | ( ( (tk(P2)) <= ( 25 ) ) | ( ( 78 ) <= (tk(P1)) ) ) ) & (! ( ( (tk(P6)) <= (tk(P2)) ) & ( (tk(P3)) <= (tk(P3)) ) )) )) ) )) | (! ( ( ( ( (tk(P4)) <= ( 96 ) ) & ( ( ( (tk(P6)) <= ( 64 ) ) | ( (tk(P3)) <= (tk(P6)) ) ) | ( ( ( (tk(P5)) <= (tk(P6)) ) & ( (tk(P3)) <= (tk(P6)) ) ) | (! ( (tk(P2)) <= (tk(P2)) )) ) ) ) & (! ( ( (tk(P3)) <= ( 58 ) ) | (! ( (tk(P3)) <= ( 9 ) )) )) ) | (! ( ( ( 89 ) <= (tk(P4)) ) & (! ( (tk(P5)) <= ( 59 ) )) )) )) ) & ( (! ( (! ( (tk(P5)) <= (tk(P3)) )) & (! ( (tk(P1)) <= ( 3 ) )) )) | ( ( ( 33 ) <= (tk(P3)) ) & ( ( (tk(P3)) <= (tk(P2)) ) | ( ( ( (tk(P6)) <= (tk(P5)) ) | ( ( ( ( (tk(P2)) <= (tk(P4)) ) & ( ( 49 ) <= (tk(P6)) ) ) & (! ( (tk(P1)) <= (tk(P4)) )) ) & (! ( ( 16 ) <= (tk(P1)) )) ) ) | (! ( ( ( (tk(P2)) <= ( 77 ) ) & ( ( (tk(P4)) <= ( 90 ) ) & ( (tk(P1)) <= ( 32 ) ) ) ) | ( ( ( ( 17 ) <= (tk(P2)) ) & ( (tk(P6)) <= (tk(P1)) ) ) & (! ( (tk(P1)) <= ( 49 ) )) ) )) ) ) ) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-13 (reachable & potential(( ( ( 64 ) <= (tk(P6)) ) | ( (! ( ( (tk(P1)) <= (tk(P2)) ) | ( (! ( (tk(P2)) <= ( 26 ) )) & ( (! ( ( (tk(P2)) <= ( 59 ) ) | ( ( (tk(P3)) <= ( 18 ) ) | ( ( 95 ) <= (tk(P4)) ) ) )) | ( ( (tk(P2)) <= (tk(P1)) ) | (! ( ( ( 84 ) <= (tk(P5)) ) | ( (tk(P5)) <= ( 61 ) ) )) ) ) ) )) & ( ( (! ( ( ( ( 23 ) <= (tk(P4)) ) | (! ( ( (tk(P2)) <= ( 70 ) ) & ( ( 2 ) <= (tk(P6)) ) )) ) & (! ( ( ( (tk(P5)) <= ( 35 ) ) & ( ( 15 ) <= (tk(P3)) ) ) & ( (tk(P1)) <= ( 23 ) ) )) )) & ( (tk(P2)) <= (tk(P2)) ) ) & ( ( 100 ) <= (tk(P5)) ) ) ) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-14 (reachable & potential(( (! ( ( (tk(P5)) <= ( 29 ) ) | (! ( ( (tk(P3)) <= (tk(P5)) ) | ( ( ( ( ( 38 ) <= (tk(P4)) ) | ( (tk(P1)) <= (tk(P1)) ) ) | ( ( ( 2 ) <= (tk(P3)) ) & ( (tk(P3)) <= ( 32 ) ) ) ) | ( ( ( (tk(P1)) <= ( 26 ) ) | ( ( 97 ) <= (tk(P6)) ) ) | (! ( (tk(P1)) <= ( 33 ) )) ) ) )) )) & (! ( ( (tk(P1)) <= ( 38 ) ) | ( ( ( ( (tk(P2)) <= (tk(P2)) ) & ( ( ( ( (tk(P1)) <= ( 89 ) ) & ( ( 11 ) <= (tk(P6)) ) ) | ( ( (tk(P4)) <= ( 14 ) ) & ( (tk(P6)) <= (tk(P6)) ) ) ) & ( (tk(P1)) <= ( 43 ) ) ) ) & ( ( (tk(P6)) <= ( 49 ) ) | ( ( ( (tk(P3)) <= (tk(P5)) ) | (! ( ( 77 ) <= (tk(P1)) )) ) & ( ( ( ( 68 ) <= (tk(P5)) ) & ( ( 9 ) <= (tk(P5)) ) ) & ( ( ( 99 ) <= (tk(P4)) ) & ( ( 18 ) <= (tk(P1)) ) ) ) ) ) ) & ( ( 7 ) <= (tk(P3)) ) ) )) )))
PROPERTY: SharedMemory-COL-000050-ReachabilityCardinality-15 (reachable &!potential( ( ( ( ( (tk(P3)) <= (tk(P6)) ) & ( ( ( ( ( 7 ) <= (tk(P4)) ) | ( (tk(P1)) <= ( 87 ) ) ) | (! ( (! ( (tk(P1)) <= (tk(P3)) )) | ( ( ( (tk(P5)) <= ( 47 ) ) | ( ( 96 ) <= (tk(P3)) ) ) | ( ( ( 8 ) <= (tk(P4)) ) & ( ( 39 ) <= (tk(P3)) ) ) ) )) ) | (! ( ( 16 ) <= (tk(P6)) )) ) ) | (! ( ( (tk(P2)) <= ( 14 ) ) & (! ( ( ( ( ( ( 28 ) <= (tk(P6)) ) & ( ( 76 ) <= (tk(P2)) ) ) | (! ( (tk(P3)) <= (tk(P6)) )) ) | ( (! ( (tk(P4)) <= (tk(P1)) )) | ( ( ( 16 ) <= (tk(P6)) ) | ( (tk(P6)) <= (tk(P2)) ) ) ) ) & ( ( (tk(P2)) <= ( 17 ) ) & (! ( (tk(P3)) <= (tk(P6)) )) ) )) )) ) & ( (tk(P2)) <= ( 92 ) ) )))
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000050-ReachabilityCardinality-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1679273648413

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
WARNING:
No initial marking given, assuming zero
within model automodel built in file model.sm near line 57

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-COL-000050"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is SharedMemory-COL-000050, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r363-smll-167891814600574"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-COL-000050.tgz
mv SharedMemory-COL-000050 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;