About the Execution of Smart+red for SharedMemory-COL-000005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
240.659 | 8233.00 | 17744.00 | 392.30 | FFTTTTTTFFFFTTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r363-smll-167891814600550.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is SharedMemory-COL-000005, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r363-smll-167891814600550
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 8.5K Feb 25 14:01 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 25 14:01 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 13:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 13:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 25 14:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 14:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 12K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-00
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-01
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-02
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-03
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-04
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-05
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-06
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-07
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-08
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-09
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-10
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-11
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-12
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-13
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-14
FORMULA_NAME SharedMemory-COL-000005-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1679272302953
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-COL-000005
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-20 00:31:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-20 00:31:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 00:31:45] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-20 00:31:46] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-20 00:31:46] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 795 ms
[2023-03-20 00:31:46] [INFO ] Imported 6 HL places and 5 HL transitions for a total of 46 PT places and 85.0 transition bindings in 25 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 49 ms.
Working with output stream class java.io.PrintStream
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 00:31:46] [INFO ] Built PT skeleton of HLPN with 6 places and 5 transitions 16 arcs in 7 ms.
[2023-03-20 00:31:46] [INFO ] Skeletonized 15 HLPN properties in 2 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Initial state reduction rules removed 7 formulas.
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
[2023-03-20 00:31:46] [INFO ] Flatten gal took : 21 ms
[2023-03-20 00:31:47] [INFO ] Flatten gal took : 3 ms
Domain [P(5), P(5)] of place Ext_Mem_Acc breaks symmetries in sort P
[2023-03-20 00:31:47] [INFO ] Unfolded HLPN to a Petri net with 46 places and 60 transitions 220 arcs in 14 ms.
[2023-03-20 00:31:47] [INFO ] Unfolded 8 HLPN properties in 1 ms.
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 5 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 869 ms. (steps per millisecond=11 ) properties (out of 8) seen :2
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
// Phase 1: matrix 55 rows 41 cols
[2023-03-20 00:31:48] [INFO ] Computed 11 place invariants in 6 ms
[2023-03-20 00:31:48] [INFO ] [Real]Absence check using 11 positive place invariants in 8 ms returned sat
[2023-03-20 00:31:48] [INFO ] After 264ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:4
[2023-03-20 00:31:48] [INFO ] [Nat]Absence check using 11 positive place invariants in 6 ms returned sat
[2023-03-20 00:31:49] [INFO ] After 151ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 3191 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running SharedMemory (COL), instance 000005
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart
GOT IT HERE. BS
Petri model created: 6 places, 5 transitions, 16 arcs.
Final Score: 15.017
Took : 0 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-00 (reachable &!potential( (! ( ( (tk(P2)) <= ( 22 ) ) | (! ( ( ( 43 ) <= (tk(P3)) ) & ( ( 82 ) <= (tk(P2)) ) )) ))))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-01 (reachable & potential(( ( (! ( ( (! ( ( (tk(P2)) <= (tk(P4)) ) | (! ( (tk(P6)) <= ( 3 ) )) )) | (! ( ( (tk(P4)) <= (tk(P2)) ) | ( ( ( 49 ) <= (tk(P4)) ) | ( ( 7 ) <= (tk(P4)) ) ) )) ) | ( ( 29 ) <= (tk(P4)) ) )) | ( (tk(P3)) <= ( 21 ) ) ) & ( ( 74 ) <= (tk(P1)) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-02 (reachable & potential(( (! ( (tk(P2)) <= (tk(P5)) )) | ( ( ( ( 83 ) <= (tk(P1)) ) | ( (tk(P5)) <= ( 27 ) ) ) | (! ( ( (tk(P1)) <= ( 99 ) ) & ( (tk(P4)) <= (tk(P6)) ) )) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-03 (reachable & potential((! ( (tk(P4)) <= (tk(P5)) ))))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-04 (reachable &!potential( ( ( (tk(P3)) <= (tk(P3)) ) | ( ( ( 5 ) <= (tk(P3)) ) & ( (tk(P1)) <= (tk(P5)) ) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-05 (reachable & potential(( ( (tk(P3)) <= ( 73 ) ) | ( ( ( (! ( ( (tk(P1)) <= (tk(P5)) ) | ( (tk(P6)) <= (tk(P2)) ) )) & ( ( (tk(P3)) <= ( 32 ) ) | ( ( 49 ) <= (tk(P6)) ) ) ) | (! ( (! ( ( ( ( 18 ) <= (tk(P3)) ) & ( (tk(P1)) <= ( 99 ) ) ) & (! ( ( (tk(P4)) <= ( 16 ) ) | ( (tk(P1)) <= ( 57 ) ) )) )) | ( ( (! ( ( (tk(P5)) <= ( 68 ) ) | ( ( 79 ) <= (tk(P4)) ) )) | ( ( ( (tk(P3)) <= (tk(P2)) ) & ( ( 53 ) <= (tk(P3)) ) ) & ( ( ( 85 ) <= (tk(P3)) ) | ( ( 59 ) <= (tk(P2)) ) ) ) ) & ( ( ( 86 ) <= (tk(P5)) ) | ( (! ( ( 44 ) <= (tk(P3)) )) & ( ( (tk(P1)) <= ( 7 ) ) & ( ( 37 ) <= (tk(P6)) ) ) ) ) ) )) ) & ( ( 81 ) <= (tk(P3)) ) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-06 (reachable &!potential( ( (tk(P4)) <= ( 98 ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-07 (reachable &!potential( (! ( ( (! ( ( ( (! ( (tk(P2)) <= ( 9 ) )) | ( ( ( 59 ) <= (tk(P1)) ) | (! ( (tk(P6)) <= ( 76 ) )) ) ) | ( ( (! ( ( 51 ) <= (tk(P5)) )) | (! ( (tk(P3)) <= (tk(P2)) )) ) & ( ( ( 37 ) <= (tk(P6)) ) | ( (tk(P4)) <= ( 42 ) ) ) ) ) & ( (tk(P3)) <= (tk(P3)) ) )) & ( (! ( (tk(P6)) <= ( 31 ) )) | ( (tk(P3)) <= (tk(P1)) ) ) ) | ( (! ( ( (! ( (! ( (tk(P5)) <= (tk(P1)) )) & ( ( ( 88 ) <= (tk(P5)) ) & ( ( 69 ) <= (tk(P5)) ) ) )) & (! ( ( (tk(P3)) <= (tk(P5)) ) & ( ( 72 ) <= (tk(P3)) ) )) ) & ( (tk(P6)) <= ( 91 ) ) )) & ( ( (tk(P5)) <= (tk(P4)) ) & ( ( ( (tk(P4)) <= (tk(P1)) ) & ( ( ( (tk(P2)) <= ( 12 ) ) & (! ( (tk(P1)) <= (tk(P6)) )) ) & ( ( (tk(P4)) <= ( 16 ) ) | (! ( (tk(P5)) <= ( 98 ) )) ) ) ) & (! ( (tk(P6)) <= ( 8 ) )) ) ) ) ))))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-08 (reachable & potential(( ( ( ( (tk(P1)) <= ( 17 ) ) & ( ( ( ( ( ( ( (tk(P4)) <= (tk(P1)) ) & ( (tk(P2)) <= ( 50 ) ) ) & ( ( (tk(P1)) <= (tk(P1)) ) & ( ( 9 ) <= (tk(P3)) ) ) ) | (! ( ( (tk(P1)) <= ( 73 ) ) | ( ( 23 ) <= (tk(P2)) ) )) ) | ( ( ( ( (tk(P2)) <= (tk(P1)) ) | ( ( 90 ) <= (tk(P2)) ) ) | ( (tk(P2)) <= (tk(P5)) ) ) & (! ( ( (tk(P5)) <= (tk(P5)) ) & ( (tk(P2)) <= (tk(P6)) ) )) ) ) & ( (! ( ( (tk(P6)) <= (tk(P6)) ) | ( ( ( 68 ) <= (tk(P6)) ) & ( ( 85 ) <= (tk(P1)) ) ) )) & ( ( ( (tk(P1)) <= ( 90 ) ) | (! ( (tk(P4)) <= (tk(P6)) )) ) | (! ( (tk(P6)) <= (tk(P3)) )) ) ) ) | ( ( ( (tk(P1)) <= (tk(P2)) ) & ( (! ( (tk(P4)) <= ( 89 ) )) & ( ( 5 ) <= (tk(P6)) ) ) ) & (! ( ( (tk(P2)) <= (tk(P4)) ) & ( (tk(P1)) <= (tk(P6)) ) )) ) ) ) | (! ( ( ( (! ( (tk(P1)) <= (tk(P6)) )) & ( ( ( ( (tk(P5)) <= ( 64 ) ) & ( ( 29 ) <= (tk(P6)) ) ) & (! ( (tk(P1)) <= ( 8 ) )) ) & (! ( (tk(P4)) <= ( 93 ) )) ) ) & (! ( ( ( 58 ) <= (tk(P2)) ) & (! ( ( 67 ) <= (tk(P3)) )) )) ) | ( (tk(P2)) <= (tk(P2)) ) )) ) | ( ( ( 42 ) <= (tk(P1)) ) & (! ( ( ( (tk(P6)) <= (tk(P4)) ) | ( ( (tk(P6)) <= ( 76 ) ) & ( (tk(P6)) <= (tk(P1)) ) ) ) | ( (! ( (tk(P6)) <= ( 96 ) )) & ( ( (tk(P2)) <= ( 84 ) ) | ( ( (tk(P6)) <= (tk(P4)) ) & ( ( 2 ) <= (tk(P4)) ) ) ) ) )) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-09 (reachable &!potential( ( ( (tk(P2)) <= (tk(P4)) ) & ( (! ( ( 71 ) <= (tk(P2)) )) & ( (! ( ( ( ( 5 ) <= (tk(P6)) ) & ( (! ( (tk(P3)) <= (tk(P3)) )) & (! ( (tk(P4)) <= ( 68 ) )) ) ) & ( (tk(P6)) <= (tk(P5)) ) )) | ( ( ( ( ( (! ( (tk(P2)) <= (tk(P1)) )) | ( ( ( 22 ) <= (tk(P4)) ) | ( (tk(P4)) <= ( 4 ) ) ) ) & ( (! ( ( 25 ) <= (tk(P6)) )) | ( (tk(P4)) <= ( 12 ) ) ) ) | ( ( ( (tk(P2)) <= ( 14 ) ) & (! ( (tk(P6)) <= (tk(P5)) )) ) & ( ( ( (tk(P1)) <= (tk(P4)) ) & ( (tk(P3)) <= (tk(P1)) ) ) & ( ( (tk(P1)) <= ( 92 ) ) | ( ( 62 ) <= (tk(P2)) ) ) ) ) ) & ( ( ( ( (tk(P1)) <= ( 90 ) ) | ( ( (tk(P4)) <= ( 97 ) ) & ( (tk(P2)) <= ( 56 ) ) ) ) & (! ( (tk(P3)) <= (tk(P5)) )) ) | (! ( ( (tk(P2)) <= (tk(P3)) ) | ( (tk(P4)) <= ( 100 ) ) )) ) ) & (! ( ( (! ( ( (tk(P1)) <= ( 47 ) ) & ( (tk(P6)) <= ( 17 ) ) )) | ( ( ( ( 85 ) <= (tk(P4)) ) & ( (tk(P3)) <= ( 3 ) ) ) & ( ( (tk(P4)) <= (tk(P2)) ) & ( (tk(P4)) <= ( 57 ) ) ) ) ) & ( ( (tk(P6)) <= (tk(P2)) ) | ( ( ( 46 ) <= (tk(P6)) ) & (! ( (tk(P5)) <= (tk(P1)) )) ) ) )) ) ) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-10 (reachable &!potential( ( ( 1 ) <= (tk(P2)) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-11 (reachable &!potential( ( ( ( 39 ) <= (tk(P4)) ) & ( ( (! ( ( (tk(P5)) <= ( 6 ) ) & (! ( (! ( (tk(P1)) <= ( 98 ) )) & ( ( ( (tk(P4)) <= ( 57 ) ) & ( (tk(P3)) <= ( 81 ) ) ) & ( ( (tk(P2)) <= ( 13 ) ) | ( (tk(P3)) <= ( 45 ) ) ) ) )) )) & (! ( (! ( (tk(P5)) <= ( 1 ) )) | ( ( (tk(P5)) <= ( 32 ) ) & ( (! ( (tk(P1)) <= ( 73 ) )) & ( (! ( (tk(P5)) <= (tk(P6)) )) & (! ( ( 47 ) <= (tk(P5)) )) ) ) ) )) ) | ( (! ( (tk(P3)) <= ( 80 ) )) | ( ( ( ( 18 ) <= (tk(P2)) ) & ( (tk(P2)) <= ( 75 ) ) ) | ( (! ( (! ( ( ( 75 ) <= (tk(P3)) ) & ( (tk(P5)) <= ( 58 ) ) )) & ( ( 79 ) <= (tk(P3)) ) )) & (! ( (tk(P5)) <= (tk(P1)) )) ) ) ) ) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-12 (reachable &!potential( (! ( (! ( ( ( ( ( (tk(P1)) <= ( 19 ) ) | ( (tk(P6)) <= (tk(P3)) ) ) & ( ( ( ( ( 59 ) <= (tk(P6)) ) & ( (tk(P4)) <= ( 94 ) ) ) & ( ( ( 45 ) <= (tk(P3)) ) & ( ( 78 ) <= (tk(P4)) ) ) ) & ( (! ( (tk(P3)) <= (tk(P2)) )) & (! ( (tk(P3)) <= (tk(P6)) )) ) ) ) | ( ( 63 ) <= (tk(P3)) ) ) & (! ( ( ( 11 ) <= (tk(P4)) ) | (! ( ( ( ( 8 ) <= (tk(P6)) ) | ( ( 96 ) <= (tk(P2)) ) ) | ( ( (tk(P4)) <= (tk(P3)) ) | ( ( 46 ) <= (tk(P3)) ) ) )) )) )) & ( ( ( ( (! ( ( ( 15 ) <= (tk(P4)) ) & ( (tk(P3)) <= (tk(P1)) ) )) | (! ( ( (tk(P1)) <= (tk(P6)) ) & ( ( (tk(P6)) <= ( 25 ) ) & ( ( 75 ) <= (tk(P3)) ) ) )) ) & ( ( ( (! ( (tk(P2)) <= (tk(P3)) )) | ( (tk(P2)) <= ( 71 ) ) ) | ( ( ( (tk(P3)) <= ( 23 ) ) & ( ( 100 ) <= (tk(P6)) ) ) & ( ( (tk(P1)) <= ( 90 ) ) & ( ( 100 ) <= (tk(P5)) ) ) ) ) & ( (tk(P2)) <= ( 82 ) ) ) ) | ( ( ( ( 52 ) <= (tk(P1)) ) | ( (! ( ( (tk(P5)) <= (tk(P1)) ) & ( (tk(P3)) <= ( 91 ) ) )) & ( ( ( (tk(P5)) <= (tk(P6)) ) & ( (tk(P6)) <= (tk(P3)) ) ) & (! ( (tk(P5)) <= (tk(P4)) )) ) ) ) | ( ( 56 ) <= (tk(P1)) ) ) ) & ( ( 49 ) <= (tk(P1)) ) ) ))))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-13 (reachable & potential(( ( ( ( 10 ) <= (tk(P6)) ) | (! ( ( ( (tk(P4)) <= ( 23 ) ) | ( (! ( ( (tk(P1)) <= (tk(P6)) ) | ( ( 70 ) <= (tk(P3)) ) )) | ( ( 77 ) <= (tk(P3)) ) ) ) & ( (tk(P5)) <= ( 91 ) ) )) ) | (! ( (! ( ( (tk(P3)) <= (tk(P1)) ) | ( (tk(P6)) <= ( 22 ) ) )) | ( (tk(P4)) <= ( 2 ) ) )) )))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-14 (reachable &!potential( (! ( ( ( 50 ) <= (tk(P3)) ) & ( ( (! ( ( 92 ) <= (tk(P4)) )) & ( ( ( ( ( ( 11 ) <= (tk(P6)) ) & ( ( (tk(P6)) <= ( 30 ) ) | ( (tk(P3)) <= (tk(P5)) ) ) ) & ( ( 25 ) <= (tk(P5)) ) ) & ( (tk(P6)) <= ( 64 ) ) ) | ( ( ( (tk(P3)) <= (tk(P6)) ) & (! ( (tk(P1)) <= ( 80 ) )) ) | ( ( ( ( ( 25 ) <= (tk(P5)) ) & ( (tk(P1)) <= (tk(P3)) ) ) | ( ( (tk(P1)) <= ( 71 ) ) | ( (tk(P6)) <= ( 80 ) ) ) ) & ( ( ( 8 ) <= (tk(P6)) ) & ( ( (tk(P6)) <= ( 19 ) ) | ( (tk(P4)) <= ( 60 ) ) ) ) ) ) ) ) & ( ( ( (tk(P3)) <= ( 88 ) ) & ( (tk(P4)) <= ( 83 ) ) ) & ( (! ( ( (! ( (tk(P3)) <= (tk(P3)) )) | (! ( (tk(P1)) <= ( 34 ) )) ) & ( ( ( (tk(P5)) <= ( 46 ) ) & ( (tk(P2)) <= ( 37 ) ) ) | ( ( (tk(P6)) <= ( 92 ) ) & ( ( 90 ) <= (tk(P3)) ) ) ) )) & (! ( (tk(P4)) <= ( 1 ) )) ) ) ) ))))
PROPERTY: SharedMemory-COL-000005-ReachabilityCardinality-15 (reachable &!potential( ( ( ( ( ( (! ( (tk(P4)) <= ( 5 ) )) | ( (tk(P5)) <= ( 13 ) ) ) | ( ( ( ( ( 79 ) <= (tk(P2)) ) & ( (tk(P4)) <= ( 6 ) ) ) & ( ( (! ( (tk(P1)) <= ( 32 ) )) | ( ( ( 29 ) <= (tk(P6)) ) | ( ( 98 ) <= (tk(P6)) ) ) ) & ( ( ( (tk(P1)) <= (tk(P6)) ) & ( (tk(P4)) <= ( 91 ) ) ) | ( ( (tk(P4)) <= ( 72 ) ) & ( ( 65 ) <= (tk(P5)) ) ) ) ) ) & ( ( ( ( ( ( 87 ) <= (tk(P1)) ) | ( (tk(P2)) <= ( 52 ) ) ) | ( ( ( 66 ) <= (tk(P5)) ) & ( ( 85 ) <= (tk(P5)) ) ) ) & ( (! ( ( 39 ) <= (tk(P1)) )) | ( (tk(P4)) <= ( 40 ) ) ) ) | (! ( (! ( (tk(P6)) <= (tk(P2)) )) & ( (tk(P1)) <= ( 17 ) ) )) ) ) ) & ( ( (tk(P4)) <= ( 42 ) ) & (! ( (tk(P6)) <= ( 97 ) )) ) ) | ( (tk(P2)) <= (tk(P6)) ) ) | (! ( (! ( (tk(P3)) <= (tk(P6)) )) | ( ( 30 ) <= (tk(P4)) ) )) )))
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SharedMemory-COL-000005-ReachabilityCardinality-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
BK_STOP 1679272311186
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
WARNING:
No initial marking given, assuming zero
within model automodel built in file model.sm near line 57
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-COL-000005"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is SharedMemory-COL-000005, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r363-smll-167891814600550"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-COL-000005.tgz
mv SharedMemory-COL-000005 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;