About the Execution of Smart+red for SatelliteMemory-PT-X01500Y0046
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
7387.191 | 728352.00 | 740083.00 | 1945.90 | TTTFTFFFTFFFFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r363-smll-167891814100318.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is SatelliteMemory-PT-X01500Y0046, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r363-smll-167891814100318
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.7K Feb 26 12:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 12:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 12:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 12:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.2K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:50 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 12:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 26 12:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 26 12:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 12:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:50 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:50 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 12 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rwxr-xr-x 1 mcc users 5.5K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1679115659481
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SatelliteMemory-PT-X01500Y0046
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-18 05:01:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-18 05:01:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 05:01:02] [INFO ] Load time of PNML (sax parser for PT used): 29 ms
[2023-03-18 05:01:02] [INFO ] Transformed 13 places.
[2023-03-18 05:01:02] [INFO ] Transformed 10 transitions.
[2023-03-18 05:01:02] [INFO ] Parsed PT model containing 13 places and 10 transitions and 40 arcs in 129 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 31 ms.
Working with output stream class java.io.PrintStream
Reduce places removed 1 places and 0 transitions.
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 769 ms. (steps per millisecond=13 ) properties (out of 15) seen :5
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 145 ms. (steps per millisecond=68 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 104 ms. (steps per millisecond=96 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 10 rows 12 cols
[2023-03-18 05:01:03] [INFO ] Computed 6 place invariants in 3 ms
[2023-03-18 05:01:04] [INFO ] [Real]Absence check using 6 positive place invariants in 5 ms returned sat
[2023-03-18 05:01:04] [INFO ] After 236ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:9
[2023-03-18 05:01:04] [INFO ] [Nat]Absence check using 6 positive place invariants in 3 ms returned sat
[2023-03-18 05:01:04] [INFO ] After 206ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :3
[2023-03-18 05:01:04] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-18 05:01:04] [INFO ] After 25ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :7 sat :3
[2023-03-18 05:01:04] [INFO ] After 167ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :3
Attempting to minimize the solution found.
Minimization took 25 ms.
[2023-03-18 05:01:04] [INFO ] After 493ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :3
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 3 different solutions.
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Finished Parikh walk after 3371 steps, including 0 resets, run visited all 2 properties in 56 ms. (steps per millisecond=60 )
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 3 properties in 196 ms.
All properties solved without resorting to model-checking.
Total runtime 3015 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running SatelliteMemory (PT), instance X01500Y0046
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart
GOT IT HERE. BS
Petri model created: 13 places, 10 transitions, 40 arcs.
Final Score: 34.039
Took : 0 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00 (reachable & potential((! ( ( 439 ) <= (tk(P8)) ))))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01 (reachable & potential(( ( ( ( (tk(P7)) <= (tk(P10)) ) | ( (tk(P1)) <= ( 1311 ) ) ) | (! ( ( ( ( 6 ) <= (tk(P5)) ) & ( ( 1036 ) <= (tk(P6)) ) ) | ( ( ( (tk(P11)) <= (tk(P12)) ) & ( ( ( ( (tk(P5)) <= (tk(P11)) ) & ( (tk(P7)) <= ( 1371 ) ) ) | (! ( (tk(P13)) <= ( 734 ) )) ) & ( ( ( (tk(P10)) <= (tk(P4)) ) | ( (tk(P4)) <= (tk(P12)) ) ) | ( ( (tk(P5)) <= (tk(P12)) ) & ( (tk(P5)) <= (tk(P11)) ) ) ) ) ) & ( ( (! ( ( (tk(P1)) <= (tk(P10)) ) & ( ( 537 ) <= (tk(P7)) ) )) & ( ( ( ( 147 ) <= (tk(P7)) ) & ( ( 1146 ) <= (tk(P6)) ) ) | ( (tk(P3)) <= (tk(P8)) ) ) ) & ( ( ( ( ( 868 ) <= (tk(P5)) ) | ( (tk(P6)) <= (tk(P2)) ) ) | ( ( ( 227 ) <= (tk(P7)) ) | ( ( 76 ) <= (tk(P6)) ) ) ) & ( ( ( 512 ) <= (tk(P8)) ) | ( (tk(P6)) <= ( 939 ) ) ) ) ) ) )) ) & (! ( ( ( ( (! ( (! ( (tk(P11)) <= ( 627 ) )) & ( ( (tk(P10)) <= (tk(P11)) ) | ( (tk(P6)) <= ( 477 ) ) ) )) | ( ( 1324 ) <= (tk(P2)) ) ) | (! ( ( ( (tk(P13)) <= (tk(P7)) ) | ( ( (tk(P7)) <= (tk(P9)) ) & ( (tk(P10)) <= ( 935 ) ) ) ) & ( (! ( (tk(P10)) <= ( 53 ) )) & (! ( (tk(P8)) <= (tk(P8)) )) ) )) ) & ( ( (! ( ( ( (tk(P7)) <= ( 833 ) ) | ( ( 480 ) <= (tk(P5)) ) ) | (! ( ( 925 ) <= (tk(P12)) )) )) & ( ( ( ( 21 ) <= (tk(P12)) ) | ( ( (tk(P11)) <= ( 737 ) ) | ( (tk(P9)) <= (tk(P6)) ) ) ) & ( (tk(P9)) <= (tk(P1)) ) ) ) | ( ( (! ( ( 925 ) <= (tk(P7)) )) & ( ( ( (tk(P7)) <= (tk(P5)) ) | ( (tk(P7)) <= ( 772 ) ) ) | ( ( ( 1470 ) <= (tk(P11)) ) & ( ( 1234 ) <= (tk(P8)) ) ) ) ) & ( (tk(P3)) <= ( 111 ) ) ) ) ) | ( ( ( ( ( 1389 ) <= (tk(P11)) ) | ( ( ( ( ( 353 ) <= (tk(P1)) ) & ( (tk(P9)) <= (tk(P11)) ) ) | ( ( (tk(P1)) <= ( 929 ) ) & ( (tk(P3)) <= (tk(P2)) ) ) ) & ( (tk(P9)) <= (tk(P8)) ) ) ) & (! ( ( ( 1269 ) <= (tk(P11)) ) & ( (tk(P12)) <= ( 1295 ) ) )) ) & (! ( ( ( (tk(P1)) <= (tk(P13)) ) | ( ( ( 532 ) <= (tk(P12)) ) | ( (tk(P6)) <= ( 1283 ) ) ) ) | ( (! ( ( (tk(P13)) <= (tk(P4)) ) & ( ( 1130 ) <= (tk(P6)) ) )) | ( (tk(P11)) <= ( 619 ) ) ) )) ) )) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02 (reachable & potential(( ( 140 ) <= (tk(P5)) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 (reachable & potential(( ( (! ( (! ( ( ( ( ( (tk(P4)) <= ( 63 ) ) | ( (tk(P1)) <= (tk(P11)) ) ) | (! ( ( 1023 ) <= (tk(P13)) )) ) | (! ( ( (tk(P9)) <= ( 155 ) ) & ( (tk(P11)) <= (tk(P9)) ) )) ) & (! ( ( ( (tk(P4)) <= ( 136 ) ) & ( ( 1001 ) <= (tk(P12)) ) ) | ( ( 1353 ) <= (tk(P13)) ) )) )) & ( (! ( (tk(P12)) <= ( 1340 ) )) | ( ( ( (! ( ( 658 ) <= (tk(P5)) )) & ( ( ( 307 ) <= (tk(P4)) ) | ( (tk(P9)) <= (tk(P12)) ) ) ) & ( (tk(P1)) <= ( 1007 ) ) ) | ( ( 122 ) <= (tk(P10)) ) ) ) )) & ( (! ( ( ( 219 ) <= (tk(P11)) ) | ( (tk(P2)) <= ( 771 ) ) )) & ( (tk(P12)) <= ( 217 ) ) ) ) | ( (! ( (! ( ( (tk(P9)) <= (tk(P1)) ) & ( ( ( ( 27 ) <= (tk(P2)) ) | ( (tk(P4)) <= ( 577 ) ) ) | (! ( (tk(P11)) <= (tk(P7)) )) ) )) & ( ( 816 ) <= (tk(P13)) ) )) & ( (! ( ( ( ( ( ( ( 1291 ) <= (tk(P3)) ) | ( (tk(P9)) <= (tk(P5)) ) ) | (! ( ( 872 ) <= (tk(P12)) )) ) | ( ( ( (tk(P6)) <= ( 364 ) ) & ( (tk(P5)) <= (tk(P7)) ) ) & ( ( (tk(P1)) <= ( 362 ) ) | ( ( 203 ) <= (tk(P3)) ) ) ) ) & (! ( (tk(P9)) <= ( 1045 ) )) ) & ( ( ( (! ( (tk(P6)) <= (tk(P3)) )) & ( ( ( 333 ) <= (tk(P9)) ) & ( ( 184 ) <= (tk(P8)) ) ) ) | ( (! ( (tk(P4)) <= ( 1041 ) )) & (! ( (tk(P13)) <= ( 492 ) )) ) ) | ( (! ( ( (tk(P4)) <= (tk(P3)) ) | ( ( 1451 ) <= (tk(P11)) ) )) | (! ( (tk(P12)) <= ( 1394 ) )) ) ) )) & ( ( ( (! ( ( ( (tk(P1)) <= (tk(P3)) ) | ( ( 1239 ) <= (tk(P12)) ) ) & ( (tk(P2)) <= ( 1039 ) ) )) | ( ( 1166 ) <= (tk(P13)) ) ) & ( ( ( ( ( (tk(P10)) <= ( 651 ) ) & ( ( 759 ) <= (tk(P8)) ) ) & ( (tk(P12)) <= ( 241 ) ) ) | ( ( 360 ) <= (tk(P8)) ) ) & ( (! ( ( (tk(P3)) <= ( 580 ) ) | ( (tk(P7)) <= (tk(P6)) ) )) | ( ( ( (tk(P1)) <= (tk(P10)) ) & ( (tk(P2)) <= ( 577 ) ) ) & ( ( ( 607 ) <= (tk(P12)) ) & ( (tk(P1)) <= (tk(P9)) ) ) ) ) ) ) & ( ( ( ( ( ( (tk(P13)) <= (tk(P2)) ) | ( (tk(P10)) <= ( 746 ) ) ) | ( ( 22 ) <= (tk(P11)) ) ) & ( ( ( ( 296 ) <= (tk(P12)) ) | ( (tk(P10)) <= ( 149 ) ) ) | ( ( 78 ) <= (tk(P6)) ) ) ) | (! ( ( ( 1247 ) <= (tk(P3)) ) | ( (tk(P11)) <= (tk(P11)) ) )) ) & ( ( (! ( ( (tk(P10)) <= ( 581 ) ) & ( ( 882 ) <= (tk(P9)) ) )) | (! ( (tk(P11)) <= ( 1499 ) )) ) | ( ( ( 972 ) <= (tk(P13)) ) & ( ( ( (tk(P10)) <= (tk(P11)) ) & ( (tk(P12)) <= ( 553 ) ) ) | (! ( (tk(P11)) <= (tk(P7)) )) ) ) ) ) ) ) ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04 (reachable & potential(( (! ( (! ( ( ( ( (tk(P12)) <= ( 893 ) ) | ( ( 800 ) <= (tk(P9)) ) ) & ( (tk(P13)) <= ( 274 ) ) ) & ( (tk(P3)) <= (tk(P5)) ) )) | (! ( ( ( ( (tk(P3)) <= ( 1017 ) ) | ( (tk(P7)) <= ( 1102 ) ) ) & ( ( (tk(P9)) <= ( 653 ) ) & ( (tk(P10)) <= ( 1029 ) ) ) ) | ( (tk(P1)) <= ( 459 ) ) )) )) & ( (tk(P9)) <= (tk(P13)) ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 (reachable & potential(( ( 265 ) <= (tk(P11)) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06 (reachable &!potential( ( (tk(P5)) <= ( 185 ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 (reachable & potential((! ( ( ( (tk(P11)) <= ( 818 ) ) | ( ( ( ( (tk(P5)) <= ( 1378 ) ) | ( (tk(P7)) <= ( 338 ) ) ) | (! ( ( 1463 ) <= (tk(P7)) )) ) & ( ( (! ( ( (tk(P8)) <= (tk(P5)) ) | ( ( (tk(P4)) <= (tk(P2)) ) | ( (tk(P9)) <= ( 441 ) ) ) )) & (! ( (tk(P6)) <= ( 1012 ) )) ) | ( (! ( (tk(P3)) <= (tk(P5)) )) & ( (tk(P4)) <= ( 1049 ) ) ) ) ) ) | ( (tk(P8)) <= (tk(P12)) ) ))))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08 (reachable & potential((! ( ( 1154 ) <= (tk(P10)) ))))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 (reachable & potential(( ( (! ( (tk(P13)) <= (tk(P13)) )) | ( ( ( ( (tk(P10)) <= (tk(P5)) ) | (! ( (! ( (tk(P2)) <= (tk(P5)) )) & ( ( 655 ) <= (tk(P3)) ) )) ) & ( (tk(P8)) <= ( 600 ) ) ) | ( (tk(P2)) <= ( 547 ) ) ) ) & (! ( ( (tk(P9)) <= (tk(P10)) ) | ( (tk(P6)) <= ( 431 ) ) )) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10 (reachable & potential(( (! ( (tk(P11)) <= (tk(P7)) )) & (! ( (tk(P11)) <= (tk(P11)) )) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 (reachable & potential(( ( (! ( (tk(P12)) <= ( 812 ) )) & ( ( ( (tk(P1)) <= ( 1483 ) ) & ( ( ( ( ( ( (tk(P12)) <= (tk(P5)) ) & ( (tk(P5)) <= (tk(P3)) ) ) | ( ( ( 1042 ) <= (tk(P9)) ) & ( (tk(P6)) <= (tk(P2)) ) ) ) & (! ( ( ( 209 ) <= (tk(P9)) ) & ( (tk(P13)) <= (tk(P10)) ) )) ) | ( (! ( (tk(P11)) <= (tk(P3)) )) | ( ( 352 ) <= (tk(P1)) ) ) ) | ( ( ( ( ( (tk(P9)) <= ( 1296 ) ) | ( ( 540 ) <= (tk(P7)) ) ) | ( ( (tk(P13)) <= (tk(P4)) ) & ( (tk(P3)) <= (tk(P2)) ) ) ) & ( ( ( ( 930 ) <= (tk(P11)) ) & ( (tk(P8)) <= ( 1293 ) ) ) | ( ( ( 459 ) <= (tk(P4)) ) & ( (tk(P11)) <= ( 1186 ) ) ) ) ) & ( (! ( (tk(P7)) <= ( 1289 ) )) & (! ( ( 308 ) <= (tk(P4)) )) ) ) ) ) & ( ( (! ( ( 502 ) <= (tk(P5)) )) | (! ( ( 813 ) <= (tk(P7)) )) ) | ( ( ( (tk(P13)) <= ( 393 ) ) | ( ( ( ( ( 1295 ) <= (tk(P10)) ) & ( (tk(P4)) <= (tk(P5)) ) ) & ( (tk(P4)) <= ( 581 ) ) ) & (! ( ( 749 ) <= (tk(P7)) )) ) ) | ( ( ( 1203 ) <= (tk(P2)) ) | (! ( (tk(P13)) <= ( 206 ) )) ) ) ) ) ) & ( ( (tk(P10)) <= ( 299 ) ) & ( (tk(P1)) <= ( 18 ) ) ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 (reachable & potential(( ( ( ( 1078 ) <= (tk(P4)) ) & ( (tk(P11)) <= (tk(P4)) ) ) & ( ( ( ( (tk(P4)) <= ( 1046 ) ) & ( (! ( ( ( ( ( 818 ) <= (tk(P4)) ) & ( ( 1025 ) <= (tk(P3)) ) ) & ( ( ( 649 ) <= (tk(P8)) ) & ( (tk(P12)) <= ( 190 ) ) ) ) & ( (tk(P3)) <= ( 1041 ) ) )) | (! ( ( (! ( (tk(P5)) <= (tk(P7)) )) | ( ( ( 135 ) <= (tk(P13)) ) & ( (tk(P7)) <= (tk(P6)) ) ) ) | ( (tk(P8)) <= ( 1426 ) ) )) ) ) | (! ( (! ( (tk(P2)) <= ( 1481 ) )) & ( ( ( (tk(P2)) <= (tk(P2)) ) & ( (tk(P2)) <= ( 678 ) ) ) & (! ( ( 161 ) <= (tk(P5)) )) ) )) ) | ( ( ( ( ( (tk(P2)) <= (tk(P12)) ) & ( ( ( ( (tk(P2)) <= (tk(P5)) ) | ( (tk(P13)) <= (tk(P8)) ) ) & (! ( (tk(P2)) <= ( 1454 ) )) ) & ( ( ( (tk(P9)) <= (tk(P8)) ) & ( ( 175 ) <= (tk(P5)) ) ) | ( ( ( 1064 ) <= (tk(P4)) ) & ( (tk(P1)) <= ( 1125 ) ) ) ) ) ) & ( (tk(P13)) <= ( 397 ) ) ) | ( ( ( ( ( (tk(P7)) <= (tk(P8)) ) & (! ( (tk(P10)) <= ( 641 ) )) ) | ( (! ( ( 969 ) <= (tk(P10)) )) | ( (tk(P3)) <= (tk(P6)) ) ) ) & ( (tk(P7)) <= ( 1488 ) ) ) | ( (tk(P11)) <= (tk(P8)) ) ) ) & (! ( ( ( ( ( ( 455 ) <= (tk(P1)) ) | ( (tk(P6)) <= (tk(P7)) ) ) & ( (tk(P10)) <= (tk(P8)) ) ) | ( (! ( (tk(P12)) <= (tk(P6)) )) | (! ( ( 580 ) <= (tk(P6)) )) ) ) & ( ( ( 281 ) <= (tk(P11)) ) & ( ( 933 ) <= (tk(P9)) ) ) )) ) ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 (reachable & potential(( ( ( (tk(P7)) <= ( 911 ) ) & (! ( ( ( (tk(P2)) <= ( 1423 ) ) & ( ( ( ( ( 1358 ) <= (tk(P3)) ) & ( ( 403 ) <= (tk(P1)) ) ) & (! ( ( (tk(P3)) <= ( 1318 ) ) | ( (tk(P2)) <= (tk(P3)) ) )) ) & ( ( ( (tk(P12)) <= ( 409 ) ) & (! ( (tk(P7)) <= ( 1384 ) )) ) & ( ( ( 892 ) <= (tk(P9)) ) & ( (tk(P4)) <= (tk(P6)) ) ) ) ) ) | ( ( (tk(P11)) <= (tk(P1)) ) | (! ( (tk(P5)) <= (tk(P13)) )) ) )) ) & ( (tk(P1)) <= ( 1298 ) ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14 (reachable &!potential( ( (! ( (tk(P7)) <= (tk(P8)) )) | ( ( ( (tk(P11)) <= ( 1042 ) ) & ( ( (! ( ( (tk(P10)) <= ( 95 ) ) & (! ( (tk(P11)) <= (tk(P11)) )) )) & (! ( ( ( ( (tk(P7)) <= (tk(P2)) ) | ( (tk(P8)) <= ( 594 ) ) ) | ( ( (tk(P6)) <= ( 1415 ) ) | ( (tk(P11)) <= ( 511 ) ) ) ) & ( ( ( (tk(P9)) <= (tk(P5)) ) & ( ( 815 ) <= (tk(P2)) ) ) & ( ( (tk(P5)) <= ( 1326 ) ) | ( (tk(P4)) <= ( 1009 ) ) ) ) )) ) & ( ( (tk(P7)) <= ( 40 ) ) | ( (! ( ( ( ( 346 ) <= (tk(P9)) ) | ( (tk(P8)) <= (tk(P2)) ) ) | ( (tk(P9)) <= ( 244 ) ) )) | ( ( 260 ) <= (tk(P1)) ) ) ) ) ) | ( ( ( ( (tk(P7)) <= ( 1080 ) ) | ( ( 595 ) <= (tk(P6)) ) ) | (! ( (! ( (! ( (tk(P6)) <= (tk(P11)) )) | (! ( (tk(P7)) <= (tk(P11)) )) )) | (! ( (tk(P11)) <= (tk(P10)) )) )) ) & ( (tk(P13)) <= ( 923 ) ) ) ) )))
PROPERTY: SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15 (reachable & potential(( ( ( ( ( ( (tk(P7)) <= ( 544 ) ) | ( ( ( ( (tk(P13)) <= (tk(P1)) ) | (! ( ( 300 ) <= (tk(P4)) )) ) | ( (! ( (tk(P11)) <= (tk(P6)) )) & ( ( (tk(P4)) <= ( 1369 ) ) & ( ( 90 ) <= (tk(P13)) ) ) ) ) & ( (tk(P7)) <= ( 558 ) ) ) ) | ( ( 492 ) <= (tk(P4)) ) ) & ( (! ( (tk(P5)) <= (tk(P7)) )) & ( ( (! ( ( ( (tk(P1)) <= ( 1166 ) ) & ( (tk(P3)) <= (tk(P5)) ) ) & ( ( ( 690 ) <= (tk(P3)) ) | ( (tk(P3)) <= ( 334 ) ) ) )) | ( ( ( (tk(P7)) <= (tk(P4)) ) | ( ( ( 1305 ) <= (tk(P4)) ) | ( (tk(P11)) <= (tk(P3)) ) ) ) | ( (tk(P12)) <= ( 448 ) ) ) ) | ( (tk(P2)) <= (tk(P13)) ) ) ) ) & ( (tk(P3)) <= (tk(P3)) ) ) & ( ( ( ( (! ( (tk(P5)) <= ( 447 ) )) | (! ( ( (tk(P12)) <= ( 367 ) ) & ( (tk(P8)) <= (tk(P7)) ) )) ) | (! ( (! ( (tk(P9)) <= (tk(P8)) )) & ( ( (! ( ( 843 ) <= (tk(P4)) )) | (! ( (tk(P11)) <= (tk(P1)) )) ) | ( ( ( ( 1169 ) <= (tk(P1)) ) & ( (tk(P11)) <= (tk(P12)) ) ) | ( ( ( 119 ) <= (tk(P1)) ) | ( ( 189 ) <= (tk(P4)) ) ) ) ) )) ) | ( (tk(P3)) <= (tk(P6)) ) ) | ( (! ( (tk(P3)) <= ( 862 ) )) | ( ( (! ( (tk(P11)) <= (tk(P13)) )) | (! ( ( ( 1030 ) <= (tk(P7)) ) | ( ( 945 ) <= (tk(P8)) ) )) ) | ( ( ( (tk(P2)) <= (tk(P5)) ) & (! ( ( ( (tk(P2)) <= ( 1307 ) ) & ( (tk(P11)) <= (tk(P4)) ) ) | ( ( (tk(P8)) <= (tk(P6)) ) & ( ( 177 ) <= (tk(P4)) ) ) )) ) & (! ( (tk(P3)) <= ( 342 ) )) ) ) ) ) )))
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
BK_STOP 1679116387833
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X01500Y0046"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is SatelliteMemory-PT-X01500Y0046, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r363-smll-167891814100318"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X01500Y0046.tgz
mv SatelliteMemory-PT-X01500Y0046 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;