Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r362-smll-167891813400686.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marciexred
Input is SharedMemory-PT-000050, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r362-smll-167891813400686
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 41M
-rw-r--r-- 1 mcc users 685K Feb 25 16:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 2.6M Feb 25 16:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 1.6M Feb 25 15:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 6.1M Feb 25 15:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 665K Feb 25 16:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.8M Feb 25 16:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 480K Feb 25 16:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.4M Feb 25 16:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.5M Feb 25 18:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.7M Feb 25 18:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3M Feb 25 17:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13M Feb 25 17:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 2.6M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-00
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-01
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-02
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-03
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-04
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-05
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-06
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-07
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-08
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-09
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-10
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-11
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-12
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-13
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-14
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679376811712

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marciexred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-PT-000050
Applying reductions before tool marcie
Invoking reducer
Running Version 202303021504
[2023-03-21 05:33:34] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-21 05:33:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 05:33:35] [INFO ] Load time of PNML (sax parser for PT used): 545 ms
[2023-03-21 05:33:35] [INFO ] Transformed 2651 places.
[2023-03-21 05:33:35] [INFO ] Transformed 5050 transitions.
[2023-03-21 05:33:35] [INFO ] Found NUPN structural information;
[2023-03-21 05:33:35] [INFO ] Completing missing partition info from NUPN : creating a component with [Ext_Mem_Acc_8_2, Ext_Mem_Acc_7_2, Ext_Mem_Acc_20_3, Ext_Mem_Acc_19_3, Ext_Mem_Acc_24_4, Ext_Mem_Acc_15_4, Ext_Mem_Acc_13_5, Ext_Mem_Acc_14_5, Ext_Mem_Acc_17_6, Ext_Mem_Acc_14_6, Ext_Mem_Acc_2_8, Ext_Mem_Acc_1_8, Ext_Mem_Acc_16_9, Ext_Mem_Acc_21_9, Ext_Mem_Acc_26_9, Ext_Mem_Acc_25_9, Ext_Mem_Acc_6_11, Ext_Mem_Acc_7_11, Ext_Mem_Acc_27_11, Ext_Mem_Acc_28_11, Ext_Mem_Acc_40_13, Ext_Mem_Acc_39_13, Ext_Mem_Acc_39_14, Ext_Mem_Acc_38_14, Ext_Mem_Acc_20_14, Ext_Mem_Acc_21_14, Ext_Mem_Acc_43_15, Ext_Mem_Acc_44_15, Ext_Mem_Acc_49_16, Ext_Mem_Acc_48_16, Ext_Mem_Acc_40_18, Ext_Mem_Acc_41_18, Ext_Mem_Acc_13_20, Ext_Mem_Acc_14_20, Ext_Mem_Acc_37_21, Ext_Mem_Acc_38_21, Ext_Mem_Acc_41_20, Ext_Mem_Acc_40_20, Ext_Mem_Acc_45_23, Ext_Mem_Acc_46_23, Ext_Mem_Acc_16_22, Ext_Mem_Acc_15_22, Ext_Mem_Acc_11_26, Ext_Mem_Acc_12_26, Ext_Mem_Acc_31_24, Ext_Mem_Acc_30_24, Ext_Mem_Acc_31_25, Ext_Mem_Acc_32_25, Ext_Mem_Acc_21_29, Ext_Mem_Acc_20_29, Ext_Mem_Acc_13_28, Ext_Mem_Acc_16_28, Ext_Mem_Acc_15_31, Ext_Mem_Acc_14_31, Ext_Mem_Acc_16_30, Ext_Mem_Acc_13_30, Ext_Mem_Acc_24_34, Ext_Mem_Acc_21_34, Ext_Mem_Acc_9_34, Ext_Mem_Acc_12_34, Ext_Mem_Acc_20_32, Ext_Mem_Acc_21_32, Ext_Mem_Acc_25_37, Ext_Mem_Acc_22_37, Ext_Mem_Acc_2_36, Ext_Mem_Acc_49_35, Ext_Mem_Acc_6_40, Ext_Mem_Acc_5_40, Ext_Mem_Acc_42_38, Ext_Mem_Acc_43_38, Ext_Mem_Acc_44_37, Ext_Mem_Acc_43_37, Ext_Mem_Acc_38_41, Ext_Mem_Acc_39_41, Ext_Mem_Acc_43_40, Ext_Mem_Acc_42_40, Ext_Mem_Acc_36_45, Ext_Mem_Acc_37_45, Ext_Mem_Acc_6_46, Ext_Mem_Acc_5_46, Ext_Mem_Acc_29_47, Ext_Mem_Acc_28_47, Ext_Mem_Acc_41_43, Ext_Mem_Acc_40_43, Ext_Mem_Acc_17_44, Ext_Mem_Acc_18_44, Ext_Mem_Acc_34_50, Ext_Mem_Acc_33_50, Ext_Mem_Acc_44_48, Ext_Mem_Acc_45_48, Ext_Mem_Acc_2_50, Ext_Mem_Acc_3_50]
[2023-03-21 05:33:35] [INFO ] Parsed PT model containing 2651 places and 5050 transitions and 20000 arcs in 705 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 892 ms.
Working with output stream class java.io.PrintStream
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 5163 ms. (steps per millisecond=1 ) properties (out of 13) seen :4
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 3267 ms. (steps per millisecond=3 ) properties (out of 9) seen :1
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Interrupted Best-First random walk after 7031 steps, including 1 resets, run timeout after 5145 ms. (steps per millisecond=1 ) properties seen 0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 8) seen :1
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 5050 rows 2651 cols
[2023-03-21 05:33:50] [INFO ] Computed 101 place invariants in 389 ms
[2023-03-21 05:33:58] [INFO ] After 1981ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:6
[2023-03-21 05:33:59] [INFO ] [Nat]Absence check using 101 positive place invariants in 109 ms returned sat
[2023-03-21 05:34:02] [INFO ] After 2609ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :1
[2023-03-21 05:34:03] [INFO ] After 2985ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :1
Attempting to minimize the solution found.
Minimization took 197 ms.
[2023-03-21 05:34:03] [INFO ] After 4719ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :1
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 7 Parikh solutions to 1 different solutions.
Finished Parikh walk after 17 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=5 )
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 8 ms.
All properties solved without resorting to model-checking.
Total runtime 28910 ms.
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../reducer/bin//../../marcie/bin/marcie --net-file=model.pnml --mcc-file=ReachabilityCardinality.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: SharedMemory_PT_000050
(NrP: 2651 NrTr: 5050 NrArc: 20000)

parse formulas
formulas created successfully
place and transition orderings generation:0m 2.877sec

net check time: 0m 0.006sec

init dd package: 0m 3.365sec

TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 10246080 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16056232 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
check for maximal unmarked siphon
ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.009sec

45404 60974 103862

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000050"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="marciexred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marciexred"
echo " Input is SharedMemory-PT-000050, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r362-smll-167891813400686"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000050.tgz
mv SharedMemory-PT-000050 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;