fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r361-smll-167891811700546
Last Updated
May 14, 2023

About the Execution of LTSMin+red for SharedMemory-COL-000005

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
269.731 8254.00 16988.00 520.80 TTFTFFFFFFTFTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r361-smll-167891811700546.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is SharedMemory-COL-000005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891811700546
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 8.5K Feb 25 14:01 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 25 14:01 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 25 13:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 13:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 25 14:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 14:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 14:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 12K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-00
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-01
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-02
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-03
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-04
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-05
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-06
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-07
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-08
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-09
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-10
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-11
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-12
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-13
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-14
FORMULA_NAME SharedMemory-COL-000005-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679371184681

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-COL-000005
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-21 03:59:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 03:59:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 03:59:47] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-21 03:59:47] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-21 03:59:48] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 831 ms
[2023-03-21 03:59:48] [INFO ] Imported 6 HL places and 5 HL transitions for a total of 46 PT places and 85.0 transition bindings in 22 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
[2023-03-21 03:59:48] [INFO ] Built PT skeleton of HLPN with 6 places and 5 transitions 16 arcs in 5 ms.
[2023-03-21 03:59:48] [INFO ] Skeletonized 7 HLPN properties in 3 ms. Removed 9 properties that had guard overlaps.
Initial state reduction rules removed 1 formulas.
FORMULA SharedMemory-COL-000005-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 2 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 7 steps, including 0 resets, run visited all 2 properties in 9 ms. (steps per millisecond=0 )
[2023-03-21 03:59:48] [INFO ] Flatten gal took : 16 ms
[2023-03-21 03:59:48] [INFO ] Flatten gal took : 2 ms
Domain [P(5), P(5)] of place Ext_Mem_Acc breaks symmetries in sort P
[2023-03-21 03:59:48] [INFO ] Unfolded HLPN to a Petri net with 46 places and 60 transitions 220 arcs in 13 ms.
[2023-03-21 03:59:48] [INFO ] Unfolded 15 HLPN properties in 2 ms.
Initial state reduction rules removed 1 formulas.
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 5 transitions.
FORMULA SharedMemory-COL-000005-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 41 out of 41 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 8 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
// Phase 1: matrix 55 rows 41 cols
[2023-03-21 03:59:48] [INFO ] Computed 11 place invariants in 10 ms
[2023-03-21 03:59:49] [INFO ] Implicit Places using invariants in 215 ms returned []
[2023-03-21 03:59:49] [INFO ] Invariant cache hit.
[2023-03-21 03:59:49] [INFO ] Implicit Places using invariants and state equation in 112 ms returned []
Implicit Place search using SMT with State Equation took 366 ms to find 0 implicit places.
[2023-03-21 03:59:49] [INFO ] Invariant cache hit.
[2023-03-21 03:59:49] [INFO ] Dead Transitions using invariants and state equation in 143 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 521 ms. Remains : 41/41 places, 55/55 transitions.
Support contains 41 out of 41 places after structural reductions.
[2023-03-21 03:59:49] [INFO ] Flatten gal took : 40 ms
[2023-03-21 03:59:49] [INFO ] Flatten gal took : 49 ms
[2023-03-21 03:59:49] [INFO ] Input system was already deterministic with 55 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 167 ms. (steps per millisecond=59 ) properties (out of 24) seen :23
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 113 ms. (steps per millisecond=88 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-21 03:59:50] [INFO ] Invariant cache hit.
[2023-03-21 03:59:50] [INFO ] After 32ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 12 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 20 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 7 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 7 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 7 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 9 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 6 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 13 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 7 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 4 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 6 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 3 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Finished random walk after 2 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=1 )
FORMULA SharedMemory-COL-000005-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 4 ms
[2023-03-21 03:59:50] [INFO ] Flatten gal took : 5 ms
[2023-03-21 03:59:51] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-21 03:59:51] [INFO ] Flatten gal took : 3 ms
[2023-03-21 03:59:51] [INFO ] Flatten gal took : 3 ms
[2023-03-21 03:59:51] [INFO ] Input system was already deterministic with 55 transitions.
[2023-03-21 03:59:51] [INFO ] Flatten gal took : 20 ms
[2023-03-21 03:59:51] [INFO ] Flatten gal took : 12 ms
[2023-03-21 03:59:51] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 29 ms.
[2023-03-21 03:59:51] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 41 places, 55 transitions and 200 arcs took 1 ms.
Total runtime 3679 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/463/ctl_0_ --ctl=/tmp/463/ctl_1_ --ctl=/tmp/463/ctl_2_ --ctl=/tmp/463/ctl_3_ --ctl=/tmp/463/ctl_4_ --ctl=/tmp/463/ctl_5_ --ctl=/tmp/463/ctl_6_ --ctl=/tmp/463/ctl_7_ --ctl=/tmp/463/ctl_8_ --ctl=/tmp/463/ctl_9_ --ctl=/tmp/463/ctl_10_ --ctl=/tmp/463/ctl_11_ --ctl=/tmp/463/ctl_12_ --mu-par --mu-opt
FORMULA SharedMemory-COL-000005-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-COL-000005-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1679371192935

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name SharedMemory-COL-000005-CTLFireability-02
ctl formula formula --ctl=/tmp/463/ctl_0_
ctl formula name SharedMemory-COL-000005-CTLFireability-03
ctl formula formula --ctl=/tmp/463/ctl_1_
ctl formula name SharedMemory-COL-000005-CTLFireability-04
ctl formula formula --ctl=/tmp/463/ctl_2_
ctl formula name SharedMemory-COL-000005-CTLFireability-05
ctl formula formula --ctl=/tmp/463/ctl_3_
ctl formula name SharedMemory-COL-000005-CTLFireability-06
ctl formula formula --ctl=/tmp/463/ctl_4_
ctl formula name SharedMemory-COL-000005-CTLFireability-07
ctl formula formula --ctl=/tmp/463/ctl_5_
ctl formula name SharedMemory-COL-000005-CTLFireability-08
ctl formula formula --ctl=/tmp/463/ctl_6_
ctl formula name SharedMemory-COL-000005-CTLFireability-09
ctl formula formula --ctl=/tmp/463/ctl_7_
ctl formula name SharedMemory-COL-000005-CTLFireability-10
ctl formula formula --ctl=/tmp/463/ctl_8_
ctl formula name SharedMemory-COL-000005-CTLFireability-11
ctl formula formula --ctl=/tmp/463/ctl_9_
ctl formula name SharedMemory-COL-000005-CTLFireability-13
ctl formula formula --ctl=/tmp/463/ctl_10_
ctl formula name SharedMemory-COL-000005-CTLFireability-14
ctl formula formula --ctl=/tmp/463/ctl_11_
ctl formula name SharedMemory-COL-000005-CTLFireability-15
ctl formula formula --ctl=/tmp/463/ctl_12_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 41 places, 55 transitions and 200 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 55->50 groups
pnml2lts-sym: Regrouping took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: state vector length is 41; there are 50 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 678 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.050 real 0.150 user 0.040 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.010 sys
pnml2lts-sym: state space has 1863 states, 501 nodes
pnml2lts-sym: Formula /tmp/463/ctl_2_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_12_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_11_ holds for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_10_ holds for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_0_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_3_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_4_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_6_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_1_ holds for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_9_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_8_ holds for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_5_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/463/ctl_7_ does not hold for the initial state
pnml2lts-sym: group_next: 462 nodes total
pnml2lts-sym: group_explored: 518 nodes, 325 short vectors total
pnml2lts-sym: max token count: 1
munmap_chunk(): invalid pointer
free(): invalid pointer
free(): invalid pointer

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-COL-000005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is SharedMemory-COL-000005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891811700546"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-COL-000005.tgz
mv SharedMemory-COL-000005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;