About the Execution of LTSMin+red for RwMutex-PT-r0100w0010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
442.688 | 3579197.00 | 14298116.00 | 359.70 | ?????????????T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r361-smll-167891811000170.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is RwMutex-PT-r0100w0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891811000170
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 696K
-rw-r--r-- 1 mcc users 5.6K Feb 25 22:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 22:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 22:38 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 22:38 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 22:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 25 22:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 22:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K Feb 25 22:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 215K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0100w0010-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679052561286
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0100w0010
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-17 11:29:23] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:29:23] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:29:23] [INFO ] Load time of PNML (sax parser for PT used): 149 ms
[2023-03-17 11:29:23] [INFO ] Transformed 320 places.
[2023-03-17 11:29:23] [INFO ] Transformed 220 transitions.
[2023-03-17 11:29:23] [INFO ] Found NUPN structural information;
[2023-03-17 11:29:23] [INFO ] Parsed PT model containing 320 places and 220 transitions and 2640 arcs in 266 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
Initial state reduction rules removed 1 formulas.
FORMULA RwMutex-PT-r0100w0010-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 180 out of 320 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 320/320 places, 220/220 transitions.
Applied a total of 0 rules in 36 ms. Remains 320 /320 variables (removed 0) and now considering 220/220 (removed 0) transitions.
// Phase 1: matrix 220 rows 320 cols
[2023-03-17 11:29:24] [INFO ] Computed 210 place invariants in 29 ms
[2023-03-17 11:29:24] [INFO ] Implicit Places using invariants in 686 ms returned [4, 6, 7, 8, 9, 10, 13, 14, 23, 34, 45, 56, 67, 78, 89, 100, 123, 134, 156, 178, 189, 200, 211, 223, 245, 247, 250, 251, 253, 254, 255, 256, 258, 259, 260, 262, 264, 265, 268, 269, 271, 274, 275, 276, 277, 279, 282, 284, 285, 286, 288, 290, 294, 295, 298, 300, 301, 302, 305, 307, 310, 311, 312, 313, 314, 315, 316, 317, 318]
Discarding 69 places :
Implicit Place search using SMT only with invariants took 733 ms to find 69 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 251/320 places, 220/220 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 246 transition count 215
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 246 transition count 215
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 15 place count 246 transition count 210
Applied a total of 15 rules in 24 ms. Remains 246 /251 variables (removed 5) and now considering 210/220 (removed 10) transitions.
// Phase 1: matrix 210 rows 246 cols
[2023-03-17 11:29:24] [INFO ] Computed 141 place invariants in 5 ms
[2023-03-17 11:29:24] [INFO ] Implicit Places using invariants in 150 ms returned []
[2023-03-17 11:29:24] [INFO ] Invariant cache hit.
[2023-03-17 11:29:25] [INFO ] Implicit Places using invariants and state equation in 216 ms returned []
Implicit Place search using SMT with State Equation took 368 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 246/320 places, 210/220 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1162 ms. Remains : 246/320 places, 210/220 transitions.
Support contains 180 out of 246 places after structural reductions.
[2023-03-17 11:29:25] [INFO ] Flatten gal took : 144 ms
[2023-03-17 11:29:25] [INFO ] Flatten gal took : 75 ms
[2023-03-17 11:29:25] [INFO ] Input system was already deterministic with 210 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 636 ms. (steps per millisecond=15 ) properties (out of 65) seen :63
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-17 11:29:26] [INFO ] Invariant cache hit.
[2023-03-17 11:29:26] [INFO ] [Real]Absence check using 141 positive place invariants in 49 ms returned sat
[2023-03-17 11:29:26] [INFO ] After 134ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
[2023-03-17 11:29:26] [INFO ] Flatten gal took : 39 ms
[2023-03-17 11:29:26] [INFO ] Flatten gal took : 49 ms
[2023-03-17 11:29:26] [INFO ] Input system was already deterministic with 210 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 28 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:26] [INFO ] Flatten gal took : 23 ms
[2023-03-17 11:29:26] [INFO ] Flatten gal took : 21 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 8 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 21 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 20 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 10 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 19 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 19 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 9 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 17 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 19 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 20 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 19 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 20 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 245 transition count 209
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 245 transition count 209
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 3 place count 245 transition count 208
Applied a total of 3 rules in 16 ms. Remains 245 /246 variables (removed 1) and now considering 208/210 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 245/246 places, 208/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 22 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 22 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 208 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 9 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 16 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 16 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Graph (trivial) has 116 edges and 246 vertex of which 116 / 246 are part of one of the 58 SCC in 4 ms
Free SCC test removed 58 places
Ensure Unique test removed 58 transitions
Reduce isomorphic transitions removed 58 transitions.
Drop transitions removed 34 transitions
Trivial Post-agglo rules discarded 34 transitions
Performed 34 trivial Post agglomeration. Transition count delta: 34
Iterating post reduction 0 with 34 rules applied. Total rules applied 35 place count 188 transition count 118
Reduce places removed 68 places and 0 transitions.
Iterating post reduction 1 with 68 rules applied. Total rules applied 103 place count 120 transition count 118
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 105 place count 118 transition count 116
Iterating global reduction 2 with 2 rules applied. Total rules applied 107 place count 118 transition count 116
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 109 place count 118 transition count 114
Applied a total of 109 rules in 33 ms. Remains 118 /246 variables (removed 128) and now considering 114/210 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 118/246 places, 114/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 9 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 8 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Graph (trivial) has 122 edges and 246 vertex of which 122 / 246 are part of one of the 61 SCC in 1 ms
Free SCC test removed 61 places
Ensure Unique test removed 61 transitions
Reduce isomorphic transitions removed 61 transitions.
Drop transitions removed 38 transitions
Trivial Post-agglo rules discarded 38 transitions
Performed 38 trivial Post agglomeration. Transition count delta: 38
Iterating post reduction 0 with 38 rules applied. Total rules applied 39 place count 185 transition count 111
Reduce places removed 76 places and 0 transitions.
Iterating post reduction 1 with 76 rules applied. Total rules applied 115 place count 109 transition count 111
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 117 place count 107 transition count 109
Iterating global reduction 2 with 2 rules applied. Total rules applied 119 place count 107 transition count 109
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 121 place count 107 transition count 107
Applied a total of 121 rules in 20 ms. Remains 107 /246 variables (removed 139) and now considering 107/210 (removed 103) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 107/246 places, 107/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 107 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 7 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 25 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Graph (trivial) has 120 edges and 246 vertex of which 120 / 246 are part of one of the 60 SCC in 1 ms
Free SCC test removed 60 places
Ensure Unique test removed 60 transitions
Reduce isomorphic transitions removed 60 transitions.
Drop transitions removed 44 transitions
Trivial Post-agglo rules discarded 44 transitions
Performed 44 trivial Post agglomeration. Transition count delta: 44
Iterating post reduction 0 with 44 rules applied. Total rules applied 45 place count 186 transition count 106
Reduce places removed 184 places and 0 transitions.
Ensure Unique test removed 102 transitions
Reduce isomorphic transitions removed 102 transitions.
Iterating post reduction 1 with 286 rules applied. Total rules applied 331 place count 2 transition count 4
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 332 place count 2 transition count 3
Applied a total of 332 rules in 7 ms. Remains 2 /246 variables (removed 244) and now considering 3/210 (removed 207) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 2/246 places, 3/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:27] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 9 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:27] [INFO ] Flatten gal took : 14 ms
[2023-03-17 11:29:28] [INFO ] Flatten gal took : 14 ms
[2023-03-17 11:29:28] [INFO ] Input system was already deterministic with 206 transitions.
Starting structural reductions in LTL mode, iteration 0 : 246/246 places, 210/210 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 244 transition count 208
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 244 transition count 208
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 244 transition count 206
Applied a total of 6 rules in 7 ms. Remains 244 /246 variables (removed 2) and now considering 206/210 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 244/246 places, 206/210 transitions.
[2023-03-17 11:29:28] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:28] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:29:28] [INFO ] Input system was already deterministic with 206 transitions.
[2023-03-17 11:29:28] [INFO ] Flatten gal took : 25 ms
[2023-03-17 11:29:28] [INFO ] Flatten gal took : 25 ms
[2023-03-17 11:29:28] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-17 11:29:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 246 places, 210 transitions and 1492 arcs took 3 ms.
Total runtime 4628 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/463/ctl_0_ --ctl=/tmp/463/ctl_1_ --ctl=/tmp/463/ctl_2_ --ctl=/tmp/463/ctl_3_ --ctl=/tmp/463/ctl_4_ --ctl=/tmp/463/ctl_5_ --ctl=/tmp/463/ctl_6_ --ctl=/tmp/463/ctl_7_ --ctl=/tmp/463/ctl_8_ --ctl=/tmp/463/ctl_9_ --ctl=/tmp/463/ctl_10_ --ctl=/tmp/463/ctl_11_ --ctl=/tmp/463/ctl_12_ --ctl=/tmp/463/ctl_13_ --ctl=/tmp/463/ctl_14_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3570 seconds
MemTotal: 16393232 kB
MemFree: 16034936 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16100208 kB
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-00
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-01
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-02
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-03
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-04
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-05
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-06
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-07
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-08
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-09
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-10
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-11
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-12
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-14
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLFireability-15
BK_STOP 1679056140483
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-00
ctl formula formula --ctl=/tmp/463/ctl_0_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-01
ctl formula formula --ctl=/tmp/463/ctl_1_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-02
ctl formula formula --ctl=/tmp/463/ctl_2_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-03
ctl formula formula --ctl=/tmp/463/ctl_3_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-04
ctl formula formula --ctl=/tmp/463/ctl_4_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-05
ctl formula formula --ctl=/tmp/463/ctl_5_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-06
ctl formula formula --ctl=/tmp/463/ctl_6_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-07
ctl formula formula --ctl=/tmp/463/ctl_7_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-08
ctl formula formula --ctl=/tmp/463/ctl_8_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-09
ctl formula formula --ctl=/tmp/463/ctl_9_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-10
ctl formula formula --ctl=/tmp/463/ctl_10_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-11
ctl formula formula --ctl=/tmp/463/ctl_11_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-12
ctl formula formula --ctl=/tmp/463/ctl_12_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-14
ctl formula formula --ctl=/tmp/463/ctl_13_
ctl formula name RwMutex-PT-r0100w0010-CTLFireability-15
ctl formula formula --ctl=/tmp/463/ctl_14_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 246 places, 210 transitions and 1492 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.010 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 210->105 groups
pnml2lts-sym: Regrouping took 0.050 real 0.050 user 0.000 sys
pnml2lts-sym: state vector length is 246; there are 105 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
Killing (15) : 469
Killing (9) : 469
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0100w0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0100w0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891811000170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0100w0010.tgz
mv RwMutex-PT-r0100w0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;