Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r361-smll-167891811000169.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is RwMutex-PT-r0100w0010, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891811000169
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 696K
-rw-r--r-- 1 mcc users 5.6K Feb 25 22:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 22:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 22:38 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 22:38 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 22:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 25 22:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 22:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K Feb 25 22:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 215K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-00
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-01
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-02
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-03
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-04
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-05
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-06
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-07
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-08
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-09
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-10
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-11
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-12
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-13
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-14
FORMULA_NAME RwMutex-PT-r0100w0010-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679052483999

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0100w0010
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-17 11:28:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-17 11:28:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:28:06] [INFO ] Load time of PNML (sax parser for PT used): 275 ms
[2023-03-17 11:28:06] [INFO ] Transformed 320 places.
[2023-03-17 11:28:06] [INFO ] Transformed 220 transitions.
[2023-03-17 11:28:06] [INFO ] Found NUPN structural information;
[2023-03-17 11:28:06] [INFO ] Parsed PT model containing 320 places and 220 transitions and 2640 arcs in 416 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 14 ms.
Initial state reduction rules removed 1 formulas.
FORMULA RwMutex-PT-r0100w0010-CTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 63 out of 320 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 320/320 places, 220/220 transitions.
Applied a total of 0 rules in 46 ms. Remains 320 /320 variables (removed 0) and now considering 220/220 (removed 0) transitions.
// Phase 1: matrix 220 rows 320 cols
[2023-03-17 11:28:06] [INFO ] Computed 210 place invariants in 30 ms
[2023-03-17 11:28:08] [INFO ] Implicit Places using invariants in 1976 ms returned [1, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14, 34, 56, 67, 78, 89, 111, 112, 123, 134, 145, 167, 178, 189, 211, 222, 223, 234, 245, 247, 248, 249, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260, 261, 262, 264, 265, 266, 268, 269, 270, 271, 273, 274, 275, 278, 279, 280, 281, 285, 286, 287, 288, 291, 292, 293, 294, 295, 297, 298, 299, 300, 301, 303, 304, 305, 307, 308, 309, 310, 311, 312, 314, 315, 316, 317, 318]
Discarding 88 places :
Implicit Place search using SMT only with invariants took 2029 ms to find 88 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 232/320 places, 220/220 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 228 transition count 216
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 228 transition count 216
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 228 transition count 212
Applied a total of 12 rules in 23 ms. Remains 228 /232 variables (removed 4) and now considering 212/220 (removed 8) transitions.
// Phase 1: matrix 212 rows 228 cols
[2023-03-17 11:28:08] [INFO ] Computed 122 place invariants in 4 ms
[2023-03-17 11:28:09] [INFO ] Implicit Places using invariants in 237 ms returned []
[2023-03-17 11:28:09] [INFO ] Invariant cache hit.
[2023-03-17 11:28:09] [INFO ] Implicit Places using invariants and state equation in 305 ms returned []
Implicit Place search using SMT with State Equation took 546 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 228/320 places, 212/220 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2646 ms. Remains : 228/320 places, 212/220 transitions.
Support contains 63 out of 228 places after structural reductions.
[2023-03-17 11:28:09] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-17 11:28:09] [INFO ] Flatten gal took : 183 ms
[2023-03-17 11:28:09] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
FORMULA RwMutex-PT-r0100w0010-CTLCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0100w0010-CTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0100w0010-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0100w0010-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 11:28:09] [INFO ] Flatten gal took : 58 ms
[2023-03-17 11:28:10] [INFO ] Input system was already deterministic with 212 transitions.
Support contains 43 out of 228 places (down from 63) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 378 ms. (steps per millisecond=26 ) properties (out of 26) seen :25
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-17 11:28:10] [INFO ] Invariant cache hit.
[2023-03-17 11:28:10] [INFO ] After 87ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-17 11:28:10] [INFO ] [Nat]Absence check using 122 positive place invariants in 42 ms returned sat
[2023-03-17 11:28:10] [INFO ] After 127ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 10 simplifications.
FORMULA RwMutex-PT-r0100w0010-CTLCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 11:28:10] [INFO ] Flatten gal took : 53 ms
[2023-03-17 11:28:10] [INFO ] Flatten gal took : 48 ms
[2023-03-17 11:28:10] [INFO ] Input system was already deterministic with 212 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 18 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 18 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 17 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 9 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 17 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 17 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 9 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 14 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 8 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 14 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 20 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 9 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Graph (trivial) has 148 edges and 228 vertex of which 148 / 228 are part of one of the 74 SCC in 4 ms
Free SCC test removed 74 places
Ensure Unique test removed 74 transitions
Reduce isomorphic transitions removed 74 transitions.
Drop transitions removed 20 transitions
Trivial Post-agglo rules discarded 20 transitions
Performed 20 trivial Post agglomeration. Transition count delta: 20
Iterating post reduction 0 with 20 rules applied. Total rules applied 21 place count 154 transition count 118
Reduce places removed 40 places and 0 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 61 place count 114 transition count 118
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 65 place count 110 transition count 114
Iterating global reduction 2 with 4 rules applied. Total rules applied 69 place count 110 transition count 114
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 73 place count 110 transition count 110
Applied a total of 73 rules in 33 ms. Remains 110 /228 variables (removed 118) and now considering 110/212 (removed 102) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 110/228 places, 110/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 9 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Graph (trivial) has 158 edges and 228 vertex of which 158 / 228 are part of one of the 79 SCC in 1 ms
Free SCC test removed 79 places
Ensure Unique test removed 79 transitions
Reduce isomorphic transitions removed 79 transitions.
Drop transitions removed 26 transitions
Trivial Post-agglo rules discarded 26 transitions
Performed 26 trivial Post agglomeration. Transition count delta: 26
Iterating post reduction 0 with 26 rules applied. Total rules applied 27 place count 149 transition count 107
Reduce places removed 146 places and 0 transitions.
Ensure Unique test removed 103 transitions
Reduce isomorphic transitions removed 103 transitions.
Iterating post reduction 1 with 249 rules applied. Total rules applied 276 place count 3 transition count 4
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 277 place count 3 transition count 3
Ensure Unique test removed 1 places
Iterating post reduction 2 with 1 rules applied. Total rules applied 278 place count 2 transition count 3
Applied a total of 278 rules in 9 ms. Remains 2 /228 variables (removed 226) and now considering 3/212 (removed 209) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 2/228 places, 3/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Graph (trivial) has 156 edges and 228 vertex of which 156 / 228 are part of one of the 78 SCC in 0 ms
Free SCC test removed 78 places
Ensure Unique test removed 78 transitions
Reduce isomorphic transitions removed 78 transitions.
Drop transitions removed 20 transitions
Trivial Post-agglo rules discarded 20 transitions
Performed 20 trivial Post agglomeration. Transition count delta: 20
Iterating post reduction 0 with 20 rules applied. Total rules applied 21 place count 150 transition count 114
Reduce places removed 40 places and 0 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 61 place count 110 transition count 114
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 65 place count 106 transition count 110
Iterating global reduction 2 with 4 rules applied. Total rules applied 69 place count 106 transition count 110
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 73 place count 106 transition count 106
Applied a total of 73 rules in 23 ms. Remains 106 /228 variables (removed 122) and now considering 106/212 (removed 106) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 106/228 places, 106/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 106 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 8 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 15 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 212/212 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 224 transition count 208
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 224 transition count 208
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 12 place count 224 transition count 204
Applied a total of 12 rules in 8 ms. Remains 224 /228 variables (removed 4) and now considering 204/212 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 224/228 places, 204/212 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:28:11] [INFO ] Input system was already deterministic with 204 transitions.
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 27 ms
[2023-03-17 11:28:11] [INFO ] Flatten gal took : 27 ms
[2023-03-17 11:28:11] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-17 11:28:11] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 228 places, 212 transitions and 1656 arcs took 3 ms.
Total runtime 5402 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/469/ctl_0_ --ctl=/tmp/469/ctl_1_ --ctl=/tmp/469/ctl_2_ --ctl=/tmp/469/ctl_3_ --ctl=/tmp/469/ctl_4_ --ctl=/tmp/469/ctl_5_ --ctl=/tmp/469/ctl_6_ --ctl=/tmp/469/ctl_7_ --ctl=/tmp/469/ctl_8_ --ctl=/tmp/469/ctl_9_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3570 seconds
MemTotal: 16393216 kB
MemFree: 16034348 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16094728 kB
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-00
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-01
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-03
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-04
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-05
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-07
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-09
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-10
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-13
Could not compute solution for formula : RwMutex-PT-r0100w0010-CTLCardinality-15

BK_STOP 1679056063892

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
mcc2023
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-00
ctl formula formula --ctl=/tmp/469/ctl_0_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-01
ctl formula formula --ctl=/tmp/469/ctl_1_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-03
ctl formula formula --ctl=/tmp/469/ctl_2_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-04
ctl formula formula --ctl=/tmp/469/ctl_3_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-05
ctl formula formula --ctl=/tmp/469/ctl_4_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-07
ctl formula formula --ctl=/tmp/469/ctl_5_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-09
ctl formula formula --ctl=/tmp/469/ctl_6_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-10
ctl formula formula --ctl=/tmp/469/ctl_7_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-13
ctl formula formula --ctl=/tmp/469/ctl_8_
ctl formula name RwMutex-PT-r0100w0010-CTLCardinality-15
ctl formula formula --ctl=/tmp/469/ctl_9_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 228 places, 212 transitions and 1656 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.010 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 212->106 groups
pnml2lts-sym: Regrouping took 0.060 real 0.050 user 0.000 sys
pnml2lts-sym: state vector length is 228; there are 106 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
Killing (15) : 475
Killing (9) : 475

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0100w0010"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0100w0010, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891811000169"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0100w0010.tgz
mv RwMutex-PT-r0100w0010 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;