Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r361-smll-167891811000154.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is RwMutex-PT-r0010w2000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891811000154
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.1M
-rw-r--r-- 1 mcc users 5.8K Feb 25 23:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 23:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 23:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 23:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 01:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 143K Feb 26 01:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 26 00:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 26 00:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.6M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0010w2000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679049611223

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w2000
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-17 10:40:14] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:40:14] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:40:15] [INFO ] Load time of PNML (sax parser for PT used): 961 ms
[2023-03-17 10:40:15] [INFO ] Transformed 4030 places.
[2023-03-17 10:40:15] [INFO ] Transformed 4020 transitions.
[2023-03-17 10:40:15] [INFO ] Found NUPN structural information;
[2023-03-17 10:40:15] [INFO ] Parsed PT model containing 4030 places and 4020 transitions and 48060 arcs in 1182 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 31 ms.
Support contains 138 out of 4030 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 1184 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
// Phase 1: matrix 4020 rows 4030 cols
[2023-03-17 10:40:19] [INFO ] Computed 2020 place invariants in 2549 ms
[2023-03-17 10:40:21] [INFO ] Implicit Places using invariants in 4499 ms returned []
[2023-03-17 10:40:21] [INFO ] Invariant cache hit.
[2023-03-17 10:40:23] [INFO ] Implicit Places using invariants and state equation in 1218 ms returned []
Implicit Place search using SMT with State Equation took 5784 ms to find 0 implicit places.
[2023-03-17 10:40:23] [INFO ] Invariant cache hit.
[2023-03-17 10:40:24] [INFO ] Dead Transitions using invariants and state equation in 1081 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8056 ms. Remains : 4030/4030 places, 4020/4020 transitions.
Support contains 138 out of 4030 places after structural reductions.
[2023-03-17 10:40:25] [INFO ] Flatten gal took : 1153 ms
[2023-03-17 10:40:26] [INFO ] Flatten gal took : 465 ms
[2023-03-17 10:40:27] [INFO ] Input system was already deterministic with 4020 transitions.
Support contains 136 out of 4030 places (down from 138) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 5859 ms. (steps per millisecond=1 ) properties (out of 95) seen :69
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 45 ms. (steps per millisecond=22 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 42 ms. (steps per millisecond=23 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 42 ms. (steps per millisecond=23 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 48 ms. (steps per millisecond=20 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 61 ms. (steps per millisecond=16 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 40 ms. (steps per millisecond=25 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 42 ms. (steps per millisecond=23 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 49 ms. (steps per millisecond=20 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 66 ms. (steps per millisecond=15 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 66 ms. (steps per millisecond=15 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 0 resets, run finished after 66 ms. (steps per millisecond=15 ) properties (out of 26) seen :0
Running SMT prover for 26 properties.
[2023-03-17 10:40:35] [INFO ] Invariant cache hit.
[2023-03-17 10:40:40] [INFO ] [Real]Absence check using 2020 positive place invariants in 1276 ms returned sat
[2023-03-17 10:40:48] [INFO ] After 7383ms SMT Verify possible using state equation in real domain returned unsat :4 sat :3 real:19
[2023-03-17 10:40:50] [INFO ] After 9016ms SMT Verify possible using trap constraints in real domain returned unsat :4 sat :3 real:19
Attempting to minimize the solution found.
Minimization took 890 ms.
[2023-03-17 10:40:50] [INFO ] After 15334ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :3 real:19
[2023-03-17 10:40:55] [INFO ] [Nat]Absence check using 2020 positive place invariants in 1370 ms returned sat
[2023-03-17 10:41:08] [INFO ] After 10829ms SMT Verify possible using state equation in natural domain returned unsat :11 sat :15
[2023-03-17 10:41:15] [INFO ] After 17888ms SMT Verify possible using trap constraints in natural domain returned unsat :11 sat :15
Attempting to minimize the solution found.
Minimization took 650 ms.
[2023-03-17 10:41:15] [INFO ] After 25064ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :15
Fused 26 Parikh solutions to 15 different solutions.
Parikh walk visited 14 properties in 60 ms.
Support contains 1 out of 4030 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Discarding 2 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Remove reverse transitions (loop back) rule discarded transition t3355 and 2 places that fell out of Prefix Of Interest.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 2008 transitions
Trivial Post-agglo rules discarded 2008 transitions
Performed 2008 trivial Post agglomeration. Transition count delta: 2008
Iterating post reduction 0 with 2010 rules applied. Total rules applied 2010 place count 4028 transition count 2010
Reduce places removed 4016 places and 0 transitions.
Drop transitions removed 2008 transitions
Reduce isomorphic transitions removed 2008 transitions.
Iterating post reduction 1 with 6024 rules applied. Total rules applied 8034 place count 12 transition count 2
Ensure Unique test removed 10 places
Iterating post reduction 2 with 10 rules applied. Total rules applied 8044 place count 2 transition count 2
Applied a total of 8044 rules in 282 ms. Remains 2 /4030 variables (removed 4028) and now considering 2/4020 (removed 4018) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 284 ms. Remains : 2/4030 places, 2/4020 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
Successfully simplified 11 atomic propositions for a total of 16 simplifications.
FORMULA RwMutex-PT-r0010w2000-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w2000-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:41:16] [INFO ] Flatten gal took : 567 ms
[2023-03-17 10:41:16] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA RwMutex-PT-r0010w2000-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:41:17] [INFO ] Flatten gal took : 373 ms
[2023-03-17 10:41:18] [INFO ] Input system was already deterministic with 4020 transitions.
Support contains 80 out of 4030 places (down from 89) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 639 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 653 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:19] [INFO ] Flatten gal took : 333 ms
[2023-03-17 10:41:19] [INFO ] Flatten gal took : 333 ms
[2023-03-17 10:41:20] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 440 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 441 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:20] [INFO ] Flatten gal took : 313 ms
[2023-03-17 10:41:21] [INFO ] Flatten gal took : 323 ms
[2023-03-17 10:41:22] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 1957 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1959 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:24] [INFO ] Flatten gal took : 309 ms
[2023-03-17 10:41:24] [INFO ] Flatten gal took : 341 ms
[2023-03-17 10:41:25] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 491 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 492 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:26] [INFO ] Flatten gal took : 432 ms
[2023-03-17 10:41:26] [INFO ] Flatten gal took : 322 ms
[2023-03-17 10:41:27] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 435 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 435 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:28] [INFO ] Flatten gal took : 311 ms
[2023-03-17 10:41:28] [INFO ] Flatten gal took : 319 ms
[2023-03-17 10:41:28] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 554 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 554 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:29] [INFO ] Flatten gal took : 307 ms
[2023-03-17 10:41:30] [INFO ] Flatten gal took : 320 ms
[2023-03-17 10:41:30] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 441 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 441 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:31] [INFO ] Flatten gal took : 304 ms
[2023-03-17 10:41:31] [INFO ] Flatten gal took : 320 ms
[2023-03-17 10:41:32] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 427 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 428 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:33] [INFO ] Flatten gal took : 305 ms
[2023-03-17 10:41:33] [INFO ] Flatten gal took : 318 ms
[2023-03-17 10:41:34] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 435 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 435 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:34] [INFO ] Flatten gal took : 304 ms
[2023-03-17 10:41:35] [INFO ] Flatten gal took : 317 ms
[2023-03-17 10:41:35] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 426 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 426 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:36] [INFO ] Flatten gal took : 301 ms
[2023-03-17 10:41:36] [INFO ] Flatten gal took : 325 ms
[2023-03-17 10:41:37] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 421 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 421 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:38] [INFO ] Flatten gal took : 300 ms
[2023-03-17 10:41:38] [INFO ] Flatten gal took : 318 ms
[2023-03-17 10:41:38] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 434 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 435 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:39] [INFO ] Flatten gal took : 303 ms
[2023-03-17 10:41:40] [INFO ] Flatten gal took : 321 ms
[2023-03-17 10:41:40] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 642 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 644 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-17 10:41:41] [INFO ] Flatten gal took : 303 ms
[2023-03-17 10:41:41] [INFO ] Flatten gal took : 323 ms
[2023-03-17 10:41:42] [INFO ] Input system was already deterministic with 4020 transitions.
[2023-03-17 10:41:42] [INFO ] Flatten gal took : 323 ms
[2023-03-17 10:41:43] [INFO ] Flatten gal took : 361 ms
[2023-03-17 10:41:43] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 13 ms.
[2023-03-17 10:41:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 4030 places, 4020 transitions and 48060 arcs took 97 ms.
Total runtime 88660 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/488/ctl_0_ --ctl=/tmp/488/ctl_1_ --ctl=/tmp/488/ctl_2_ --ctl=/tmp/488/ctl_3_ --ctl=/tmp/488/ctl_4_ --ctl=/tmp/488/ctl_5_ --ctl=/tmp/488/ctl_6_ --ctl=/tmp/488/ctl_7_ --ctl=/tmp/488/ctl_8_ --ctl=/tmp/488/ctl_9_ --ctl=/tmp/488/ctl_10_ --ctl=/tmp/488/ctl_11_ --ctl=/tmp/488/ctl_12_ --mu-par --mu-opt
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-00
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-02
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-03
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-04
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-05
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-06
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-08
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-09
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-10
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-11
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-12
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-14
Could not compute solution for formula : RwMutex-PT-r0010w2000-CTLFireability-15

BK_STOP 1679051030594

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-00
ctl formula formula --ctl=/tmp/488/ctl_0_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-02
ctl formula formula --ctl=/tmp/488/ctl_1_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-03
ctl formula formula --ctl=/tmp/488/ctl_2_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-04
ctl formula formula --ctl=/tmp/488/ctl_3_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-05
ctl formula formula --ctl=/tmp/488/ctl_4_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-06
ctl formula formula --ctl=/tmp/488/ctl_5_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-08
ctl formula formula --ctl=/tmp/488/ctl_6_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-09
ctl formula formula --ctl=/tmp/488/ctl_7_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-10
ctl formula formula --ctl=/tmp/488/ctl_8_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-11
ctl formula formula --ctl=/tmp/488/ctl_9_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-12
ctl formula formula --ctl=/tmp/488/ctl_10_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-14
ctl formula formula --ctl=/tmp/488/ctl_11_
ctl formula name RwMutex-PT-r0010w2000-CTLFireability-15
ctl formula formula --ctl=/tmp/488/ctl_12_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 4030 places, 4020 transitions and 48060 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.220 real 0.180 user 0.040 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 4020->2010 groups
pnml2lts-sym: Regrouping took 20.650 real 20.640 user 0.000 sys
pnml2lts-sym: state vector length is 4030; there are 2010 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: Exploration took 1035271 group checks and 0 next state calls
pnml2lts-sym: reachability took 1278.930 real 4980.250 user 129.130 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.150 real 0.590 user 0.000 sys
pnml2lts-sym: state space has 3024 states, 2057063 nodes
corrupted size vs. prev_size

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w2000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0010w2000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891811000154"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w2000.tgz
mv RwMutex-PT-r0010w2000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;