About the Execution of LTSMin+red for RwMutex-PT-r0010w0500
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
422.012 | 94587.00 | 353202.00 | 518.10 | FFFFFTFTTFTTTFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r361-smll-167891810900138.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is RwMutex-PT-r0010w0500, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891810900138
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 6.8K Feb 25 22:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 25 22:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 22:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 22:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Feb 25 23:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 25 23:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 23:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Feb 25 23:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 887K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0010w0500-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679046956026
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w0500
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-17 09:55:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 09:55:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 09:55:59] [INFO ] Load time of PNML (sax parser for PT used): 286 ms
[2023-03-17 09:55:59] [INFO ] Transformed 1030 places.
[2023-03-17 09:55:59] [INFO ] Transformed 1020 transitions.
[2023-03-17 09:55:59] [INFO ] Found NUPN structural information;
[2023-03-17 09:55:59] [INFO ] Parsed PT model containing 1030 places and 1020 transitions and 12060 arcs in 416 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Initial state reduction rules removed 3 formulas.
FORMULA RwMutex-PT-r0010w0500-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0500-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0500-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 97 out of 1030 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1030/1030 places, 1020/1020 transitions.
Applied a total of 0 rules in 179 ms. Remains 1030 /1030 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
// Phase 1: matrix 1020 rows 1030 cols
[2023-03-17 09:55:59] [INFO ] Computed 520 place invariants in 217 ms
[2023-03-17 09:56:00] [INFO ] Implicit Places using invariants in 1299 ms returned []
[2023-03-17 09:56:00] [INFO ] Invariant cache hit.
[2023-03-17 09:56:03] [INFO ] Implicit Places using invariants and state equation in 2298 ms returned [1, 2, 13, 24, 35, 37, 38, 39, 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 62, 63, 64, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 157, 158, 161, 162, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 175, 176, 177, 178, 179, 180, 182, 184, 185, 186, 187, 188, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 271, 272, 273, 274, 275, 276, 278, 279, 280, 281, 282, 283, 284, 286, 287, 288, 290, 291, 292, 293, 294, 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 328, 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 352, 353, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 370, 371, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 390, 391, 392, 393, 395, 396, 398, 399, 400, 402, 403, 404, 405, 406, 407, 408, 409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438, 439, 442, 443, 444, 445, 447, 448, 449, 450, 451, 452, 453, 455, 456, 457, 458, 459, 461, 462, 463, 464, 465, 466, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480, 481, 482, 483, 484, 486, 487, 488, 489, 498, 509, 520, 531, 542, 553, 564, 575, 586, 587, 598, 609, 620, 642, 653, 664, 675, 686, 697, 698, 709, 720, 731, 742, 753, 764, 775, 786, 797, 808, 820, 831, 853, 864, 875, 886, 897, 908, 919, 920, 931, 942, 953, 964, 986, 997, 1008]
Discarding 466 places :
Implicit Place search using SMT with State Equation took 3766 ms to find 466 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 564/1030 places, 1020/1020 transitions.
Discarding 418 places :
Symmetric choice reduction at 0 with 418 rule applications. Total rules 418 place count 146 transition count 602
Iterating global reduction 0 with 418 rules applied. Total rules applied 836 place count 146 transition count 602
Ensure Unique test removed 418 transitions
Reduce isomorphic transitions removed 418 transitions.
Iterating post reduction 0 with 418 rules applied. Total rules applied 1254 place count 146 transition count 184
Applied a total of 1254 rules in 43 ms. Remains 146 /564 variables (removed 418) and now considering 184/1020 (removed 836) transitions.
// Phase 1: matrix 184 rows 146 cols
[2023-03-17 09:56:03] [INFO ] Computed 54 place invariants in 6 ms
[2023-03-17 09:56:03] [INFO ] Implicit Places using invariants in 63 ms returned []
[2023-03-17 09:56:03] [INFO ] Invariant cache hit.
[2023-03-17 09:56:03] [INFO ] Implicit Places using invariants and state equation in 124 ms returned []
Implicit Place search using SMT with State Equation took 189 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 146/1030 places, 184/1020 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 4179 ms. Remains : 146/1030 places, 184/1020 transitions.
Support contains 97 out of 146 places after structural reductions.
[2023-03-17 09:56:03] [INFO ] Flatten gal took : 110 ms
[2023-03-17 09:56:03] [INFO ] Flatten gal took : 53 ms
[2023-03-17 09:56:04] [INFO ] Input system was already deterministic with 184 transitions.
Support contains 92 out of 146 places (down from 97) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 825 ms. (steps per millisecond=12 ) properties (out of 59) seen :42
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 17) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 16) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 14) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 12) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 11) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 5) seen :1
Running SMT prover for 4 properties.
[2023-03-17 09:56:05] [INFO ] Invariant cache hit.
[2023-03-17 09:56:05] [INFO ] [Real]Absence check using 54 positive place invariants in 30 ms returned sat
[2023-03-17 09:56:05] [INFO ] After 127ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:3
[2023-03-17 09:56:05] [INFO ] [Nat]Absence check using 54 positive place invariants in 32 ms returned sat
[2023-03-17 09:56:05] [INFO ] After 101ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 13 simplifications.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 40 ms
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 42 ms
[2023-03-17 09:56:05] [INFO ] Input system was already deterministic with 184 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 37 places :
Symmetric choice reduction at 0 with 37 rule applications. Total rules 37 place count 109 transition count 147
Iterating global reduction 0 with 37 rules applied. Total rules applied 74 place count 109 transition count 147
Ensure Unique test removed 37 transitions
Reduce isomorphic transitions removed 37 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 111 place count 109 transition count 110
Applied a total of 111 rules in 9 ms. Remains 109 /146 variables (removed 37) and now considering 110/184 (removed 74) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 109/146 places, 110/184 transitions.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 18 ms
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 17 ms
[2023-03-17 09:56:05] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 36 places :
Symmetric choice reduction at 0 with 36 rule applications. Total rules 36 place count 110 transition count 148
Iterating global reduction 0 with 36 rules applied. Total rules applied 72 place count 110 transition count 148
Ensure Unique test removed 36 transitions
Reduce isomorphic transitions removed 36 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 108 place count 110 transition count 112
Applied a total of 108 rules in 12 ms. Remains 110 /146 variables (removed 36) and now considering 112/184 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 110/146 places, 112/184 transitions.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 14 ms
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 14 ms
[2023-03-17 09:56:05] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 112 transition count 150
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 112 transition count 150
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 102 place count 112 transition count 116
Applied a total of 102 rules in 12 ms. Remains 112 /146 variables (removed 34) and now considering 116/184 (removed 68) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 112/146 places, 116/184 transitions.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 15 ms
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 15 ms
[2023-03-17 09:56:05] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 112 transition count 150
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 112 transition count 150
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 102 place count 112 transition count 116
Applied a total of 102 rules in 30 ms. Remains 112 /146 variables (removed 34) and now considering 116/184 (removed 68) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 112/146 places, 116/184 transitions.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:56:05] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 36 places :
Symmetric choice reduction at 0 with 36 rule applications. Total rules 36 place count 110 transition count 148
Iterating global reduction 0 with 36 rules applied. Total rules applied 72 place count 110 transition count 148
Ensure Unique test removed 36 transitions
Reduce isomorphic transitions removed 36 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 108 place count 110 transition count 112
Applied a total of 108 rules in 7 ms. Remains 110 /146 variables (removed 36) and now considering 112/184 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 110/146 places, 112/184 transitions.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:56:05] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 112 transition count 150
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 112 transition count 150
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 102 place count 112 transition count 116
Applied a total of 102 rules in 6 ms. Remains 112 /146 variables (removed 34) and now considering 116/184 (removed 68) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 112/146 places, 116/184 transitions.
[2023-03-17 09:56:05] [INFO ] Flatten gal took : 15 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 35 places :
Symmetric choice reduction at 0 with 35 rule applications. Total rules 35 place count 111 transition count 149
Iterating global reduction 0 with 35 rules applied. Total rules applied 70 place count 111 transition count 149
Ensure Unique test removed 35 transitions
Reduce isomorphic transitions removed 35 transitions.
Iterating post reduction 0 with 35 rules applied. Total rules applied 105 place count 111 transition count 114
Applied a total of 105 rules in 23 ms. Remains 111 /146 variables (removed 35) and now considering 114/184 (removed 70) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 111/146 places, 114/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 115 transition count 153
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 115 transition count 153
Ensure Unique test removed 31 transitions
Reduce isomorphic transitions removed 31 transitions.
Iterating post reduction 0 with 31 rules applied. Total rules applied 93 place count 115 transition count 122
Applied a total of 93 rules in 8 ms. Remains 115 /146 variables (removed 31) and now considering 122/184 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 115/146 places, 122/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 122 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 112 transition count 150
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 112 transition count 150
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 102 place count 112 transition count 116
Applied a total of 102 rules in 23 ms. Remains 112 /146 variables (removed 34) and now considering 116/184 (removed 68) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 112/146 places, 116/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 37 places :
Symmetric choice reduction at 0 with 37 rule applications. Total rules 37 place count 109 transition count 147
Iterating global reduction 0 with 37 rules applied. Total rules applied 74 place count 109 transition count 147
Ensure Unique test removed 37 transitions
Reduce isomorphic transitions removed 37 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 111 place count 109 transition count 110
Applied a total of 111 rules in 8 ms. Remains 109 /146 variables (removed 37) and now considering 110/184 (removed 74) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 109/146 places, 110/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 37 places :
Symmetric choice reduction at 0 with 37 rule applications. Total rules 37 place count 109 transition count 147
Iterating global reduction 0 with 37 rules applied. Total rules applied 74 place count 109 transition count 147
Ensure Unique test removed 37 transitions
Reduce isomorphic transitions removed 37 transitions.
Iterating post reduction 0 with 37 rules applied. Total rules applied 111 place count 109 transition count 110
Applied a total of 111 rules in 8 ms. Remains 109 /146 variables (removed 37) and now considering 110/184 (removed 74) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 109/146 places, 110/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 31 place count 115 transition count 153
Iterating global reduction 0 with 31 rules applied. Total rules applied 62 place count 115 transition count 153
Ensure Unique test removed 31 transitions
Reduce isomorphic transitions removed 31 transitions.
Iterating post reduction 0 with 31 rules applied. Total rules applied 93 place count 115 transition count 122
Applied a total of 93 rules in 6 ms. Remains 115 /146 variables (removed 31) and now considering 122/184 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 115/146 places, 122/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 14 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 122 transitions.
Starting structural reductions in LTL mode, iteration 0 : 146/146 places, 184/184 transitions.
Discarding 34 places :
Symmetric choice reduction at 0 with 34 rule applications. Total rules 34 place count 112 transition count 150
Iterating global reduction 0 with 34 rules applied. Total rules applied 68 place count 112 transition count 150
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 0 with 34 rules applied. Total rules applied 102 place count 112 transition count 116
Applied a total of 102 rules in 6 ms. Remains 112 /146 variables (removed 34) and now considering 116/184 (removed 68) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 112/146 places, 116/184 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 12 ms
[2023-03-17 09:56:06] [INFO ] Input system was already deterministic with 116 transitions.
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 19 ms
[2023-03-17 09:56:06] [INFO ] Flatten gal took : 21 ms
[2023-03-17 09:56:06] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 9 ms.
[2023-03-17 09:56:06] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 146 places, 184 transitions and 1932 arcs took 3 ms.
Total runtime 8072 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/476/ctl_0_ --ctl=/tmp/476/ctl_1_ --ctl=/tmp/476/ctl_2_ --ctl=/tmp/476/ctl_3_ --ctl=/tmp/476/ctl_4_ --ctl=/tmp/476/ctl_5_ --ctl=/tmp/476/ctl_6_ --ctl=/tmp/476/ctl_7_ --ctl=/tmp/476/ctl_8_ --ctl=/tmp/476/ctl_9_ --ctl=/tmp/476/ctl_10_ --ctl=/tmp/476/ctl_11_ --ctl=/tmp/476/ctl_12_ --mu-par --mu-opt
FORMULA RwMutex-PT-r0010w0500-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0500-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
BK_STOP 1679047050613
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-01
ctl formula formula --ctl=/tmp/476/ctl_0_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-02
ctl formula formula --ctl=/tmp/476/ctl_1_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-03
ctl formula formula --ctl=/tmp/476/ctl_2_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-04
ctl formula formula --ctl=/tmp/476/ctl_3_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-05
ctl formula formula --ctl=/tmp/476/ctl_4_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-06
ctl formula formula --ctl=/tmp/476/ctl_5_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-07
ctl formula formula --ctl=/tmp/476/ctl_6_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-08
ctl formula formula --ctl=/tmp/476/ctl_7_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-09
ctl formula formula --ctl=/tmp/476/ctl_8_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-10
ctl formula formula --ctl=/tmp/476/ctl_9_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-12
ctl formula formula --ctl=/tmp/476/ctl_10_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-14
ctl formula formula --ctl=/tmp/476/ctl_11_
ctl formula name RwMutex-PT-r0010w0500-CTLFireability-15
ctl formula formula --ctl=/tmp/476/ctl_12_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 146 places, 184 transitions and 1932 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 184->92 groups
pnml2lts-sym: Regrouping took 0.050 real 0.050 user 0.000 sys
pnml2lts-sym: state vector length is 146; there are 92 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 92603 group checks and 0 next state calls
pnml2lts-sym: reachability took 3.130 real 12.490 user 0.030 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.010 real 0.030 user 0.000 sys
pnml2lts-sym: state space has 1106 states, 111286 nodes
pnml2lts-sym: Formula /tmp/476/ctl_1_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_2_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_0_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_4_ holds for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_3_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_12_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_11_ holds for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_10_ holds for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_6_ holds for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_9_ holds for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_8_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_7_ holds for the initial state
pnml2lts-sym: Formula /tmp/476/ctl_5_ does not hold for the initial state
pnml2lts-sym: group_next: 4048 nodes total
pnml2lts-sym: group_explored: 2761 nodes, 84080 short vectors total
pnml2lts-sym: max token count: 1
free(): invalid pointer
free(): invalid pointer
*** segmentation fault ***
Please send information on how to reproduce this problem to:
ltsmin-support@lists.utwente.nl
along with all output preceding this message.
In addition, include the following information:
Package: ltsmin 3.1.0
Stack trace:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0500"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0010w0500, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891810900138"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0500.tgz
mv RwMutex-PT-r0010w0500 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;