Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r361-smll-167891810900122.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is RwMutex-PT-r0010w0050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891810900122
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 5.3K Feb 25 22:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 25 22:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 25 22:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 22:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 22:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 25 22:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Feb 25 22:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 22:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 95K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0010w0050-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679046658262

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w0050
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-17 09:51:00] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 09:51:00] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 09:51:00] [INFO ] Load time of PNML (sax parser for PT used): 100 ms
[2023-03-17 09:51:00] [INFO ] Transformed 130 places.
[2023-03-17 09:51:00] [INFO ] Transformed 120 transitions.
[2023-03-17 09:51:01] [INFO ] Found NUPN structural information;
[2023-03-17 09:51:01] [INFO ] Parsed PT model containing 130 places and 120 transitions and 1260 arcs in 264 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
Initial state reduction rules removed 1 formulas.
FORMULA RwMutex-PT-r0010w0050-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 75 out of 130 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 130/130 places, 120/120 transitions.
Applied a total of 0 rules in 22 ms. Remains 130 /130 variables (removed 0) and now considering 120/120 (removed 0) transitions.
// Phase 1: matrix 120 rows 130 cols
[2023-03-17 09:51:01] [INFO ] Computed 70 place invariants in 35 ms
[2023-03-17 09:51:01] [INFO ] Implicit Places using invariants in 414 ms returned [1, 23, 34, 37, 38, 39, 42, 44, 45, 51, 52, 54, 55, 57, 62, 67, 69, 72, 76, 78, 81, 85, 86, 88, 108]
Discarding 25 places :
Implicit Place search using SMT only with invariants took 463 ms to find 25 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 105/130 places, 120/120 transitions.
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 11 place count 94 transition count 109
Iterating global reduction 0 with 11 rules applied. Total rules applied 22 place count 94 transition count 109
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 33 place count 94 transition count 98
Applied a total of 33 rules in 13 ms. Remains 94 /105 variables (removed 11) and now considering 98/120 (removed 22) transitions.
// Phase 1: matrix 98 rows 94 cols
[2023-03-17 09:51:01] [INFO ] Computed 45 place invariants in 6 ms
[2023-03-17 09:51:01] [INFO ] Implicit Places using invariants in 87 ms returned []
[2023-03-17 09:51:01] [INFO ] Invariant cache hit.
[2023-03-17 09:51:01] [INFO ] Implicit Places using invariants and state equation in 182 ms returned []
Implicit Place search using SMT with State Equation took 273 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 94/130 places, 98/120 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 772 ms. Remains : 94/130 places, 98/120 transitions.
Support contains 75 out of 94 places after structural reductions.
[2023-03-17 09:51:02] [INFO ] Flatten gal took : 73 ms
[2023-03-17 09:51:02] [INFO ] Flatten gal took : 35 ms
[2023-03-17 09:51:02] [INFO ] Input system was already deterministic with 98 transitions.
Support contains 74 out of 94 places (down from 75) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 765 ms. (steps per millisecond=13 ) properties (out of 61) seen :54
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 7) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-17 09:51:03] [INFO ] Invariant cache hit.
[2023-03-17 09:51:03] [INFO ] [Real]Absence check using 45 positive place invariants in 24 ms returned sat
[2023-03-17 09:51:03] [INFO ] After 182ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 5 atomic propositions for a total of 15 simplifications.
[2023-03-17 09:51:03] [INFO ] Flatten gal took : 30 ms
[2023-03-17 09:51:03] [INFO ] Flatten gal took : 28 ms
[2023-03-17 09:51:03] [INFO ] Input system was already deterministic with 98 transitions.
Support contains 59 out of 94 places (down from 61) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 13 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:03] [INFO ] Flatten gal took : 17 ms
[2023-03-17 09:51:03] [INFO ] Flatten gal took : 18 ms
[2023-03-17 09:51:03] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 86 transition count 90
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 86 transition count 90
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 24 place count 86 transition count 82
Applied a total of 24 rules in 26 ms. Remains 86 /94 variables (removed 8) and now considering 82/98 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 86/94 places, 82/98 transitions.
[2023-03-17 09:51:03] [INFO ] Flatten gal took : 17 ms
[2023-03-17 09:51:03] [INFO ] Flatten gal took : 16 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 10 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 14 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 16 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 87 transition count 91
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 87 transition count 91
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 21 place count 87 transition count 84
Applied a total of 21 rules in 13 ms. Remains 87 /94 variables (removed 7) and now considering 84/98 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 87/94 places, 84/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 20 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 5 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 5 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Graph (trivial) has 8 edges and 94 vertex of which 8 / 94 are part of one of the 4 SCC in 3 ms
Free SCC test removed 4 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 44 transitions
Trivial Post-agglo rules discarded 44 transitions
Performed 44 trivial Post agglomeration. Transition count delta: 44
Iterating post reduction 0 with 44 rules applied. Total rules applied 45 place count 90 transition count 50
Reduce places removed 78 places and 0 transitions.
Ensure Unique test removed 37 transitions
Reduce isomorphic transitions removed 37 transitions.
Iterating post reduction 1 with 115 rules applied. Total rules applied 160 place count 12 transition count 13
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 161 place count 12 transition count 12
Applied a total of 161 rules in 16 ms. Remains 12 /94 variables (removed 82) and now considering 12/98 (removed 86) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 12/94 places, 12/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 2 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=0 )
FORMULA RwMutex-PT-r0010w0050-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 86 transition count 90
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 86 transition count 90
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 24 place count 86 transition count 82
Applied a total of 24 rules in 5 ms. Remains 86 /94 variables (removed 8) and now considering 82/98 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 86/94 places, 82/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Graph (trivial) has 8 edges and 94 vertex of which 8 / 94 are part of one of the 4 SCC in 0 ms
Free SCC test removed 4 places
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Drop transitions removed 43 transitions
Trivial Post-agglo rules discarded 43 transitions
Performed 43 trivial Post agglomeration. Transition count delta: 43
Iterating post reduction 0 with 43 rules applied. Total rules applied 44 place count 90 transition count 51
Reduce places removed 77 places and 0 transitions.
Ensure Unique test removed 36 transitions
Reduce isomorphic transitions removed 36 transitions.
Iterating post reduction 1 with 113 rules applied. Total rules applied 157 place count 13 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 158 place count 13 transition count 14
Applied a total of 158 rules in 7 ms. Remains 13 /94 variables (removed 81) and now considering 14/98 (removed 84) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 13/94 places, 14/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 87 transition count 91
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 87 transition count 91
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 21 place count 87 transition count 84
Applied a total of 21 rules in 4 ms. Remains 87 /94 variables (removed 7) and now considering 84/98 (removed 14) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 87/94 places, 84/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 18 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 84 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 86 transition count 90
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 86 transition count 90
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 24 place count 86 transition count 82
Applied a total of 24 rules in 15 ms. Remains 86 /94 variables (removed 8) and now considering 82/98 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 86/94 places, 82/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 3 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 3 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 85 transition count 89
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 85 transition count 89
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 27 place count 85 transition count 80
Applied a total of 27 rules in 4 ms. Remains 85 /94 variables (removed 9) and now considering 80/98 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 85/94 places, 80/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 94/94 places, 98/98 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 86 transition count 90
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 86 transition count 90
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 24 place count 86 transition count 82
Applied a total of 24 rules in 3 ms. Remains 86 /94 variables (removed 8) and now considering 82/98 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 86/94 places, 82/98 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 17 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 20 ms
[2023-03-17 09:51:04] [INFO ] Input system was already deterministic with 82 transitions.
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:51:04] [INFO ] Flatten gal took : 13 ms
[2023-03-17 09:51:04] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 9 ms.
[2023-03-17 09:51:04] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 94 places, 98 transitions and 968 arcs took 2 ms.
Total runtime 4121 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/462/ctl_0_ --ctl=/tmp/462/ctl_1_ --ctl=/tmp/462/ctl_2_ --ctl=/tmp/462/ctl_3_ --ctl=/tmp/462/ctl_4_ --ctl=/tmp/462/ctl_5_ --ctl=/tmp/462/ctl_6_ --ctl=/tmp/462/ctl_7_ --ctl=/tmp/462/ctl_8_ --ctl=/tmp/462/ctl_9_ --ctl=/tmp/462/ctl_10_ --ctl=/tmp/462/ctl_11_ --ctl=/tmp/462/ctl_12_ --ctl=/tmp/462/ctl_13_ --mu-par --mu-opt
FORMULA RwMutex-PT-r0010w0050-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0050-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1679046667552

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-00
ctl formula formula --ctl=/tmp/462/ctl_0_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-01
ctl formula formula --ctl=/tmp/462/ctl_1_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-02
ctl formula formula --ctl=/tmp/462/ctl_2_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-03
ctl formula formula --ctl=/tmp/462/ctl_3_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-04
ctl formula formula --ctl=/tmp/462/ctl_4_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-05
ctl formula formula --ctl=/tmp/462/ctl_5_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-07
ctl formula formula --ctl=/tmp/462/ctl_6_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-09
ctl formula formula --ctl=/tmp/462/ctl_7_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-10
ctl formula formula --ctl=/tmp/462/ctl_8_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-11
ctl formula formula --ctl=/tmp/462/ctl_9_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-12
ctl formula formula --ctl=/tmp/462/ctl_10_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-13
ctl formula formula --ctl=/tmp/462/ctl_11_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-14
ctl formula formula --ctl=/tmp/462/ctl_12_
ctl formula name RwMutex-PT-r0010w0050-CTLFireability-15
ctl formula formula --ctl=/tmp/462/ctl_13_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 94 places, 98 transitions and 968 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 98->49 groups
pnml2lts-sym: Regrouping took 0.020 real 0.030 user 0.000 sys
pnml2lts-sym: state vector length is 94; there are 49 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 15794 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.480 real 1.900 user 0.030 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: state space has 1063 states, 32142 nodes
pnml2lts-sym: Formula /tmp/462/ctl_2_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_1_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_0_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_13_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_5_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_4_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_7_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_8_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_9_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_10_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_6_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_12_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_3_ holds for the initial state
pnml2lts-sym: Formula /tmp/462/ctl_11_ holds for the initial state
pnml2lts-sym: group_next: 2034 nodes total
pnml2lts-sym: group_explored: 1367 nodes, 40005 short vectors total
pnml2lts-sym: max token count: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0010w0050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891810900122"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0050.tgz
mv RwMutex-PT-r0010w0050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;