fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r361-smll-167891810900114
Last Updated
May 14, 2023

About the Execution of LTSMin+red for RwMutex-PT-r0010w0020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
275.928 7804.00 17224.00 472.40 TFTFFFTTFTTFTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r361-smll-167891810900114.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is RwMutex-PT-r0010w0020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891810900114
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 7.7K Feb 25 22:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 25 22:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 22:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 25 22:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 22:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Feb 25 22:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.9K Feb 25 22:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Feb 25 22:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 44K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0010w0020-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679046517927

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w0020
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-17 09:48:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 09:48:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 09:48:40] [INFO ] Load time of PNML (sax parser for PT used): 87 ms
[2023-03-17 09:48:40] [INFO ] Transformed 70 places.
[2023-03-17 09:48:40] [INFO ] Transformed 60 transitions.
[2023-03-17 09:48:40] [INFO ] Found NUPN structural information;
[2023-03-17 09:48:40] [INFO ] Parsed PT model containing 70 places and 60 transitions and 540 arcs in 385 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 17 ms.
Support contains 60 out of 70 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 60/60 transitions.
Applied a total of 0 rules in 19 ms. Remains 70 /70 variables (removed 0) and now considering 60/60 (removed 0) transitions.
// Phase 1: matrix 60 rows 70 cols
[2023-03-17 09:48:40] [INFO ] Computed 40 place invariants in 12 ms
[2023-03-17 09:48:41] [INFO ] Implicit Places using invariants in 272 ms returned [4, 68]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 315 ms to find 2 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 68/70 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 338 ms. Remains : 68/70 places, 60/60 transitions.
Support contains 60 out of 68 places after structural reductions.
[2023-03-17 09:48:41] [INFO ] Flatten gal took : 56 ms
[2023-03-17 09:48:41] [INFO ] Flatten gal took : 23 ms
[2023-03-17 09:48:41] [INFO ] Input system was already deterministic with 60 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 699 ms. (steps per millisecond=14 ) properties (out of 61) seen :49
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 12) seen :3
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 60 rows 68 cols
[2023-03-17 09:48:42] [INFO ] Computed 38 place invariants in 3 ms
[2023-03-17 09:48:42] [INFO ] [Real]Absence check using 38 positive place invariants in 16 ms returned sat
[2023-03-17 09:48:42] [INFO ] After 163ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
[2023-03-17 09:48:42] [INFO ] Flatten gal took : 16 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 16 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Support contains 56 out of 68 places (down from 57) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 6 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 4 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 10 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 4 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 11 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 9 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 6 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 8 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Drop transitions removed 27 transitions
Trivial Post-agglo rules discarded 27 transitions
Performed 27 trivial Post agglomeration. Transition count delta: 27
Iterating post reduction 0 with 27 rules applied. Total rules applied 27 place count 68 transition count 33
Reduce places removed 53 places and 0 transitions.
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 1 with 71 rules applied. Total rules applied 98 place count 15 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 99 place count 15 transition count 14
Applied a total of 99 rules in 12 ms. Remains 15 /68 variables (removed 53) and now considering 14/60 (removed 46) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 15/68 places, 14/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 1 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 1 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 6 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 14 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 6 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 6 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 6 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 68/68 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 68 /68 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/68 places, 60/60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 6 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 7 ms
[2023-03-17 09:48:43] [INFO ] Input system was already deterministic with 60 transitions.
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 8 ms
[2023-03-17 09:48:43] [INFO ] Flatten gal took : 8 ms
[2023-03-17 09:48:43] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-17 09:48:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 68 places, 60 transitions and 536 arcs took 1 ms.
Total runtime 3403 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/459/ctl_0_ --ctl=/tmp/459/ctl_1_ --ctl=/tmp/459/ctl_2_ --ctl=/tmp/459/ctl_3_ --ctl=/tmp/459/ctl_4_ --ctl=/tmp/459/ctl_5_ --ctl=/tmp/459/ctl_6_ --ctl=/tmp/459/ctl_7_ --ctl=/tmp/459/ctl_8_ --ctl=/tmp/459/ctl_9_ --ctl=/tmp/459/ctl_10_ --ctl=/tmp/459/ctl_11_ --ctl=/tmp/459/ctl_12_ --ctl=/tmp/459/ctl_13_ --ctl=/tmp/459/ctl_14_ --ctl=/tmp/459/ctl_15_ --mu-par --mu-opt
FORMULA RwMutex-PT-r0010w0020-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA RwMutex-PT-r0010w0020-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1679046525731

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-00
ctl formula formula --ctl=/tmp/459/ctl_0_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-01
ctl formula formula --ctl=/tmp/459/ctl_1_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-02
ctl formula formula --ctl=/tmp/459/ctl_2_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-03
ctl formula formula --ctl=/tmp/459/ctl_3_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-04
ctl formula formula --ctl=/tmp/459/ctl_4_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-05
ctl formula formula --ctl=/tmp/459/ctl_5_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-06
ctl formula formula --ctl=/tmp/459/ctl_6_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-07
ctl formula formula --ctl=/tmp/459/ctl_7_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-08
ctl formula formula --ctl=/tmp/459/ctl_8_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-09
ctl formula formula --ctl=/tmp/459/ctl_9_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-10
ctl formula formula --ctl=/tmp/459/ctl_10_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-11
ctl formula formula --ctl=/tmp/459/ctl_11_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-12
ctl formula formula --ctl=/tmp/459/ctl_12_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-13
ctl formula formula --ctl=/tmp/459/ctl_13_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-14
ctl formula formula --ctl=/tmp/459/ctl_14_
ctl formula name RwMutex-PT-r0010w0020-CTLFireability-15
ctl formula formula --ctl=/tmp/459/ctl_15_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 68 places, 60 transitions and 536 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 60->30 groups
pnml2lts-sym: Regrouping took 0.020 real 0.010 user 0.010 sys
pnml2lts-sym: state vector length is 68; there are 30 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 10329 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.250 real 0.930 user 0.060 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.010 user 0.000 sys
pnml2lts-sym: state space has 1044 states, 21615 nodes
pnml2lts-sym: Formula /tmp/459/ctl_2_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_4_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_5_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_6_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_8_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_10_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_15_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_12_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_13_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_9_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_7_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_11_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_1_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_0_ holds for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_3_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/459/ctl_14_ holds for the initial state
pnml2lts-sym: group_next: 1132 nodes total
pnml2lts-sym: group_explored: 746 nodes, 20530 short vectors total
pnml2lts-sym: max token count: 1
*** segmentation fault ***

Please send information on how to reproduce this problem to:
ltsmin-support@lists.utwente.nl
along with all output preceding this message.
In addition, include the following information:
Package: ltsmin 3.1.0
Stack trace:
*** segmentation fault ***

Please send information on how to reproduce this problem to:
ltsmin-support@lists.utwente.nl
along with all output preceding this message.
In addition, include the following information:
Package: ltsmin 3.1.0
Stack trace:
0: pnml2lts-sym(+0x9b684) [0x55f0a8783684]
1: pnml2lts-sym(+0x9b726) [0x55f0a8783726]
2: /lib/x86_64-linux-gnu/libpthread.so.0(+0x13140) [0x7fc4428ff140]
3: /lib/x86_64-linux-gnu/libc.so.6(+0x87870) [0x7fc44263f870]
4: /lib/x86_64-linux-gnu/libpthread.so.0(+0x7ebf) [0x7fc4428f3ebf]
5: /lib/x86_64-linux-gnu/libc.so.6(clone+0x3f) [0x7fc4426b4a2f]

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is RwMutex-PT-r0010w0020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891810900114"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0020.tgz
mv RwMutex-PT-r0010w0020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;