About the Execution of LoLa+red for SharedMemory-PT-000050
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
9854.695 | 3600000.00 | 10373232.00 | 6382.30 | FFFF?FFFT??F?TTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891809400681.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SharedMemory-PT-000050, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891809400681
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 41M
-rw-r--r-- 1 mcc users 685K Feb 25 16:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 2.6M Feb 25 16:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 1.6M Feb 25 15:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 6.1M Feb 25 15:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 665K Feb 25 16:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.8M Feb 25 16:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 480K Feb 25 16:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.4M Feb 25 16:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.5M Feb 25 18:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.7M Feb 25 18:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3M Feb 25 17:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13M Feb 25 17:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 2.6M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-00
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-01
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-02
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-03
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-04
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-05
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-06
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-07
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-08
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-09
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-10
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-11
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-12
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-13
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-14
FORMULA_NAME SharedMemory-PT-000050-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1679277375205
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-PT-000050
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 01:56:18] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-20 01:56:18] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 01:56:18] [INFO ] Load time of PNML (sax parser for PT used): 381 ms
[2023-03-20 01:56:18] [INFO ] Transformed 2651 places.
[2023-03-20 01:56:18] [INFO ] Transformed 5050 transitions.
[2023-03-20 01:56:18] [INFO ] Found NUPN structural information;
[2023-03-20 01:56:18] [INFO ] Completing missing partition info from NUPN : creating a component with [Ext_Mem_Acc_8_2, Ext_Mem_Acc_7_2, Ext_Mem_Acc_20_3, Ext_Mem_Acc_19_3, Ext_Mem_Acc_24_4, Ext_Mem_Acc_15_4, Ext_Mem_Acc_13_5, Ext_Mem_Acc_14_5, Ext_Mem_Acc_17_6, Ext_Mem_Acc_14_6, Ext_Mem_Acc_2_8, Ext_Mem_Acc_1_8, Ext_Mem_Acc_16_9, Ext_Mem_Acc_21_9, Ext_Mem_Acc_26_9, Ext_Mem_Acc_25_9, Ext_Mem_Acc_6_11, Ext_Mem_Acc_7_11, Ext_Mem_Acc_27_11, Ext_Mem_Acc_28_11, Ext_Mem_Acc_40_13, Ext_Mem_Acc_39_13, Ext_Mem_Acc_39_14, Ext_Mem_Acc_38_14, Ext_Mem_Acc_20_14, Ext_Mem_Acc_21_14, Ext_Mem_Acc_43_15, Ext_Mem_Acc_44_15, Ext_Mem_Acc_49_16, Ext_Mem_Acc_48_16, Ext_Mem_Acc_40_18, Ext_Mem_Acc_41_18, Ext_Mem_Acc_13_20, Ext_Mem_Acc_14_20, Ext_Mem_Acc_37_21, Ext_Mem_Acc_38_21, Ext_Mem_Acc_41_20, Ext_Mem_Acc_40_20, Ext_Mem_Acc_45_23, Ext_Mem_Acc_46_23, Ext_Mem_Acc_16_22, Ext_Mem_Acc_15_22, Ext_Mem_Acc_11_26, Ext_Mem_Acc_12_26, Ext_Mem_Acc_31_24, Ext_Mem_Acc_30_24, Ext_Mem_Acc_31_25, Ext_Mem_Acc_32_25, Ext_Mem_Acc_21_29, Ext_Mem_Acc_20_29, Ext_Mem_Acc_13_28, Ext_Mem_Acc_16_28, Ext_Mem_Acc_15_31, Ext_Mem_Acc_14_31, Ext_Mem_Acc_16_30, Ext_Mem_Acc_13_30, Ext_Mem_Acc_24_34, Ext_Mem_Acc_21_34, Ext_Mem_Acc_9_34, Ext_Mem_Acc_12_34, Ext_Mem_Acc_20_32, Ext_Mem_Acc_21_32, Ext_Mem_Acc_25_37, Ext_Mem_Acc_22_37, Ext_Mem_Acc_2_36, Ext_Mem_Acc_49_35, Ext_Mem_Acc_6_40, Ext_Mem_Acc_5_40, Ext_Mem_Acc_42_38, Ext_Mem_Acc_43_38, Ext_Mem_Acc_44_37, Ext_Mem_Acc_43_37, Ext_Mem_Acc_38_41, Ext_Mem_Acc_39_41, Ext_Mem_Acc_43_40, Ext_Mem_Acc_42_40, Ext_Mem_Acc_36_45, Ext_Mem_Acc_37_45, Ext_Mem_Acc_6_46, Ext_Mem_Acc_5_46, Ext_Mem_Acc_29_47, Ext_Mem_Acc_28_47, Ext_Mem_Acc_41_43, Ext_Mem_Acc_40_43, Ext_Mem_Acc_17_44, Ext_Mem_Acc_18_44, Ext_Mem_Acc_34_50, Ext_Mem_Acc_33_50, Ext_Mem_Acc_44_48, Ext_Mem_Acc_45_48, Ext_Mem_Acc_2_50, Ext_Mem_Acc_3_50]
[2023-03-20 01:56:18] [INFO ] Parsed PT model containing 2651 places and 5050 transitions and 20000 arcs in 540 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 451 ms.
FORMULA SharedMemory-PT-000050-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 2651 out of 2651 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 63 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
// Phase 1: matrix 5050 rows 2651 cols
[2023-03-20 01:56:20] [INFO ] Computed 101 place invariants in 411 ms
[2023-03-20 01:56:21] [INFO ] Implicit Places using invariants in 1589 ms returned []
[2023-03-20 01:56:21] [INFO ] Invariant cache hit.
[2023-03-20 01:56:22] [INFO ] Implicit Places using invariants and state equation in 675 ms returned []
Implicit Place search using SMT with State Equation took 2312 ms to find 0 implicit places.
[2023-03-20 01:56:22] [INFO ] Invariant cache hit.
[2023-03-20 01:56:28] [INFO ] Dead Transitions using invariants and state equation in 6341 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8734 ms. Remains : 2651/2651 places, 5050/5050 transitions.
Support contains 2651 out of 2651 places after structural reductions.
[2023-03-20 01:56:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-20 01:56:29] [INFO ] Flatten gal took : 609 ms
[2023-03-20 01:56:29] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
FORMULA SharedMemory-PT-000050-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 01:56:30] [INFO ] Flatten gal took : 247 ms
[2023-03-20 01:56:30] [INFO ] Input system was already deterministic with 5050 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 6242 ms. (steps per millisecond=1 ) properties (out of 55) seen :27
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=15 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=16 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=16 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 28) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 27) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Running SMT prover for 26 properties.
[2023-03-20 01:56:37] [INFO ] Invariant cache hit.
[2023-03-20 01:56:41] [INFO ] [Real]Absence check using 101 positive place invariants in 122 ms returned sat
[2023-03-20 01:56:46] [INFO ] After 4761ms SMT Verify possible using state equation in real domain returned unsat :17 sat :3 real:6
[2023-03-20 01:56:47] [INFO ] After 5972ms SMT Verify possible using trap constraints in real domain returned unsat :17 sat :0 real:9
[2023-03-20 01:56:47] [INFO ] After 8351ms SMT Verify possible using all constraints in real domain returned unsat :17 sat :0 real:9
[2023-03-20 01:56:49] [INFO ] [Nat]Absence check using 101 positive place invariants in 136 ms returned sat
[2023-03-20 01:56:54] [INFO ] After 4773ms SMT Verify possible using state equation in natural domain returned unsat :18 sat :8
[2023-03-20 01:56:57] [INFO ] After 7553ms SMT Verify possible using trap constraints in natural domain returned unsat :18 sat :8
Attempting to minimize the solution found.
Minimization took 1224 ms.
[2023-03-20 01:56:58] [INFO ] After 10659ms SMT Verify possible using all constraints in natural domain returned unsat :18 sat :8
Fused 26 Parikh solutions to 8 different solutions.
Finished Parikh walk after 2 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2 )
Parikh walk visited 8 properties in 49 ms.
Successfully simplified 18 atomic propositions for a total of 12 simplifications.
FORMULA SharedMemory-PT-000050-CTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 01:56:58] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-20 01:56:58] [INFO ] Flatten gal took : 303 ms
FORMULA SharedMemory-PT-000050-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 01:56:59] [INFO ] Flatten gal took : 233 ms
[2023-03-20 01:56:59] [INFO ] Input system was already deterministic with 5050 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 59 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:00] [INFO ] Flatten gal took : 177 ms
[2023-03-20 01:57:00] [INFO ] Flatten gal took : 172 ms
[2023-03-20 01:57:00] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 951 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 954 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:01] [INFO ] Flatten gal took : 157 ms
[2023-03-20 01:57:01] [INFO ] Flatten gal took : 174 ms
[2023-03-20 01:57:02] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 542 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 546 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:02] [INFO ] Flatten gal took : 164 ms
[2023-03-20 01:57:03] [INFO ] Flatten gal took : 176 ms
[2023-03-20 01:57:03] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 486 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 489 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:04] [INFO ] Flatten gal took : 138 ms
[2023-03-20 01:57:04] [INFO ] Flatten gal took : 154 ms
[2023-03-20 01:57:04] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 269 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 271 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:05] [INFO ] Flatten gal took : 142 ms
[2023-03-20 01:57:05] [INFO ] Flatten gal took : 164 ms
[2023-03-20 01:57:05] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 216 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 220 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:05] [INFO ] Flatten gal took : 142 ms
[2023-03-20 01:57:06] [INFO ] Flatten gal took : 156 ms
[2023-03-20 01:57:06] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Drop transitions removed 2445 transitions
Trivial Post-agglo rules discarded 2445 transitions
Performed 2445 trivial Post agglomeration. Transition count delta: 2445
Iterating post reduction 0 with 2445 rules applied. Total rules applied 2445 place count 2651 transition count 2605
Reduce places removed 2490 places and 0 transitions.
Ensure Unique test removed 2155 transitions
Reduce isomorphic transitions removed 2155 transitions.
Graph (trivial) has 145 edges and 161 vertex of which 90 / 161 are part of one of the 45 SCC in 4 ms
Free SCC test removed 45 places
Iterating post reduction 1 with 4646 rules applied. Total rules applied 7091 place count 116 transition count 450
Ensure Unique test removed 45 transitions
Reduce isomorphic transitions removed 45 transitions.
Iterating post reduction 2 with 45 rules applied. Total rules applied 7136 place count 116 transition count 405
Drop transitions removed 240 transitions
Redundant transition composition rules discarded 240 transitions
Iterating global reduction 3 with 240 rules applied. Total rules applied 7376 place count 116 transition count 165
Applied a total of 7376 rules in 99 ms. Remains 116 /2651 variables (removed 2535) and now considering 165/5050 (removed 4885) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 99 ms. Remains : 116/2651 places, 165/5050 transitions.
[2023-03-20 01:57:06] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:57:06] [INFO ] Flatten gal took : 2 ms
[2023-03-20 01:57:06] [INFO ] Input system was already deterministic with 165 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 219 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 219 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:06] [INFO ] Flatten gal took : 144 ms
[2023-03-20 01:57:07] [INFO ] Flatten gal took : 169 ms
[2023-03-20 01:57:07] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 429 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 430 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 01:57:08] [INFO ] Flatten gal took : 145 ms
[2023-03-20 01:57:08] [INFO ] Flatten gal took : 156 ms
[2023-03-20 01:57:08] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Drop transitions removed 2448 transitions
Trivial Post-agglo rules discarded 2448 transitions
Performed 2448 trivial Post agglomeration. Transition count delta: 2448
Iterating post reduction 0 with 2448 rules applied. Total rules applied 2448 place count 2651 transition count 2602
Reduce places removed 2496 places and 0 transitions.
Ensure Unique test removed 2302 transitions
Reduce isomorphic transitions removed 2302 transitions.
Graph (trivial) has 148 edges and 155 vertex of which 96 / 155 are part of one of the 48 SCC in 1 ms
Free SCC test removed 48 places
Iterating post reduction 1 with 4799 rules applied. Total rules applied 7247 place count 107 transition count 300
Ensure Unique test removed 48 transitions
Reduce isomorphic transitions removed 48 transitions.
Iterating post reduction 2 with 48 rules applied. Total rules applied 7295 place count 107 transition count 252
Drop transitions removed 96 transitions
Redundant transition composition rules discarded 96 transitions
Iterating global reduction 3 with 96 rules applied. Total rules applied 7391 place count 107 transition count 156
Applied a total of 7391 rules in 71 ms. Remains 107 /2651 variables (removed 2544) and now considering 156/5050 (removed 4894) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 72 ms. Remains : 107/2651 places, 156/5050 transitions.
[2023-03-20 01:57:08] [INFO ] Flatten gal took : 3 ms
[2023-03-20 01:57:08] [INFO ] Flatten gal took : 2 ms
[2023-03-20 01:57:08] [INFO ] Input system was already deterministic with 156 transitions.
Finished random walk after 261 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=43 )
FORMULA SharedMemory-PT-000050-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2023-03-20 01:57:08] [INFO ] Flatten gal took : 172 ms
[2023-03-20 01:57:09] [INFO ] Flatten gal took : 176 ms
[2023-03-20 01:57:09] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 16 ms.
[2023-03-20 01:57:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2651 places, 5050 transitions and 20000 arcs took 32 ms.
Total runtime 50723 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SharedMemory-PT-000050
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
FORMULA SharedMemory-PT-000050-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000050-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000050-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000050-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000050-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 6248088 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16058340 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 19 (type EXCL) for 18 SharedMemory-PT-000050-CTLCardinality-10
lola: time limit : 398 sec
lola: memory limit: 32 pages
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19 CTL EXCL 1/398 1/32 SharedMemory-PT-000050-CTLCardinality-10 74122 m, 14824 m/sec, 353915 t fired, .
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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16 CTL EXCL 545/571 1/5 SharedMemory-PT-000050-CTLCardinality-09 2769 m, 3 m/sec, 15006 t fired, .
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16 CTL EXCL 555/571 1/5 SharedMemory-PT-000050-CTLCardinality-09 2808 m, 4 m/sec, 15266 t fired, .
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16 CTL EXCL 560/571 1/5 SharedMemory-PT-000050-CTLCardinality-09 2838 m, 6 m/sec, 15454 t fired, .
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16 CTL EXCL 565/571 1/5 SharedMemory-PT-000050-CTLCardinality-09 2865 m, 5 m/sec, 15626 t fired, .
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16 CTL EXCL 570/571 1/5 SharedMemory-PT-000050-CTLCardinality-09 2894 m, 5 m/sec, 15781 t fired, .
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lola: LAUNCH task # 4 (type EXCL) for 3 SharedMemory-PT-000050-CTLCardinality-01
lola: time limit : 569 sec
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lola: LAUNCH task # 16 (type EXCL) for 15 SharedMemory-PT-000050-CTLCardinality-09
lola: time limit : 1138 sec
lola: memory limit: 5 pages
lola: FINISHED task # 4 (type EXCL) for SharedMemory-PT-000050-CTLCardinality-01
lola: result : false
lola: markings : 108
lola: fired transitions : 440
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SharedMemory-PT-000050-CTLCardinality-00: CTL false CTL model checker
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16 CTL EXCL 5/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1 m, -578 m/sec, 1 t fired, .
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16 CTL EXCL 10/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1 m, 0 m/sec, 1 t fired, .
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16 CTL EXCL 15/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 27 m, 5 m/sec, 79 t fired, .
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16 CTL EXCL 20/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 42 m, 3 m/sec, 120 t fired, .
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16 CTL EXCL 25/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 48 m, 1 m/sec, 126 t fired, .
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16 CTL EXCL 30/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 73 m, 5 m/sec, 237 t fired, .
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16 CTL EXCL 35/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 99 m, 5 m/sec, 347 t fired, .
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16 CTL EXCL 40/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 124 m, 5 m/sec, 470 t fired, .
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16 CTL EXCL 45/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 148 m, 4 m/sec, 569 t fired, .
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16 CTL EXCL 50/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 173 m, 5 m/sec, 682 t fired, .
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16 CTL EXCL 55/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 198 m, 5 m/sec, 809 t fired, .
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16 CTL EXCL 60/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 218 m, 4 m/sec, 911 t fired, .
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16 CTL EXCL 65/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 242 m, 4 m/sec, 1057 t fired, .
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16 CTL EXCL 70/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 266 m, 4 m/sec, 1154 t fired, .
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16 CTL EXCL 75/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 291 m, 5 m/sec, 1274 t fired, .
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16 CTL EXCL 80/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 315 m, 4 m/sec, 1391 t fired, .
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16 CTL EXCL 85/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 337 m, 4 m/sec, 1499 t fired, .
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16 CTL EXCL 90/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 359 m, 4 m/sec, 1631 t fired, .
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16 CTL EXCL 95/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 384 m, 5 m/sec, 1757 t fired, .
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16 CTL EXCL 100/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 405 m, 4 m/sec, 1857 t fired, .
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16 CTL EXCL 105/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 428 m, 4 m/sec, 2000 t fired, .
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16 CTL EXCL 110/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 447 m, 3 m/sec, 2089 t fired, .
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16 CTL EXCL 115/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 468 m, 4 m/sec, 2201 t fired, .
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16 CTL EXCL 120/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 490 m, 4 m/sec, 2332 t fired, .
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16 CTL EXCL 125/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 512 m, 4 m/sec, 2461 t fired, .
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16 CTL EXCL 295/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1217 m, 4 m/sec, 6210 t fired, .
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16 CTL EXCL 300/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1233 m, 3 m/sec, 6307 t fired, .
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16 CTL EXCL 305/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1248 m, 3 m/sec, 6385 t fired, .
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16 CTL EXCL 310/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1265 m, 3 m/sec, 6495 t fired, .
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16 CTL EXCL 315/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1278 m, 2 m/sec, 6577 t fired, .
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16 CTL EXCL 320/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1292 m, 2 m/sec, 6670 t fired, .
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16 CTL EXCL 325/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1319 m, 5 m/sec, 6863 t fired, .
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16 CTL EXCL 330/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1334 m, 3 m/sec, 6948 t fired, .
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16 CTL EXCL 335/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1355 m, 4 m/sec, 7070 t fired, .
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16 CTL EXCL 340/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1366 m, 2 m/sec, 7150 t fired, .
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16 CTL EXCL 345/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1389 m, 4 m/sec, 7285 t fired, .
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16 CTL EXCL 350/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1404 m, 3 m/sec, 7380 t fired, .
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16 CTL EXCL 355/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1421 m, 3 m/sec, 7478 t fired, .
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16 CTL EXCL 360/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1438 m, 3 m/sec, 7577 t fired, .
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16 CTL EXCL 365/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1452 m, 2 m/sec, 7656 t fired, .
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16 CTL EXCL 370/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1467 m, 3 m/sec, 7749 t fired, .
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16 CTL EXCL 375/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1480 m, 2 m/sec, 7842 t fired, .
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16 CTL EXCL 380/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1497 m, 3 m/sec, 7934 t fired, .
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16 CTL EXCL 385/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1521 m, 4 m/sec, 8038 t fired, .
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16 CTL EXCL 390/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1546 m, 5 m/sec, 8157 t fired, .
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16 CTL EXCL 395/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 1570 m, 4 m/sec, 8275 t fired, .
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16 CTL EXCL 510/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2033 m, 4 m/sec, 10846 t fired, .
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16 CTL EXCL 515/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2048 m, 3 m/sec, 10936 t fired, .
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16 CTL EXCL 520/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2072 m, 4 m/sec, 11073 t fired, .
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16 CTL EXCL 525/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2088 m, 3 m/sec, 11172 t fired, .
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16 CTL EXCL 530/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2110 m, 4 m/sec, 11314 t fired, .
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16 CTL EXCL 535/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2134 m, 4 m/sec, 11434 t fired, .
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16 CTL EXCL 540/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2160 m, 5 m/sec, 11556 t fired, .
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16 CTL EXCL 545/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2184 m, 4 m/sec, 11678 t fired, .
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16 CTL EXCL 550/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2210 m, 5 m/sec, 11816 t fired, .
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16 CTL EXCL 555/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2235 m, 5 m/sec, 11933 t fired, .
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16 CTL EXCL 560/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2259 m, 4 m/sec, 12047 t fired, .
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16 CTL EXCL 565/569 1/5 SharedMemory-PT-000050-CTLCardinality-09 2284 m, 5 m/sec, 12188 t fired, .
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lola: CANCELED task # 16 (type EXCL) for SharedMemory-PT-000050-CTLCardinality-09 (local timeout)
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lola: LAUNCH task # 7 (type EXCL) for 6 SharedMemory-PT-000050-CTLCardinality-04
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lola: LAUNCH task # 16 (type EXCL) for 15 SharedMemory-PT-000050-CTLCardinality-09
lola: time limit : 568 sec
lola: memory limit: 5 pages
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SharedMemory-PT-000050-CTLCardinality-00: CTL false CTL model checker
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7 CTL EXCL 5/568 1/32 SharedMemory-PT-000050-CTLCardinality-04 26968 m, 5393 m/sec, 79962 t fired, .
16 CTL EXCL 5/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 1 m, -456 m/sec, 1 t fired, .
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7 CTL EXCL 10/568 3/32 SharedMemory-PT-000050-CTLCardinality-04 57628 m, 6132 m/sec, 171039 t fired, .
16 CTL EXCL 10/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 1 m, 0 m/sec, 1 t fired, .
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7 CTL EXCL 15/568 4/32 SharedMemory-PT-000050-CTLCardinality-04 86649 m, 5804 m/sec, 257319 t fired, .
16 CTL EXCL 15/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 1 m, 0 m/sec, 1 t fired, .
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7 CTL EXCL 20/568 5/32 SharedMemory-PT-000050-CTLCardinality-04 114896 m, 5649 m/sec, 341287 t fired, .
16 CTL EXCL 20/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 20 m, 3 m/sec, 58 t fired, .
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7 CTL EXCL 25/568 6/32 SharedMemory-PT-000050-CTLCardinality-04 142082 m, 5437 m/sec, 422199 t fired, .
16 CTL EXCL 25/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 41 m, 4 m/sec, 119 t fired, .
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7 CTL EXCL 30/568 6/32 SharedMemory-PT-000050-CTLCardinality-04 168277 m, 5239 m/sec, 500190 t fired, .
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7 CTL EXCL 35/568 7/32 SharedMemory-PT-000050-CTLCardinality-04 196188 m, 5582 m/sec, 583154 t fired, .
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7 CTL EXCL 40/568 8/32 SharedMemory-PT-000050-CTLCardinality-04 223315 m, 5425 m/sec, 663865 t fired, .
16 CTL EXCL 40/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 71 m, 4 m/sec, 233 t fired, .
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7 CTL EXCL 45/568 9/32 SharedMemory-PT-000050-CTLCardinality-04 248942 m, 5125 m/sec, 740096 t fired, .
16 CTL EXCL 45/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 89 m, 3 m/sec, 305 t fired, .
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7 CTL EXCL 50/568 10/32 SharedMemory-PT-000050-CTLCardinality-04 276932 m, 5598 m/sec, 823375 t fired, .
16 CTL EXCL 50/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 108 m, 3 m/sec, 389 t fired, .
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7 CTL EXCL 55/568 11/32 SharedMemory-PT-000050-CTLCardinality-04 303100 m, 5233 m/sec, 901271 t fired, .
16 CTL EXCL 55/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 125 m, 3 m/sec, 473 t fired, .
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7 CTL EXCL 60/568 12/32 SharedMemory-PT-000050-CTLCardinality-04 333054 m, 5990 m/sec, 990562 t fired, .
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7 CTL EXCL 65/568 13/32 SharedMemory-PT-000050-CTLCardinality-04 360425 m, 5474 m/sec, 1072080 t fired, .
16 CTL EXCL 65/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 159 m, 3 m/sec, 618 t fired, .
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7 CTL EXCL 70/568 14/32 SharedMemory-PT-000050-CTLCardinality-04 386764 m, 5267 m/sec, 1150627 t fired, .
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7 CTL EXCL 75/568 15/32 SharedMemory-PT-000050-CTLCardinality-04 414598 m, 5566 m/sec, 1233313 t fired, .
16 CTL EXCL 75/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 194 m, 3 m/sec, 791 t fired, .
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7 CTL EXCL 80/568 16/32 SharedMemory-PT-000050-CTLCardinality-04 440795 m, 5239 m/sec, 1311228 t fired, .
16 CTL EXCL 80/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 210 m, 3 m/sec, 869 t fired, .
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7 CTL EXCL 85/568 17/32 SharedMemory-PT-000050-CTLCardinality-04 466020 m, 5045 m/sec, 1386287 t fired, .
16 CTL EXCL 85/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 222 m, 2 m/sec, 938 t fired, .
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7 CTL EXCL 90/568 18/32 SharedMemory-PT-000050-CTLCardinality-04 491336 m, 5063 m/sec, 1461645 t fired, .
16 CTL EXCL 90/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 242 m, 4 m/sec, 1057 t fired, .
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7 CTL EXCL 95/568 19/32 SharedMemory-PT-000050-CTLCardinality-04 520960 m, 5924 m/sec, 1549806 t fired, .
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7 CTL EXCL 100/568 20/32 SharedMemory-PT-000050-CTLCardinality-04 545897 m, 4987 m/sec, 1624104 t fired, .
16 CTL EXCL 100/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 274 m, 3 m/sec, 1191 t fired, .
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7 CTL EXCL 105/568 21/32 SharedMemory-PT-000050-CTLCardinality-04 570729 m, 4966 m/sec, 1698079 t fired, .
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7 CTL EXCL 110/568 21/32 SharedMemory-PT-000050-CTLCardinality-04 596941 m, 5242 m/sec, 1776214 t fired, .
16 CTL EXCL 110/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 306 m, 3 m/sec, 1342 t fired, .
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7 CTL EXCL 115/568 22/32 SharedMemory-PT-000050-CTLCardinality-04 626250 m, 5861 m/sec, 1863376 t fired, .
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7 CTL EXCL 120/568 23/32 SharedMemory-PT-000050-CTLCardinality-04 651613 m, 5072 m/sec, 1938910 t fired, .
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7 CTL EXCL 125/568 24/32 SharedMemory-PT-000050-CTLCardinality-04 679079 m, 5493 m/sec, 2020716 t fired, .
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7 CTL EXCL 130/568 25/32 SharedMemory-PT-000050-CTLCardinality-04 705838 m, 5351 m/sec, 2100464 t fired, .
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7 CTL EXCL 135/568 26/32 SharedMemory-PT-000050-CTLCardinality-04 731515 m, 5135 m/sec, 2176965 t fired, .
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7 CTL EXCL 140/568 27/32 SharedMemory-PT-000050-CTLCardinality-04 757468 m, 5190 m/sec, 2254306 t fired, .
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7 CTL EXCL 145/568 28/32 SharedMemory-PT-000050-CTLCardinality-04 785439 m, 5594 m/sec, 2337481 t fired, .
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7 CTL EXCL 150/568 29/32 SharedMemory-PT-000050-CTLCardinality-04 814307 m, 5773 m/sec, 2423350 t fired, .
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7 CTL EXCL 155/568 30/32 SharedMemory-PT-000050-CTLCardinality-04 841356 m, 5409 m/sec, 2503838 t fired, .
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7 CTL EXCL 160/568 31/32 SharedMemory-PT-000050-CTLCardinality-04 867858 m, 5300 m/sec, 2582752 t fired, .
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7 CTL EXCL 165/568 32/32 SharedMemory-PT-000050-CTLCardinality-04 893028 m, 5034 m/sec, 2657626 t fired, .
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16 CTL EXCL 170/284 1/5 SharedMemory-PT-000050-CTLCardinality-09 492 m, 2 m/sec, 2345 t fired, .
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16 CTL EXCL 175/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 513 m, 4 m/sec, 2466 t fired, .
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16 CTL EXCL 180/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 529 m, 3 m/sec, 2541 t fired, .
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16 CTL EXCL 185/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 550 m, 4 m/sec, 2630 t fired, .
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16 CTL EXCL 190/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 568 m, 3 m/sec, 2712 t fired, .
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16 CTL EXCL 355/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 1135 m, 3 m/sec, 5778 t fired, .
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16 CTL EXCL 360/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 1154 m, 3 m/sec, 5890 t fired, .
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16 CTL EXCL 365/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 1167 m, 2 m/sec, 5956 t fired, .
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16 CTL EXCL 370/568 1/5 SharedMemory-PT-000050-CTLCardinality-09 1183 m, 3 m/sec, 6042 t fired, .
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000050"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SharedMemory-PT-000050, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891809400681"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000050.tgz
mv SharedMemory-PT-000050 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;