About the Execution of LoLa+red for ServersAndClients-PT-100320
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
6772.743 | 3600000.00 | 4374975.00 | 9564.60 | ?????T?????F?TT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891809100490.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ServersAndClients-PT-100320, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891809100490
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 21M
-rw-r--r-- 1 mcc users 7.8K Feb 26 03:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 03:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 03:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 26 03:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Feb 26 04:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 04:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 04:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Feb 26 04:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 20M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-00
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-01
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-02
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-03
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-04
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-05
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-06
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-07
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-08
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-09
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-10
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-11
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-12
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-13
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-14
FORMULA_NAME ServersAndClients-PT-100320-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679124003965
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ServersAndClients-PT-100320
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-18 07:20:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-18 07:20:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 07:20:09] [INFO ] Load time of PNML (sax parser for PT used): 1507 ms
[2023-03-18 07:20:09] [INFO ] Transformed 32721 places.
[2023-03-18 07:20:09] [INFO ] Transformed 64200 transitions.
[2023-03-18 07:20:09] [INFO ] Parsed PT model containing 32721 places and 64200 transitions and 192800 arcs in 1912 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 54 ms.
Support contains 148 out of 32721 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 645 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
// Phase 1: matrix 64200 rows 32721 cols
[2023-03-18 07:20:12] [INFO ] Computed 521 place invariants in 1555 ms
[2023-03-18 07:20:17] [INFO ] Implicit Places using invariants in 7162 ms returned []
Implicit Place search using SMT only with invariants took 7210 ms to find 0 implicit places.
[2023-03-18 07:20:17] [INFO ] Invariant cache hit.
[2023-03-18 07:20:22] [INFO ] Dead Transitions using invariants and state equation in 4451 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12333 ms. Remains : 32721/32721 places, 64200/64200 transitions.
Support contains 148 out of 32721 places after structural reductions.
[2023-03-18 07:20:25] [INFO ] Flatten gal took : 2485 ms
[2023-03-18 07:20:27] [INFO ] Flatten gal took : 1782 ms
[2023-03-18 07:20:31] [INFO ] Input system was already deterministic with 64200 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1988 ms. (steps per millisecond=5 ) properties (out of 89) seen :43
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 46) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 45) seen :0
Running SMT prover for 45 properties.
[2023-03-18 07:20:34] [INFO ] Invariant cache hit.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.assertInvariants(DeadlockTester.java:2340)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:618)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-18 07:20:59] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-18 07:20:59] [INFO ] After 25057ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 45 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 1 ms.
Support contains 73 out of 32721 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Drop transitions removed 26671 transitions
Trivial Post-agglo rules discarded 26671 transitions
Performed 26671 trivial Post agglomeration. Transition count delta: 26671
Iterating post reduction 0 with 26671 rules applied. Total rules applied 26671 place count 32721 transition count 37529
Reduce places removed 26671 places and 0 transitions.
Performed 3984 Post agglomeration using F-continuation condition.Transition count delta: 3984
Iterating post reduction 1 with 30655 rules applied. Total rules applied 57326 place count 6050 transition count 33545
Reduce places removed 4251 places and 0 transitions.
Ensure Unique test removed 26600 transitions
Reduce isomorphic transitions removed 26600 transitions.
Iterating post reduction 2 with 30851 rules applied. Total rules applied 88177 place count 1799 transition count 6945
Drop transitions removed 3955 transitions
Redundant transition composition rules discarded 3955 transitions
Iterating global reduction 3 with 3955 rules applied. Total rules applied 92132 place count 1799 transition count 2990
Partial Free-agglomeration rule applied 87 times.
Drop transitions removed 87 transitions
Iterating global reduction 3 with 87 rules applied. Total rules applied 92219 place count 1799 transition count 2990
Applied a total of 92219 rules in 5395 ms. Remains 1799 /32721 variables (removed 30922) and now considering 2990/64200 (removed 61210) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 5397 ms. Remains : 1799/32721 places, 2990/64200 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 523 ms. (steps per millisecond=19 ) properties (out of 45) seen :30
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 14) seen :0
Running SMT prover for 14 properties.
// Phase 1: matrix 2990 rows 1799 cols
[2023-03-18 07:21:05] [INFO ] Computed 254 place invariants in 23 ms
[2023-03-18 07:21:06] [INFO ] [Real]Absence check using 154 positive place invariants in 158 ms returned sat
[2023-03-18 07:21:06] [INFO ] [Real]Absence check using 154 positive and 100 generalized place invariants in 85 ms returned sat
[2023-03-18 07:21:10] [INFO ] After 3143ms SMT Verify possible using state equation in real domain returned unsat :9 sat :5
[2023-03-18 07:21:11] [INFO ] After 4651ms SMT Verify possible using trap constraints in real domain returned unsat :9 sat :5
Attempting to minimize the solution found.
Minimization took 754 ms.
[2023-03-18 07:21:12] [INFO ] After 6749ms SMT Verify possible using all constraints in real domain returned unsat :9 sat :5
Fused 14 Parikh solutions to 5 different solutions.
Finished Parikh walk after 2 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=1 )
Parikh walk visited 5 properties in 19 ms.
Successfully simplified 9 atomic propositions for a total of 16 simplifications.
[2023-03-18 07:21:14] [INFO ] Flatten gal took : 2022 ms
[2023-03-18 07:21:16] [INFO ] Flatten gal took : 1840 ms
[2023-03-18 07:21:19] [INFO ] Input system was already deterministic with 64200 transitions.
Support contains 114 out of 32721 places (down from 115) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 394 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 395 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:21:22] [INFO ] Flatten gal took : 1576 ms
[2023-03-18 07:21:24] [INFO ] Flatten gal took : 1898 ms
[2023-03-18 07:21:27] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 332 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 335 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:21:29] [INFO ] Flatten gal took : 1675 ms
[2023-03-18 07:21:31] [INFO ] Flatten gal took : 1813 ms
[2023-03-18 07:21:34] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 361 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 363 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:21:36] [INFO ] Flatten gal took : 1535 ms
[2023-03-18 07:21:38] [INFO ] Flatten gal took : 1733 ms
[2023-03-18 07:21:41] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 349 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 351 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:21:43] [INFO ] Flatten gal took : 1539 ms
[2023-03-18 07:21:45] [INFO ] Flatten gal took : 1779 ms
[2023-03-18 07:21:48] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 341 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 342 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:21:50] [INFO ] Flatten gal took : 1504 ms
[2023-03-18 07:21:52] [INFO ] Flatten gal took : 1681 ms
[2023-03-18 07:21:55] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Drop transitions removed 31999 transitions
Trivial Post-agglo rules discarded 31999 transitions
Performed 31999 trivial Post agglomeration. Transition count delta: 31999
Iterating post reduction 0 with 31999 rules applied. Total rules applied 31999 place count 32721 transition count 32201
Reduce places removed 32318 places and 0 transitions.
Ensure Unique test removed 31800 transitions
Reduce isomorphic transitions removed 31800 transitions.
Iterating post reduction 1 with 64118 rules applied. Total rules applied 96117 place count 403 transition count 401
Drop transitions removed 99 transitions
Redundant transition composition rules discarded 99 transitions
Iterating global reduction 2 with 99 rules applied. Total rules applied 96216 place count 403 transition count 302
Discarding 99 places :
Implicit places reduction removed 99 places
Drop transitions removed 198 transitions
Trivial Post-agglo rules discarded 198 transitions
Performed 198 trivial Post agglomeration. Transition count delta: 198
Iterating post reduction 2 with 297 rules applied. Total rules applied 96513 place count 304 transition count 104
Reduce places removed 297 places and 0 transitions.
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 98 transitions.
Iterating post reduction 3 with 395 rules applied. Total rules applied 96908 place count 7 transition count 6
Applied a total of 96908 rules in 842 ms. Remains 7 /32721 variables (removed 32714) and now considering 6/64200 (removed 64194) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 842 ms. Remains : 7/32721 places, 6/64200 transitions.
[2023-03-18 07:21:56] [INFO ] Flatten gal took : 1 ms
[2023-03-18 07:21:56] [INFO ] Flatten gal took : 0 ms
[2023-03-18 07:21:56] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 392 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 393 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:21:58] [INFO ] Flatten gal took : 1540 ms
[2023-03-18 07:22:00] [INFO ] Flatten gal took : 1716 ms
[2023-03-18 07:22:03] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 333 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 337 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:05] [INFO ] Flatten gal took : 1533 ms
[2023-03-18 07:22:07] [INFO ] Flatten gal took : 1736 ms
[2023-03-18 07:22:10] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 399 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 408 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:12] [INFO ] Flatten gal took : 1789 ms
[2023-03-18 07:22:14] [INFO ] Flatten gal took : 1738 ms
[2023-03-18 07:22:17] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 373 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 375 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:20] [INFO ] Flatten gal took : 1889 ms
[2023-03-18 07:22:21] [INFO ] Flatten gal took : 1600 ms
[2023-03-18 07:22:24] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 349 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 354 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:27] [INFO ] Flatten gal took : 1943 ms
[2023-03-18 07:22:28] [INFO ] Flatten gal took : 1688 ms
[2023-03-18 07:22:31] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 386 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 391 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:33] [INFO ] Flatten gal took : 1534 ms
[2023-03-18 07:22:35] [INFO ] Flatten gal took : 1714 ms
[2023-03-18 07:22:38] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 332 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 337 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:40] [INFO ] Flatten gal took : 1536 ms
[2023-03-18 07:22:42] [INFO ] Flatten gal took : 1902 ms
[2023-03-18 07:22:45] [INFO ] Input system was already deterministic with 64200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Drop transitions removed 31999 transitions
Trivial Post-agglo rules discarded 31999 transitions
Performed 31999 trivial Post agglomeration. Transition count delta: 31999
Iterating post reduction 0 with 31999 rules applied. Total rules applied 31999 place count 32721 transition count 32201
Reduce places removed 32318 places and 0 transitions.
Ensure Unique test removed 31800 transitions
Reduce isomorphic transitions removed 31800 transitions.
Iterating post reduction 1 with 64118 rules applied. Total rules applied 96117 place count 403 transition count 401
Drop transitions removed 99 transitions
Redundant transition composition rules discarded 99 transitions
Iterating global reduction 2 with 99 rules applied. Total rules applied 96216 place count 403 transition count 302
Discarding 99 places :
Implicit places reduction removed 99 places
Drop transitions removed 198 transitions
Trivial Post-agglo rules discarded 198 transitions
Performed 198 trivial Post agglomeration. Transition count delta: 198
Iterating post reduction 2 with 297 rules applied. Total rules applied 96513 place count 304 transition count 104
Reduce places removed 297 places and 0 transitions.
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 98 transitions.
Iterating post reduction 3 with 395 rules applied. Total rules applied 96908 place count 7 transition count 6
Applied a total of 96908 rules in 786 ms. Remains 7 /32721 variables (removed 32714) and now considering 6/64200 (removed 64194) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 786 ms. Remains : 7/32721 places, 6/64200 transitions.
[2023-03-18 07:22:46] [INFO ] Flatten gal took : 0 ms
[2023-03-18 07:22:46] [INFO ] Flatten gal took : 0 ms
[2023-03-18 07:22:46] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Drop transitions removed 31998 transitions
Trivial Post-agglo rules discarded 31998 transitions
Performed 31998 trivial Post agglomeration. Transition count delta: 31998
Iterating post reduction 0 with 31998 rules applied. Total rules applied 31998 place count 32721 transition count 32202
Reduce places removed 32316 places and 0 transitions.
Ensure Unique test removed 31700 transitions
Reduce isomorphic transitions removed 31700 transitions.
Iterating post reduction 1 with 64016 rules applied. Total rules applied 96014 place count 405 transition count 502
Drop transitions removed 198 transitions
Redundant transition composition rules discarded 198 transitions
Iterating global reduction 2 with 198 rules applied. Total rules applied 96212 place count 405 transition count 304
Discarding 98 places :
Implicit places reduction removed 98 places
Drop transitions removed 196 transitions
Trivial Post-agglo rules discarded 196 transitions
Performed 196 trivial Post agglomeration. Transition count delta: 196
Iterating post reduction 2 with 294 rules applied. Total rules applied 96506 place count 307 transition count 108
Reduce places removed 294 places and 0 transitions.
Ensure Unique test removed 97 transitions
Reduce isomorphic transitions removed 97 transitions.
Iterating post reduction 3 with 391 rules applied. Total rules applied 96897 place count 13 transition count 11
Applied a total of 96897 rules in 756 ms. Remains 13 /32721 variables (removed 32708) and now considering 11/64200 (removed 64189) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 756 ms. Remains : 13/32721 places, 11/64200 transitions.
[2023-03-18 07:22:47] [INFO ] Flatten gal took : 0 ms
[2023-03-18 07:22:47] [INFO ] Flatten gal took : 0 ms
[2023-03-18 07:22:47] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32721/32721 places, 64200/64200 transitions.
Applied a total of 0 rules in 322 ms. Remains 32721 /32721 variables (removed 0) and now considering 64200/64200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 323 ms. Remains : 32721/32721 places, 64200/64200 transitions.
[2023-03-18 07:22:49] [INFO ] Flatten gal took : 1537 ms
[2023-03-18 07:22:51] [INFO ] Flatten gal took : 1716 ms
[2023-03-18 07:22:54] [INFO ] Input system was already deterministic with 64200 transitions.
[2023-03-18 07:22:55] [INFO ] Flatten gal took : 1649 ms
[2023-03-18 07:22:57] [INFO ] Flatten gal took : 1642 ms
[2023-03-18 07:22:57] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-18 07:22:57] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 32721 places, 64200 transitions and 192800 arcs took 214 ms.
Total runtime 170591 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ServersAndClients-PT-100320
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA ServersAndClients-PT-100320-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ServersAndClients-PT-100320-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ServersAndClients-PT-100320-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ServersAndClients-PT-100320-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 9888368 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16045116 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3072 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3077 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3082 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3087 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3092 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3097 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3102 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3107 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3112 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3117 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3122 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3127 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3132 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3137 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3142 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3147 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3152 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3157 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3162 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3167 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3172 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3177 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3182 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3187 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 68 (type SKEL/SRCH) for 18 ServersAndClients-PT-100320-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: FINISHED task # 68 (type SKEL/SRCH) for ServersAndClients-PT-100320-CTLFireability-06
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 1.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 4 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3192 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: RELEASE
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 2.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 69 (type SKEL/SRCH) for 37 ServersAndClients-PT-100320-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/SRCH) for ServersAndClients-PT-100320-CTLFireability-11
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3197 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3202 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3207 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3212 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3217 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3222 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3227 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3232 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 5 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3237 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 52 (type EXCL) for 37 ServersAndClients-PT-100320-CTLFireability-11
lola: time limit : 17 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for ServersAndClients-PT-100320-CTLFireability-11
lola: result : true
lola: markings : 3
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 6 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3242 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 44 (type EXCL) for 37 ServersAndClients-PT-100320-CTLFireability-11
lola: time limit : 18 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for ServersAndClients-PT-100320-CTLFireability-11
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 63 (type EXCL) for 62 ServersAndClients-PT-100320-CTLFireability-14
lola: time limit : 19 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for ServersAndClients-PT-100320-CTLFireability-14
lola: result : true
lola: markings : 3
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-05: EG 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 7 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-13: EGEF 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3247 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 ServersAndClients-PT-100320-CTLFireability-05
lola: time limit : 20 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for ServersAndClients-PT-100320-CTLFireability-05
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 60 (type EXCL) for 59 ServersAndClients-PT-100320-CTLFireability-13
lola: time limit : 21 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for ServersAndClients-PT-100320-CTLFireability-13
lola: result : true
lola: markings : 175
lola: fired transitions : 352
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-11: CONJ 0 0 0 0 7 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3252 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 70 (type EXCL) for 37 ServersAndClients-PT-100320-CTLFireability-11
lola: time limit : 23 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type EXCL) for ServersAndClients-PT-100320-CTLFireability-11
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for (null) stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3257 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3262 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3267 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3272 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3277 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3282 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3287 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3292 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3297 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3302 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3307 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3312 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3317 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3322 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3327 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3332 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3337 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3342 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3347 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3352 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3357 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3362 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3367 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3372 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3377 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3382 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3387 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3392 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3397 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3402 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3407 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3412 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3417 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100320-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
ServersAndClients-PT-100320-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100320-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 3422 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: caught signal Terminated - aborting LoLA
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100320-CTLFireability-00: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-01: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-02: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-03: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-04: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-05: EG true state space / EG
ServersAndClients-PT-100320-CTLFireability-06: DISJ unknown DISJ
ServersAndClients-PT-100320-CTLFireability-07: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-08: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-09: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-10: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-11: CONJ false state space / EG
ServersAndClients-PT-100320-CTLFireability-12: CTL unknown AGGR
ServersAndClients-PT-100320-CTLFireability-13: EGEF true CTL model checker
ServersAndClients-PT-100320-CTLFireability-14: CTL true CTL model checker
ServersAndClients-PT-100320-CTLFireability-15: CTL unknown AGGR
Time elapsed: 3426 secs. Pages in use: 1
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ServersAndClients-PT-100320"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ServersAndClients-PT-100320, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891809100490"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ServersAndClients-PT-100320.tgz
mv ServersAndClients-PT-100320 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;