fond

jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r359-smll-167891809000458
Last Updated
May 14, 2023

About the Execution of LoLa+red for ServersAndClients-PT-100020

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2969.348 68003.00 114660.00 648.50 TFTFTFTFFTFTFFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891809000458.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ServersAndClients-PT-100020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891809000458
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.7M
-rw-r--r-- 1 mcc users 11K Feb 26 03:28 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 26 03:28 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 03:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 03:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 25 16:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 03:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 168K Feb 26 03:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 03:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 26 03:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.1M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-00
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-01
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-02
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-03
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-04
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-05
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-06
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-07
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-08
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-09
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-10
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-11
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-12
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-13
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-14
FORMULA_NAME ServersAndClients-PT-100020-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679117626772

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ServersAndClients-PT-100020
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-18 05:33:49] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-18 05:33:49] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 05:33:50] [INFO ] Load time of PNML (sax parser for PT used): 438 ms
[2023-03-18 05:33:50] [INFO ] Transformed 2421 places.
[2023-03-18 05:33:50] [INFO ] Transformed 4200 transitions.
[2023-03-18 05:33:50] [INFO ] Found NUPN structural information;
[2023-03-18 05:33:50] [INFO ] Parsed PT model containing 2421 places and 4200 transitions and 12800 arcs in 639 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
Support contains 145 out of 2421 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 535 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
// Phase 1: matrix 4200 rows 2421 cols
[2023-03-18 05:33:51] [INFO ] Computed 221 place invariants in 132 ms
[2023-03-18 05:33:52] [INFO ] Implicit Places using invariants in 1261 ms returned []
[2023-03-18 05:33:52] [INFO ] Invariant cache hit.
[2023-03-18 05:33:53] [INFO ] Implicit Places using invariants and state equation in 1266 ms returned []
Implicit Place search using SMT with State Equation took 2572 ms to find 0 implicit places.
[2023-03-18 05:33:53] [INFO ] Invariant cache hit.
[2023-03-18 05:33:54] [INFO ] Dead Transitions using invariants and state equation in 740 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3855 ms. Remains : 2421/2421 places, 4200/4200 transitions.
Support contains 145 out of 2421 places after structural reductions.
[2023-03-18 05:33:55] [INFO ] Flatten gal took : 553 ms
[2023-03-18 05:33:55] [INFO ] Flatten gal took : 332 ms
[2023-03-18 05:33:56] [INFO ] Input system was already deterministic with 4200 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1028 ms. (steps per millisecond=9 ) properties (out of 102) seen :88
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 14) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 12) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-18 05:33:57] [INFO ] Invariant cache hit.
[2023-03-18 05:33:59] [INFO ] [Real]Absence check using 121 positive place invariants in 185 ms returned sat
[2023-03-18 05:33:59] [INFO ] [Real]Absence check using 121 positive and 100 generalized place invariants in 84 ms returned sat
[2023-03-18 05:34:01] [INFO ] After 2349ms SMT Verify possible using state equation in real domain returned unsat :7 sat :1
[2023-03-18 05:34:02] [INFO ] After 2685ms SMT Verify possible using trap constraints in real domain returned unsat :7 sat :1
Attempting to minimize the solution found.
Minimization took 202 ms.
[2023-03-18 05:34:02] [INFO ] After 4513ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :1
Fused 8 Parikh solutions to 1 different solutions.
Finished Parikh walk after 2 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=0 )
Parikh walk visited 1 properties in 7 ms.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
[2023-03-18 05:34:02] [INFO ] Flatten gal took : 225 ms
[2023-03-18 05:34:03] [INFO ] Flatten gal took : 253 ms
[2023-03-18 05:34:03] [INFO ] Input system was already deterministic with 4200 transitions.
Support contains 123 out of 2421 places (down from 129) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 253 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 256 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:03] [INFO ] Flatten gal took : 176 ms
[2023-03-18 05:34:04] [INFO ] Flatten gal took : 154 ms
[2023-03-18 05:34:04] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1763 transitions
Trivial Post-agglo rules discarded 1763 transitions
Performed 1763 trivial Post agglomeration. Transition count delta: 1763
Iterating post reduction 0 with 1763 rules applied. Total rules applied 1763 place count 2421 transition count 2437
Reduce places removed 1763 places and 0 transitions.
Performed 36 Post agglomeration using F-continuation condition.Transition count delta: 36
Iterating post reduction 1 with 1799 rules applied. Total rules applied 3562 place count 658 transition count 2401
Reduce places removed 53 places and 0 transitions.
Ensure Unique test removed 1600 transitions
Reduce isomorphic transitions removed 1600 transitions.
Iterating post reduction 2 with 1653 rules applied. Total rules applied 5215 place count 605 transition count 801
Drop transitions removed 99 transitions
Redundant transition composition rules discarded 99 transitions
Iterating global reduction 3 with 99 rules applied. Total rules applied 5314 place count 605 transition count 702
Applied a total of 5314 rules in 200 ms. Remains 605 /2421 variables (removed 1816) and now considering 702/4200 (removed 3498) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 204 ms. Remains : 605/2421 places, 702/4200 transitions.
[2023-03-18 05:34:04] [INFO ] Flatten gal took : 32 ms
[2023-03-18 05:34:04] [INFO ] Flatten gal took : 32 ms
[2023-03-18 05:34:04] [INFO ] Input system was already deterministic with 702 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1761 transitions
Trivial Post-agglo rules discarded 1761 transitions
Performed 1761 trivial Post agglomeration. Transition count delta: 1761
Iterating post reduction 0 with 1761 rules applied. Total rules applied 1761 place count 2421 transition count 2439
Reduce places removed 1761 places and 0 transitions.
Performed 36 Post agglomeration using F-continuation condition.Transition count delta: 36
Iterating post reduction 1 with 1797 rules applied. Total rules applied 3558 place count 660 transition count 2403
Reduce places removed 51 places and 0 transitions.
Ensure Unique test removed 1400 transitions
Reduce isomorphic transitions removed 1400 transitions.
Iterating post reduction 2 with 1451 rules applied. Total rules applied 5009 place count 609 transition count 1003
Drop transitions removed 297 transitions
Redundant transition composition rules discarded 297 transitions
Iterating global reduction 3 with 297 rules applied. Total rules applied 5306 place count 609 transition count 706
Applied a total of 5306 rules in 214 ms. Remains 609 /2421 variables (removed 1812) and now considering 706/4200 (removed 3494) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 216 ms. Remains : 609/2421 places, 706/4200 transitions.
[2023-03-18 05:34:05] [INFO ] Flatten gal took : 50 ms
[2023-03-18 05:34:05] [INFO ] Flatten gal took : 21 ms
[2023-03-18 05:34:05] [INFO ] Input system was already deterministic with 706 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 236 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 241 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:05] [INFO ] Flatten gal took : 140 ms
[2023-03-18 05:34:05] [INFO ] Flatten gal took : 175 ms
[2023-03-18 05:34:06] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1880 transitions
Trivial Post-agglo rules discarded 1880 transitions
Performed 1880 trivial Post agglomeration. Transition count delta: 1880
Iterating post reduction 0 with 1880 rules applied. Total rules applied 1880 place count 2421 transition count 2320
Reduce places removed 1880 places and 0 transitions.
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Iterating post reduction 1 with 1899 rules applied. Total rules applied 3779 place count 541 transition count 2301
Reduce places removed 37 places and 0 transitions.
Ensure Unique test removed 1700 transitions
Reduce isomorphic transitions removed 1700 transitions.
Iterating post reduction 2 with 1737 rules applied. Total rules applied 5516 place count 504 transition count 601
Drop transitions removed 99 transitions
Redundant transition composition rules discarded 99 transitions
Iterating global reduction 3 with 99 rules applied. Total rules applied 5615 place count 504 transition count 502
Applied a total of 5615 rules in 90 ms. Remains 504 /2421 variables (removed 1917) and now considering 502/4200 (removed 3698) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 90 ms. Remains : 504/2421 places, 502/4200 transitions.
[2023-03-18 05:34:06] [INFO ] Flatten gal took : 13 ms
[2023-03-18 05:34:06] [INFO ] Flatten gal took : 14 ms
[2023-03-18 05:34:06] [INFO ] Input system was already deterministic with 502 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1762 transitions
Trivial Post-agglo rules discarded 1762 transitions
Performed 1762 trivial Post agglomeration. Transition count delta: 1762
Iterating post reduction 0 with 1762 rules applied. Total rules applied 1762 place count 2421 transition count 2438
Reduce places removed 1762 places and 0 transitions.
Performed 36 Post agglomeration using F-continuation condition.Transition count delta: 36
Iterating post reduction 1 with 1798 rules applied. Total rules applied 3560 place count 659 transition count 2402
Reduce places removed 52 places and 0 transitions.
Ensure Unique test removed 1500 transitions
Reduce isomorphic transitions removed 1500 transitions.
Iterating post reduction 2 with 1552 rules applied. Total rules applied 5112 place count 607 transition count 902
Drop transitions removed 198 transitions
Redundant transition composition rules discarded 198 transitions
Iterating global reduction 3 with 198 rules applied. Total rules applied 5310 place count 607 transition count 704
Applied a total of 5310 rules in 95 ms. Remains 607 /2421 variables (removed 1814) and now considering 704/4200 (removed 3496) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 95 ms. Remains : 607/2421 places, 704/4200 transitions.
[2023-03-18 05:34:06] [INFO ] Flatten gal took : 18 ms
[2023-03-18 05:34:06] [INFO ] Flatten gal took : 18 ms
[2023-03-18 05:34:06] [INFO ] Input system was already deterministic with 704 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 169 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 171 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:06] [INFO ] Flatten gal took : 109 ms
[2023-03-18 05:34:06] [INFO ] Flatten gal took : 115 ms
[2023-03-18 05:34:07] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 169 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 178 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:07] [INFO ] Flatten gal took : 106 ms
[2023-03-18 05:34:07] [INFO ] Flatten gal took : 123 ms
[2023-03-18 05:34:07] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 223 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 225 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:08] [INFO ] Flatten gal took : 145 ms
[2023-03-18 05:34:08] [INFO ] Flatten gal took : 184 ms
[2023-03-18 05:34:08] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 185 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 185 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:08] [INFO ] Flatten gal took : 102 ms
[2023-03-18 05:34:09] [INFO ] Flatten gal took : 118 ms
[2023-03-18 05:34:09] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 243 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 243 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:09] [INFO ] Flatten gal took : 117 ms
[2023-03-18 05:34:09] [INFO ] Flatten gal took : 110 ms
[2023-03-18 05:34:10] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 247 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 248 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:10] [INFO ] Flatten gal took : 149 ms
[2023-03-18 05:34:10] [INFO ] Flatten gal took : 166 ms
[2023-03-18 05:34:10] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 166 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 168 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:11] [INFO ] Flatten gal took : 123 ms
[2023-03-18 05:34:11] [INFO ] Flatten gal took : 161 ms
[2023-03-18 05:34:11] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 274 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 274 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:12] [INFO ] Flatten gal took : 158 ms
[2023-03-18 05:34:12] [INFO ] Flatten gal took : 118 ms
[2023-03-18 05:34:12] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 164 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 164 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:12] [INFO ] Flatten gal took : 95 ms
[2023-03-18 05:34:12] [INFO ] Flatten gal took : 109 ms
[2023-03-18 05:34:13] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 166 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 166 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:34:13] [INFO ] Flatten gal took : 95 ms
[2023-03-18 05:34:13] [INFO ] Flatten gal took : 106 ms
[2023-03-18 05:34:13] [INFO ] Input system was already deterministic with 4200 transitions.
[2023-03-18 05:34:13] [INFO ] Flatten gal took : 108 ms
[2023-03-18 05:34:13] [INFO ] Flatten gal took : 102 ms
[2023-03-18 05:34:13] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-18 05:34:13] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2421 places, 4200 transitions and 12800 arcs took 24 ms.
Total runtime 24298 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ServersAndClients-PT-100020
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA ServersAndClients-PT-100020-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679117694775

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 56 (type SKEL/SRCH) for 31 ServersAndClients-PT-100020-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SKEL/SRCH) for ServersAndClients-PT-100020-CTLFireability-09
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 7 (type EXCL) for 6 ServersAndClients-PT-100020-CTLFireability-02
lola: time limit : 198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-02
lola: result : true
lola: markings : 210
lola: fired transitions : 736
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 57 (type EXCL) for 12 ServersAndClients-PT-100020-CTLFireability-04
lola: time limit : 209 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 57 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-04
lola: result : false
lola: markings : 202
lola: fired transitions : 401
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 ServersAndClients-PT-100020-CTLFireability-05
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-05
lola: result : false
lola: markings : 3
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH task # 24 (type EXCL) for 21 ServersAndClients-PT-100020-CTLFireability-07
lola: time limit : 237 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-07
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ServersAndClients-PT-100020-CTLFireability-01
lola: time limit : 254 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 4 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-01
lola: result : false
lola: markings : 3
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 31 ServersAndClients-PT-100020-CTLFireability-09
lola: time limit : 274 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-09
lola: result : true
lola: markings : 303
lola: fired transitions : 1610
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100020-CTLFireability-01: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-02: CTL true CTL model checker
ServersAndClients-PT-100020-CTLFireability-04: AGAF true state space /EFEG
ServersAndClients-PT-100020-CTLFireability-05: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100020-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-07: CONJ 0 0 0 0 3 0 0 0
ServersAndClients-PT-100020-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-09: CONJ 0 0 0 0 3 0 0 0
ServersAndClients-PT-100020-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-12: CTL 1 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 36 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 45 (type EXCL) for 44 ServersAndClients-PT-100020-CTLFireability-12
lola: time limit : 296 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 45 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-12
lola: result : false
lola: markings : 2201
lola: fired transitions : 19655
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 53 ServersAndClients-PT-100020-CTLFireability-15
lola: time limit : 323 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 54 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-15
lola: result : true
lola: markings : 2201
lola: fired transitions : 7956
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 ServersAndClients-PT-100020-CTLFireability-14
lola: time limit : 356 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-14
lola: result : true
lola: markings : 2201
lola: fired transitions : 15006
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 ServersAndClients-PT-100020-CTLFireability-13
lola: time limit : 395 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-13
lola: result : false
lola: markings : 2180
lola: fired transitions : 12696
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 ServersAndClients-PT-100020-CTLFireability-11
lola: time limit : 445 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-11
lola: result : true
lola: markings : 1399
lola: fired transitions : 2661
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 ServersAndClients-PT-100020-CTLFireability-10
lola: time limit : 508 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-10
lola: result : false
lola: markings : 2201
lola: fired transitions : 8602
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 31 ServersAndClients-PT-100020-CTLFireability-09
lola: time limit : 593 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-09
lola: result : true
lola: markings : 200
lola: fired transitions : 379
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 ServersAndClients-PT-100020-CTLFireability-08
lola: time limit : 712 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-08
lola: result : false
lola: markings : 301
lola: fired transitions : 802
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 21 ServersAndClients-PT-100020-CTLFireability-07
lola: time limit : 890 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-07
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 ServersAndClients-PT-100020-CTLFireability-06
lola: time limit : 1186 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-06
lola: result : true
lola: markings : 2201
lola: fired transitions : 9367
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ServersAndClients-PT-100020-CTLFireability-03
lola: time limit : 1780 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-03
lola: result : false
lola: markings : 142
lola: fired transitions : 193
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ServersAndClients-PT-100020-CTLFireability-00
lola: time limit : 3560 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ServersAndClients-PT-100020-CTLFireability-00
lola: result : true
lola: markings : 101
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100020-CTLFireability-00: CTL true CTL model checker
ServersAndClients-PT-100020-CTLFireability-01: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-02: CTL true CTL model checker
ServersAndClients-PT-100020-CTLFireability-03: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-04: AGAF true state space /EFEG
ServersAndClients-PT-100020-CTLFireability-05: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-06: CTL true CTL model checker
ServersAndClients-PT-100020-CTLFireability-07: CONJ false CTL model checker
ServersAndClients-PT-100020-CTLFireability-08: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-09: CONJ true CONJ
ServersAndClients-PT-100020-CTLFireability-10: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-11: CTL true CTL model checker
ServersAndClients-PT-100020-CTLFireability-12: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-13: CTL false CTL model checker
ServersAndClients-PT-100020-CTLFireability-14: CTL true CTL model checker
ServersAndClients-PT-100020-CTLFireability-15: CTL true CTL model checker


Time elapsed: 40 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ServersAndClients-PT-100020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ServersAndClients-PT-100020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891809000458"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ServersAndClients-PT-100020.tgz
mv ServersAndClients-PT-100020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;