Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891809000457.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ServersAndClients-PT-100020, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891809000457
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.7M
-rw-r--r-- 1 mcc users 11K Feb 26 03:28 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 26 03:28 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 03:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 03:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 25 16:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 03:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 168K Feb 26 03:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 03:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 26 03:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.1M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-00
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-01
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-02
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-03
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-04
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-05
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-06
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-07
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-08
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-09
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-10
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-11
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-12
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-13
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-14
FORMULA_NAME ServersAndClients-PT-100020-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679117536789

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ServersAndClients-PT-100020
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-18 05:32:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-18 05:32:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 05:32:20] [INFO ] Load time of PNML (sax parser for PT used): 584 ms
[2023-03-18 05:32:20] [INFO ] Transformed 2421 places.
[2023-03-18 05:32:21] [INFO ] Transformed 4200 transitions.
[2023-03-18 05:32:21] [INFO ] Found NUPN structural information;
[2023-03-18 05:32:21] [INFO ] Parsed PT model containing 2421 places and 4200 transitions and 12800 arcs in 782 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 23 ms.
FORMULA ServersAndClients-PT-100020-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 186 out of 2421 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 684 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
// Phase 1: matrix 4200 rows 2421 cols
[2023-03-18 05:32:22] [INFO ] Computed 221 place invariants in 142 ms
[2023-03-18 05:32:23] [INFO ] Implicit Places using invariants in 1900 ms returned []
[2023-03-18 05:32:23] [INFO ] Invariant cache hit.
[2023-03-18 05:32:25] [INFO ] Implicit Places using invariants and state equation in 1324 ms returned []
Implicit Place search using SMT with State Equation took 3291 ms to find 0 implicit places.
[2023-03-18 05:32:25] [INFO ] Invariant cache hit.
[2023-03-18 05:32:25] [INFO ] Dead Transitions using invariants and state equation in 774 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4754 ms. Remains : 2421/2421 places, 4200/4200 transitions.
Support contains 186 out of 2421 places after structural reductions.
[2023-03-18 05:32:26] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-18 05:32:26] [INFO ] Flatten gal took : 474 ms
FORMULA ServersAndClients-PT-100020-CTLCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-18 05:32:27] [INFO ] Flatten gal took : 260 ms
[2023-03-18 05:32:27] [INFO ] Input system was already deterministic with 4200 transitions.
Support contains 145 out of 2421 places (down from 186) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1042 ms. (steps per millisecond=9 ) properties (out of 90) seen :63
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 27) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 26) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 26) seen :0
Running SMT prover for 26 properties.
[2023-03-18 05:32:28] [INFO ] Invariant cache hit.
[2023-03-18 05:32:31] [INFO ] [Real]Absence check using 121 positive place invariants in 129 ms returned sat
[2023-03-18 05:32:31] [INFO ] [Real]Absence check using 121 positive and 100 generalized place invariants in 229 ms returned sat
[2023-03-18 05:32:39] [INFO ] After 6795ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:24
[2023-03-18 05:32:40] [INFO ] After 7708ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:26
[2023-03-18 05:32:40] [INFO ] After 11527ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:26
[2023-03-18 05:32:42] [INFO ] [Nat]Absence check using 121 positive place invariants in 127 ms returned sat
[2023-03-18 05:32:42] [INFO ] [Nat]Absence check using 121 positive and 100 generalized place invariants in 67 ms returned sat
[2023-03-18 05:32:51] [INFO ] After 7113ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :24
[2023-03-18 05:32:57] [INFO ] After 13388ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :24
Attempting to minimize the solution found.
Minimization took 4105 ms.
[2023-03-18 05:33:01] [INFO ] After 21122ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :24
Fused 26 Parikh solutions to 23 different solutions.
Finished Parikh walk after 2 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2 )
Parikh walk visited 24 properties in 56 ms.
Successfully simplified 2 atomic propositions for a total of 14 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA ServersAndClients-PT-100020-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-18 05:33:01] [INFO ] Flatten gal took : 132 ms
[2023-03-18 05:33:01] [INFO ] Flatten gal took : 139 ms
[2023-03-18 05:33:02] [INFO ] Input system was already deterministic with 4200 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 164 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 166 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:02] [INFO ] Flatten gal took : 124 ms
[2023-03-18 05:33:02] [INFO ] Flatten gal took : 132 ms
[2023-03-18 05:33:02] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1908 transitions
Trivial Post-agglo rules discarded 1908 transitions
Performed 1908 trivial Post agglomeration. Transition count delta: 1908
Iterating post reduction 0 with 1908 rules applied. Total rules applied 1908 place count 2421 transition count 2292
Reduce places removed 1908 places and 0 transitions.
Performed 80 Post agglomeration using F-continuation condition.Transition count delta: 80
Iterating post reduction 1 with 1988 rules applied. Total rules applied 3896 place count 513 transition count 2212
Reduce places removed 91 places and 0 transitions.
Ensure Unique test removed 1000 transitions
Reduce isomorphic transitions removed 1000 transitions.
Iterating post reduction 2 with 1091 rules applied. Total rules applied 4987 place count 422 transition count 1212
Drop transitions removed 888 transitions
Redundant transition composition rules discarded 888 transitions
Iterating global reduction 3 with 888 rules applied. Total rules applied 5875 place count 422 transition count 324
Discarding 87 places :
Implicit places reduction removed 87 places
Drop transitions removed 166 transitions
Trivial Post-agglo rules discarded 166 transitions
Performed 166 trivial Post agglomeration. Transition count delta: 166
Iterating post reduction 3 with 253 rules applied. Total rules applied 6128 place count 335 transition count 158
Reduce places removed 249 places and 0 transitions.
Ensure Unique test removed 82 transitions
Reduce isomorphic transitions removed 82 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 4 with 335 rules applied. Total rules applied 6463 place count 86 transition count 72
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 6467 place count 82 transition count 72
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 1 Pre rules applied. Total rules applied 6467 place count 82 transition count 71
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 6 with 3 rules applied. Total rules applied 6470 place count 80 transition count 71
Applied a total of 6470 rules in 142 ms. Remains 80 /2421 variables (removed 2341) and now considering 71/4200 (removed 4129) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 142 ms. Remains : 80/2421 places, 71/4200 transitions.
[2023-03-18 05:33:03] [INFO ] Flatten gal took : 2 ms
[2023-03-18 05:33:03] [INFO ] Flatten gal took : 2 ms
[2023-03-18 05:33:03] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1993 transitions
Trivial Post-agglo rules discarded 1993 transitions
Performed 1993 trivial Post agglomeration. Transition count delta: 1993
Iterating post reduction 0 with 1993 rules applied. Total rules applied 1993 place count 2421 transition count 2207
Reduce places removed 2008 places and 0 transitions.
Ensure Unique test removed 1400 transitions
Reduce isomorphic transitions removed 1400 transitions.
Iterating post reduction 1 with 3408 rules applied. Total rules applied 5401 place count 413 transition count 807
Drop transitions removed 493 transitions
Redundant transition composition rules discarded 493 transitions
Iterating global reduction 2 with 493 rules applied. Total rules applied 5894 place count 413 transition count 314
Discarding 93 places :
Implicit places reduction removed 93 places
Drop transitions removed 186 transitions
Trivial Post-agglo rules discarded 186 transitions
Performed 186 trivial Post agglomeration. Transition count delta: 186
Iterating post reduction 2 with 279 rules applied. Total rules applied 6173 place count 320 transition count 128
Reduce places removed 279 places and 0 transitions.
Ensure Unique test removed 92 transitions
Reduce isomorphic transitions removed 92 transitions.
Iterating post reduction 3 with 371 rules applied. Total rules applied 6544 place count 41 transition count 36
Applied a total of 6544 rules in 71 ms. Remains 41 /2421 variables (removed 2380) and now considering 36/4200 (removed 4164) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 71 ms. Remains : 41/2421 places, 36/4200 transitions.
[2023-03-18 05:33:03] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:03] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:03] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 195 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 196 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:03] [INFO ] Flatten gal took : 108 ms
[2023-03-18 05:33:03] [INFO ] Flatten gal took : 132 ms
[2023-03-18 05:33:03] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 218 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 220 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:04] [INFO ] Flatten gal took : 118 ms
[2023-03-18 05:33:04] [INFO ] Flatten gal took : 125 ms
[2023-03-18 05:33:04] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1999 transitions
Trivial Post-agglo rules discarded 1999 transitions
Performed 1999 trivial Post agglomeration. Transition count delta: 1999
Iterating post reduction 0 with 1999 rules applied. Total rules applied 1999 place count 2421 transition count 2201
Reduce places removed 2018 places and 0 transitions.
Ensure Unique test removed 1800 transitions
Reduce isomorphic transitions removed 1800 transitions.
Iterating post reduction 1 with 3818 rules applied. Total rules applied 5817 place count 403 transition count 401
Drop transitions removed 99 transitions
Redundant transition composition rules discarded 99 transitions
Iterating global reduction 2 with 99 rules applied. Total rules applied 5916 place count 403 transition count 302
Discarding 99 places :
Implicit places reduction removed 99 places
Drop transitions removed 198 transitions
Trivial Post-agglo rules discarded 198 transitions
Performed 198 trivial Post agglomeration. Transition count delta: 198
Iterating post reduction 2 with 297 rules applied. Total rules applied 6213 place count 304 transition count 104
Reduce places removed 297 places and 0 transitions.
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 98 transitions.
Iterating post reduction 3 with 395 rules applied. Total rules applied 6608 place count 7 transition count 6
Applied a total of 6608 rules in 52 ms. Remains 7 /2421 variables (removed 2414) and now considering 6/4200 (removed 4194) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 53 ms. Remains : 7/2421 places, 6/4200 transitions.
[2023-03-18 05:33:04] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:04] [INFO ] Flatten gal took : 0 ms
[2023-03-18 05:33:04] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 179 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 180 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:04] [INFO ] Flatten gal took : 101 ms
[2023-03-18 05:33:05] [INFO ] Flatten gal took : 111 ms
[2023-03-18 05:33:05] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 171 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 173 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:05] [INFO ] Flatten gal took : 102 ms
[2023-03-18 05:33:05] [INFO ] Flatten gal took : 112 ms
[2023-03-18 05:33:05] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 216 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 217 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:06] [INFO ] Flatten gal took : 101 ms
[2023-03-18 05:33:06] [INFO ] Flatten gal took : 111 ms
[2023-03-18 05:33:06] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 176 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 177 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:06] [INFO ] Flatten gal took : 97 ms
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 108 ms
[2023-03-18 05:33:07] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1991 transitions
Trivial Post-agglo rules discarded 1991 transitions
Performed 1991 trivial Post agglomeration. Transition count delta: 1991
Iterating post reduction 0 with 1991 rules applied. Total rules applied 1991 place count 2421 transition count 2209
Reduce places removed 2004 places and 0 transitions.
Ensure Unique test removed 1200 transitions
Reduce isomorphic transitions removed 1200 transitions.
Iterating post reduction 1 with 3204 rules applied. Total rules applied 5195 place count 417 transition count 1009
Drop transitions removed 691 transitions
Redundant transition composition rules discarded 691 transitions
Iterating global reduction 2 with 691 rules applied. Total rules applied 5886 place count 417 transition count 318
Discarding 92 places :
Implicit places reduction removed 92 places
Drop transitions removed 184 transitions
Trivial Post-agglo rules discarded 184 transitions
Performed 184 trivial Post agglomeration. Transition count delta: 184
Iterating post reduction 2 with 276 rules applied. Total rules applied 6162 place count 325 transition count 134
Reduce places removed 276 places and 0 transitions.
Ensure Unique test removed 91 transitions
Reduce isomorphic transitions removed 91 transitions.
Iterating post reduction 3 with 367 rules applied. Total rules applied 6529 place count 49 transition count 43
Applied a total of 6529 rules in 59 ms. Remains 49 /2421 variables (removed 2372) and now considering 43/4200 (removed 4157) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 59 ms. Remains : 49/2421 places, 43/4200 transitions.
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:07] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Applied a total of 0 rules in 170 ms. Remains 2421 /2421 variables (removed 0) and now considering 4200/4200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 171 ms. Remains : 2421/2421 places, 4200/4200 transitions.
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 101 ms
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 111 ms
[2023-03-18 05:33:07] [INFO ] Input system was already deterministic with 4200 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2421/2421 places, 4200/4200 transitions.
Drop transitions removed 1996 transitions
Trivial Post-agglo rules discarded 1996 transitions
Performed 1996 trivial Post agglomeration. Transition count delta: 1996
Iterating post reduction 0 with 1996 rules applied. Total rules applied 1996 place count 2421 transition count 2204
Reduce places removed 2013 places and 0 transitions.
Ensure Unique test removed 1600 transitions
Reduce isomorphic transitions removed 1600 transitions.
Iterating post reduction 1 with 3613 rules applied. Total rules applied 5609 place count 408 transition count 604
Drop transitions removed 296 transitions
Redundant transition composition rules discarded 296 transitions
Iterating global reduction 2 with 296 rules applied. Total rules applied 5905 place count 408 transition count 308
Discarding 96 places :
Implicit places reduction removed 96 places
Drop transitions removed 192 transitions
Trivial Post-agglo rules discarded 192 transitions
Performed 192 trivial Post agglomeration. Transition count delta: 192
Iterating post reduction 2 with 288 rules applied. Total rules applied 6193 place count 312 transition count 116
Reduce places removed 288 places and 0 transitions.
Ensure Unique test removed 95 transitions
Reduce isomorphic transitions removed 95 transitions.
Iterating post reduction 3 with 383 rules applied. Total rules applied 6576 place count 24 transition count 21
Applied a total of 6576 rules in 50 ms. Remains 24 /2421 variables (removed 2397) and now considering 21/4200 (removed 4179) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 50 ms. Remains : 24/2421 places, 21/4200 transitions.
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:07] [INFO ] Flatten gal took : 1 ms
[2023-03-18 05:33:07] [INFO ] Input system was already deterministic with 21 transitions.
[2023-03-18 05:33:08] [INFO ] Flatten gal took : 105 ms
[2023-03-18 05:33:08] [INFO ] Flatten gal took : 102 ms
[2023-03-18 05:33:08] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-18 05:33:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2421 places, 4200 transitions and 12800 arcs took 23 ms.
Total runtime 48044 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ServersAndClients-PT-100020
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371

FORMULA ServersAndClients-PT-100020-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ServersAndClients-PT-100020-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679117616492

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 37 (type EXCL) for 36 ServersAndClients-PT-100020-CTLCardinality-15
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-15
lola: result : true
lola: markings : 205
lola: fired transitions : 1220
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ServersAndClients-PT-100020-CTLCardinality-02
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 7 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-02
lola: result : true
lola: markings : 3
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 15 ServersAndClients-PT-100020-CTLCardinality-06
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 39 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-06
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 ServersAndClients-PT-100020-CTLCardinality-12
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-12
lola: result : true
lola: markings : 210
lola: fired transitions : 2464
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 4 (type EXCL) for 3 ServersAndClients-PT-100020-CTLCardinality-01
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-01
lola: result : false
lola: markings : 3
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 28 (type EXCL) for 27 ServersAndClients-PT-100020-CTLCardinality-11
lola: time limit : 446 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 28 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-11
lola: result : false
lola: markings : 1594
lola: fired transitions : 3045
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 ServersAndClients-PT-100020-CTLCardinality-10
lola: time limit : 510 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-10
lola: result : true
lola: markings : 646
lola: fired transitions : 1235
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 ServersAndClients-PT-100020-CTLCardinality-08
lola: time limit : 595 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 19 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-08
lola: result : false
lola: markings : 2201
lola: fired transitions : 4811
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100020-CTLCardinality-01: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-02: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-06: F false state space / EG
ServersAndClients-PT-100020-CTLCardinality-10: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-11: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-12: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ServersAndClients-PT-100020-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLCardinality-08: CTL 0 0 0 0 2 0 0 0
ServersAndClients-PT-100020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ServersAndClients-PT-100020-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 26 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 13
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 34 (type EXCL) for 33 ServersAndClients-PT-100020-CTLCardinality-14
lola: time limit : 714 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-14
lola: result : false
lola: markings : 2201
lola: fired transitions : 4200
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 ServersAndClients-PT-100020-CTLCardinality-09
lola: time limit : 893 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-09
lola: result : false
lola: markings : 299
lola: fired transitions : 497
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 ServersAndClients-PT-100020-CTLCardinality-05
lola: time limit : 1191 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-05
lola: result : true
lola: markings : 2201
lola: fired transitions : 6815
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ServersAndClients-PT-100020-CTLCardinality-03
lola: time limit : 1786 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-03
lola: result : true
lola: markings : 855
lola: fired transitions : 2491
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ServersAndClients-PT-100020-CTLCardinality-00
lola: time limit : 3573 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ServersAndClients-PT-100020-CTLCardinality-00
lola: result : false
lola: markings : 2201
lola: fired transitions : 7087
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ServersAndClients-PT-100020-CTLCardinality-00: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-01: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-02: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-03: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-05: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-06: F false state space / EG
ServersAndClients-PT-100020-CTLCardinality-08: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-09: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-10: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-11: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-12: CTL true CTL model checker
ServersAndClients-PT-100020-CTLCardinality-14: CTL false CTL model checker
ServersAndClients-PT-100020-CTLCardinality-15: CTL true CTL model checker


Time elapsed: 27 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ServersAndClients-PT-100020"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ServersAndClients-PT-100020, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891809000457"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ServersAndClients-PT-100020.tgz
mv ServersAndClients-PT-100020 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;