About the Execution of LoLa+red for SatelliteMemory-PT-X65535Y2048
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6864.527 | 299053.00 | 320052.00 | 1181.90 | ?????????????TFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808800330.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SatelliteMemory-PT-X65535Y2048, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808800330
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 452K
-rw-r--r-- 1 mcc users 7.4K Feb 26 13:05 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 13:05 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 12:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 26 12:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.2K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:50 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 13:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 26 13:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 26 13:06 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 95K Feb 26 13:06 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:50 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:50 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 12 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rwxr-xr-x 1 mcc users 5.5K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-00
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-01
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-02
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-03
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-04
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-05
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-06
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-07
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-08
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-09
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-10
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-11
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-12
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-13
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-14
FORMULA_NAME SatelliteMemory-PT-X65535Y2048-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679071325926
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SatelliteMemory-PT-X65535Y2048
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 16:42:09] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 16:42:09] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 16:42:09] [INFO ] Load time of PNML (sax parser for PT used): 30 ms
[2023-03-17 16:42:09] [INFO ] Transformed 13 places.
[2023-03-17 16:42:09] [INFO ] Transformed 10 transitions.
[2023-03-17 16:42:09] [INFO ] Parsed PT model containing 13 places and 10 transitions and 40 arcs in 143 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 20 ms.
Reduce places removed 1 places and 0 transitions.
Support contains 12 out of 12 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 14 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
// Phase 1: matrix 10 rows 12 cols
[2023-03-17 16:42:09] [INFO ] Computed 6 place invariants in 4 ms
[2023-03-17 16:42:09] [INFO ] Dead Transitions using invariants and state equation in 174 ms found 0 transitions.
[2023-03-17 16:42:09] [INFO ] Invariant cache hit.
[2023-03-17 16:42:09] [INFO ] Implicit Places using invariants in 39 ms returned []
[2023-03-17 16:42:10] [INFO ] Invariant cache hit.
[2023-03-17 16:42:10] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-17 16:42:10] [INFO ] Implicit Places using invariants and state equation in 60 ms returned []
Implicit Place search using SMT with State Equation took 115 ms to find 0 implicit places.
[2023-03-17 16:42:10] [INFO ] Invariant cache hit.
[2023-03-17 16:42:10] [INFO ] Dead Transitions using invariants and state equation in 75 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 428 ms. Remains : 12/12 places, 10/10 transitions.
Support contains 12 out of 12 places after structural reductions.
[2023-03-17 16:42:10] [INFO ] Flatten gal took : 35 ms
[2023-03-17 16:42:10] [INFO ] Flatten gal took : 25 ms
[2023-03-17 16:42:10] [INFO ] Input system was already deterministic with 10 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 776 ms. (steps per millisecond=12 ) properties (out of 37) seen :19
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Running SMT prover for 18 properties.
[2023-03-17 16:42:11] [INFO ] Invariant cache hit.
[2023-03-17 16:42:11] [INFO ] [Real]Absence check using 6 positive place invariants in 3 ms returned sat
[2023-03-17 16:42:11] [INFO ] After 220ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:16
[2023-03-17 16:42:12] [INFO ] [Nat]Absence check using 6 positive place invariants in 3 ms returned sat
[2023-03-17 16:42:12] [INFO ] After 216ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :14
[2023-03-17 16:42:12] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-17 16:42:12] [INFO ] After 200ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :4 sat :14
[2023-03-17 16:42:12] [INFO ] Deduced a trap composed of 2 places in 41 ms of which 8 ms to minimize.
[2023-03-17 16:42:12] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 47 ms
[2023-03-17 16:42:12] [INFO ] After 474ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :14
Attempting to minimize the solution found.
Minimization took 183 ms.
[2023-03-17 16:42:13] [INFO ] After 1040ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :14
Fused 18 Parikh solutions to 11 different solutions.
Parikh walk visited 12 properties in 19471 ms.
Support contains 5 out of 12 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 7 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:32] [INFO ] Invariant cache hit.
[2023-03-17 16:42:32] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 51 ms. Remains : 12/12 places, 10/10 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 690443 steps, run timeout after 3001 ms. (steps per millisecond=230 ) properties seen :{}
Probabilistic random walk after 690443 steps, saw 348979 distinct states, run finished after 3002 ms. (steps per millisecond=229 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-17 16:42:35] [INFO ] Invariant cache hit.
[2023-03-17 16:42:35] [INFO ] [Real]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-17 16:42:35] [INFO ] After 41ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-17 16:42:35] [INFO ] [Nat]Absence check using 6 positive place invariants in 2 ms returned sat
[2023-03-17 16:42:35] [INFO ] After 16ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-17 16:42:35] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-17 16:42:35] [INFO ] After 7ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-17 16:42:35] [INFO ] After 17ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 8 ms.
[2023-03-17 16:42:35] [INFO ] After 76ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Finished Parikh walk after 401438 steps, including 1 resets, run visited all 2 properties in 1497 ms. (steps per millisecond=268 )
Parikh walk visited 2 properties in 1497 ms.
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 5 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 5 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 2 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 49 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 51 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 2 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 44 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 48 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 3 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 49 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 3 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 61 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 64 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 3 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 4 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 44 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:37] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 41 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:37] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:37] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:38] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 3 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:38] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:38] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:38] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:38] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2023-03-17 16:42:38] [INFO ] Invariant cache hit.
[2023-03-17 16:42:38] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 12/12 places, 10/10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 1 ms
[2023-03-17 16:42:38] [INFO ] Input system was already deterministic with 10 transitions.
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 2 ms
[2023-03-17 16:42:38] [INFO ] Flatten gal took : 3 ms
[2023-03-17 16:42:38] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-17 16:42:38] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 12 places, 10 transitions and 38 arcs took 1 ms.
Total runtime 28822 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SatelliteMemory-PT-X65535Y2048
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA SatelliteMemory-PT-X65535Y2048-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X65535Y2048-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X65535Y2048-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679071624979
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 16 (type EXCL) for 15 SatelliteMemory-PT-X65535Y2048-CTLFireability-05
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X65535Y2048-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ 0 6 0 0 6 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/163 17/32 SatelliteMemory-PT-X65535Y2048-CTLFireability-05 3906101 m, 781220 m/sec, 3907226 t fired, .
Time elapsed: 5 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for SatelliteMemory-PT-X65535Y2048-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X65535Y2048-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ 0 6 0 0 6 0 0 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ 0 2 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 70 (type EXCL) for 65 SatelliteMemory-PT-X65535Y2048-CTLFireability-15
lola: time limit : 170 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type EXCL) for SatelliteMemory-PT-X65535Y2048-CTLFireability-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 68 (type EXCL) for 65 SatelliteMemory-PT-X65535Y2048-CTLFireability-15
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EXCL) for SatelliteMemory-PT-X65535Y2048-CTLFireability-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
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lola: time limit : 188 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for SatelliteMemory-PT-X65535Y2048-CTLFireability-14
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 SatelliteMemory-PT-X65535Y2048-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for SatelliteMemory-PT-X65535Y2048-CTLFireability-13
lola: result : true
lola: markings : 1
lola: time used : 0.000000
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lola: LAUNCH task # 37 (type EXCL) for 36 SatelliteMemory-PT-X65535Y2048-CTLFireability-12
lola: time limit : 299 sec
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF true state space /EXEF
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ false CTL model checker
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF true state space /EXEF
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ false CTL model checker
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 31 (type EXCL) for 30 SatelliteMemory-PT-X65535Y2048-CTLFireability-10
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF true state space /EXEF
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ false CTL model checker
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/325 6/32 SatelliteMemory-PT-X65535Y2048-CTLFireability-10 1288779 m, 257755 m/sec, 5578346 t fired, .
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SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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31 CTL EXCL 25/325 27/32 SatelliteMemory-PT-X65535Y2048-CTLFireability-10 6114748 m, 232696 m/sec, 27319025 t fired, .
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SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ false CTL model checker
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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31 CTL EXCL 30/325 31/32 SatelliteMemory-PT-X65535Y2048-CTLFireability-10 7264614 m, 229973 m/sec, 32531407 t fired, .
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SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
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SatelliteMemory-PT-X65535Y2048-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/3380 32/32 SatelliteMemory-PT-X65535Y2048-CTLFireability-00 7493380 m, 179935 m/sec, 34572208 t fired, .
Time elapsed: 260 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for SatelliteMemory-PT-X65535Y2048-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF true state space /EXEF
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ false CTL model checker
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X65535Y2048-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X65535Y2048-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 265 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X65535Y2048-CTLFireability-00: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-01: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-02: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-03: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-04: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-05: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-06: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-07: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-08: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-09: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-10: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-11: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-12: CTL unknown AGGR
SatelliteMemory-PT-X65535Y2048-CTLFireability-13: EXEF true state space /EXEF
SatelliteMemory-PT-X65535Y2048-CTLFireability-14: CONJ false CTL model checker
SatelliteMemory-PT-X65535Y2048-CTLFireability-15: CONJ true CONJ
Time elapsed: 265 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X65535Y2048"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SatelliteMemory-PT-X65535Y2048, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808800330"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X65535Y2048.tgz
mv SatelliteMemory-PT-X65535Y2048 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;