About the Execution of LoLa+red for SatelliteMemory-PT-X01500Y0046
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2280.432 | 130400.00 | 484459.00 | 472.10 | TTTFTFFFTFFFFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808800318.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SatelliteMemory-PT-X01500Y0046, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808800318
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.7K Feb 26 12:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 12:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 12:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 12:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.2K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:50 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 12:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 26 12:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 26 12:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 12:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:50 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:50 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 12 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rwxr-xr-x 1 mcc users 5.5K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1679070898457
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SatelliteMemory-PT-X01500Y0046
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 16:35:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-17 16:35:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 16:35:02] [INFO ] Load time of PNML (sax parser for PT used): 43 ms
[2023-03-17 16:35:02] [INFO ] Transformed 13 places.
[2023-03-17 16:35:02] [INFO ] Transformed 10 transitions.
[2023-03-17 16:35:02] [INFO ] Parsed PT model containing 13 places and 10 transitions and 40 arcs in 187 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 46 ms.
Working with output stream class java.io.PrintStream
Reduce places removed 1 places and 0 transitions.
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1060 ms. (steps per millisecond=9 ) properties (out of 15) seen :5
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 106 ms. (steps per millisecond=94 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 136 ms. (steps per millisecond=73 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 104 ms. (steps per millisecond=96 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 102 ms. (steps per millisecond=98 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 136 ms. (steps per millisecond=73 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 10 rows 12 cols
[2023-03-17 16:35:04] [INFO ] Computed 6 place invariants in 3 ms
[2023-03-17 16:35:04] [INFO ] [Real]Absence check using 6 positive place invariants in 5 ms returned sat
[2023-03-17 16:35:04] [INFO ] After 253ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:9
[2023-03-17 16:35:04] [INFO ] [Nat]Absence check using 6 positive place invariants in 2 ms returned sat
[2023-03-17 16:35:05] [INFO ] After 261ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :3
[2023-03-17 16:35:05] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-17 16:35:05] [INFO ] After 39ms SMT Verify possible using 1 Read/Feed constraints in natural domain returned unsat :7 sat :3
[2023-03-17 16:35:05] [INFO ] After 243ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :3
Attempting to minimize the solution found.
Minimization took 41 ms.
[2023-03-17 16:35:05] [INFO ] After 650ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :3
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 3 different solutions.
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Finished Parikh walk after 3371 steps, including 0 resets, run visited all 2 properties in 67 ms. (steps per millisecond=50 )
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 3 properties in 185 ms.
All properties solved without resorting to model-checking.
Total runtime 3665 ms.
starting LoLA
BK_INPUT SatelliteMemory-PT-X01500Y0046
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679071028857
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 31 (type CNST) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 61 (type EXCL) for 27 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 57 (type FNDP) for 27 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 27 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SRCH) for 27 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 58 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 57 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 60 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 61 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 137 (type EXCL) for 15 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 50 (type FNDP) for 36 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type EQUN) for 36 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 54 (type SRCH) for 36 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 24375
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 51 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 50 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 54 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 78 (type FNDP) for 33 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type EQUN) for 33 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 85 (type SRCH) for 33 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 1622911
lola: tried executions : 3
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-83.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 83 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
lola: result : false
lola: CANCELED task # 78 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 85 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 102 (type FNDP) for 9 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type EQUN) for 9 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 105 (type SRCH) for 9 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 202425
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 105 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
102 EF FNDP 3/224 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 5847609 t fired, 6 attempts, .
103 EF STEQ 3/224 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara not yet started (preprocessing).
137 EF EXCL 4/299 21/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 5395817 m, 1079163 m/sec, 5397730 t fired, .
Time elapsed: 5 secs. Pages in use: 21
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 63 (type FNDP) for 45 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 184457
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: LAUNCH task # 88 (type FNDP) for 3 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 1849
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 72 (type FNDP) for 21 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: CANCELED task # 137 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 4/276 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 4732194 t fired, 5 attempts, .
102 EF FNDP 8/272 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 8505843 t fired, 9 attempts, .
103 EF STEQ 8/272 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara not yet started (preprocessing).
Time elapsed: 10 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 134 (type EXCL) for 18 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: FINISHED task # 134 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06
lola: result : true
lola: markings : 373
lola: fired transitions : 372
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 132 (type EXCL) for 6 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 132 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02
lola: result : true
lola: markings : 281
lola: fired transitions : 280
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 118 (type EXCL) for 0 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: FINISHED task # 118 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00
lola: result : true
lola: markings : 2124
lola: fired transitions : 2123
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 24 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08
lola: time limit : 598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08
lola: result : true
lola: markings : 511
lola: fired transitions : 510
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 92 (type EXCL) for 39 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: time limit : 718 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 9/445 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 8657973 t fired, 9 attempts, .
92 EF EXCL 5/718 16/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 4017095 m, 803419 m/sec, 5409318 t fired, .
102 EF FNDP 13/441 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 10838047 t fired, 11 attempts, .
103 EF STEQ 13/506 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 15 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 14/440 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 12648228 t fired, 13 attempts, .
92 EF EXCL 10/718 29/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 7548703 m, 706321 m/sec, 10593156 t fired, .
102 EF FNDP 18/436 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 13217977 t fired, 14 attempts, .
103 EF STEQ 18/501 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 20 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 92 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 19/435 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 16509425 t fired, 17 attempts, .
102 EF FNDP 23/431 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 15547312 t fired, 16 attempts, .
103 EF STEQ 23/496 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 25 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 96 (type EXCL) for 12 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04
lola: time limit : 893 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 4 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 24/430 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 20315945 t fired, 21 attempts, .
96 EF EXCL 5/893 14/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04 3474793 m, 694958 m/sec, 4969417 t fired, .
102 EF FNDP 28/426 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 17830090 t fired, 18 attempts, .
103 EF STEQ 28/491 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 30 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 96 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04
lola: result : true
lola: markings : 5139692
lola: fired transitions : 7351252
lola: time used : 8.000000
lola: memory pages used : 20
lola: LAUNCH task # 113 (type EXCL) for 42 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14
lola: time limit : 1189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 113 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14
lola: result : true
lola: markings : 243
lola: fired transitions : 282
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 76 (type EXCL) for 21 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
lola: time limit : 1783 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 2 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 29/691 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 24056941 t fired, 25 attempts, .
76 EF EXCL 2/1783 6/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 1518432 m, 303686 m/sec, 2285847 t fired, .
102 EF FNDP 33/688 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 20106214 t fired, 21 attempts, .
103 EF STEQ 33/688 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 35 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 2 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 34/689 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 27653867 t fired, 28 attempts, .
76 EF EXCL 7/1783 17/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 4385323 m, 573378 m/sec, 6649372 t fired, .
102 EF FNDP 38/686 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 22342596 t fired, 23 attempts, .
103 EF STEQ 38/686 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 40 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 2 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 39/684 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 31123758 t fired, 32 attempts, .
76 EF EXCL 12/1783 28/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 7155684 m, 554072 m/sec, 10931858 t fired, .
102 EF FNDP 43/681 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 24606881 t fired, 25 attempts, .
103 EF STEQ 43/681 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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lola: CANCELED task # 76 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 2 2 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 44/679 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 34880838 t fired, 35 attempts, .
102 EF FNDP 48/676 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 26962468 t fired, 27 attempts, .
103 EF STEQ 48/676 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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lola: LAUNCH task # 106 (type EXCL) for 9 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
lola: time limit : 3550 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 3 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 49/674 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 38443531 t fired, 39 attempts, .
102 EF FNDP 53/671 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 29260710 t fired, 30 attempts, .
103 EF STEQ 53/671 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
106 EF EXCL 5/3550 11/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 2662454 m, 532490 m/sec, 3780073 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 3 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 54/669 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 42010615 t fired, 43 attempts, .
102 EF FNDP 58/666 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 31557900 t fired, 32 attempts, .
103 EF STEQ 58/666 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
106 EF EXCL 10/3550 21/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 5251832 m, 517875 m/sec, 7457430 t fired, .
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SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 3 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 59/664 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 45540334 t fired, 46 attempts, .
102 EF FNDP 63/661 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 33862933 t fired, 34 attempts, .
103 EF STEQ 63/661 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
106 EF EXCL 15/3550 30/32 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 7750914 m, 499816 m/sec, 11164221 t fired, .
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lola: CANCELED task # 106 (type EXCL) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 4 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
72 EF FNDP 64/659 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 49251160 t fired, 50 attempts, .
102 EF FNDP 68/656 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 36221299 t fired, 37 attempts, .
103 EF STEQ 68/656 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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lola: LAUNCH task # 69 (type FNDP) for 39 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 5/882 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 3444678 t fired, 4 attempts, .
72 EF FNDP 69/834 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 51774771 t fired, 52 attempts, .
102 EF FNDP 73/831 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 38123869 t fired, 39 attempts, .
103 EF STEQ 73/1131 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 10/877 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 6718051 t fired, 7 attempts, .
72 EF FNDP 74/829 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 54274349 t fired, 55 attempts, .
102 EF FNDP 78/826 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 40012644 t fired, 41 attempts, .
103 EF STEQ 78/1126 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 15/872 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 9900141 t fired, 10 attempts, .
72 EF FNDP 79/824 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 56768223 t fired, 57 attempts, .
102 EF FNDP 83/821 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 41890221 t fired, 42 attempts, .
103 EF STEQ 83/1121 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 20/867 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 13045175 t fired, 14 attempts, .
72 EF FNDP 84/819 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 59266773 t fired, 60 attempts, .
102 EF FNDP 88/816 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 43764166 t fired, 44 attempts, .
103 EF STEQ 88/1116 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
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SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 25/862 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 16158696 t fired, 17 attempts, .
72 EF FNDP 89/814 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 61764934 t fired, 62 attempts, .
102 EF FNDP 93/811 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 45631539 t fired, 46 attempts, .
103 EF STEQ 93/1111 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 95 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 30/857 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 19256487 t fired, 20 attempts, .
72 EF FNDP 94/809 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 64262227 t fired, 65 attempts, .
102 EF FNDP 98/806 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 47495261 t fired, 48 attempts, .
103 EF STEQ 98/1106 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 100 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 35/852 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 22322096 t fired, 23 attempts, .
72 EF FNDP 99/804 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 66754036 t fired, 67 attempts, .
102 EF FNDP 103/801 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 49353085 t fired, 50 attempts, .
103 EF STEQ 103/1101 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 105 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 40/847 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 25391633 t fired, 26 attempts, .
72 EF FNDP 104/799 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 69236844 t fired, 70 attempts, .
102 EF FNDP 108/796 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 51208005 t fired, 52 attempts, .
103 EF STEQ 108/1096 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 110 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 45/842 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 28374248 t fired, 29 attempts, .
72 EF FNDP 109/794 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 71667065 t fired, 72 attempts, .
102 EF FNDP 113/791 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 53045319 t fired, 54 attempts, .
103 EF STEQ 113/1091 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 115 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF 0 1 2 0 1 0 2 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF 0 4 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF 0 3 1 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF 0 3 1 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 50/837 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 31287694 t fired, 32 attempts, .
72 EF FNDP 114/789 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 74020454 t fired, 75 attempts, .
102 EF FNDP 118/786 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 54835175 t fired, 55 attempts, .
103 EF STEQ 118/1086 0/5 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 sara is running.
Time elapsed: 120 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 103 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 102 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 99 (type FNDP) for 15 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type EQUN) for 15 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 55417900
lola: tried executions : 57
lola: time used : 120.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
lola: FINISHED task # 124 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 99 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 73 (type EQUN) for 21 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SRCH) for 21 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 99 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 16720
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 73 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 72 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 75 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 70 (type EQUN) for 39 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 91 (type SRCH) for 39 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SRCH) for 39 SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 74823632
lola: tried executions : 76
lola: time used : 116.000000
lola: memory pages used : 0
lola: FINISHED task # 121 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: result : unknown
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
lola: FINISHED task # 70 (type EQUN) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 69 (type FNDP) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 91 (type SRCH) for SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-00: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-01: EF true findpath
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-02: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-03: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-04: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-05: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-06: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-07: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-08: EF true tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-09: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-10: INITIAL false preprocessing
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-11: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-12: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-13: EF false state equation
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-14: AG false tandem / relaxed
SatelliteMemory-PT-X01500Y0046-ReachabilityCardinality-15: EF true findpath
Time elapsed: 122 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X01500Y0046"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SatelliteMemory-PT-X01500Y0046, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808800318"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X01500Y0046.tgz
mv SatelliteMemory-PT-X01500Y0046 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;