About the Execution of LoLa+red for SafeBus-PT-10
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 9861.728 | 336934.00 | 366424.00 | 1205.30 | ?TTFFFF?F?TTF?TF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808700274.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SafeBus-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808700274
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.6M
-rw-r--r-- 1 mcc users 19K Feb 26 01:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 126K Feb 26 01:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 81K Feb 26 01:38 CTLFireability.txt
-rw-r--r-- 1 mcc users 393K Feb 26 01:38 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 40K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 42K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 151K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 31K Feb 26 01:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 198K Feb 26 01:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 244K Feb 26 01:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.1M Feb 26 01:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 1.2M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-10-CTLFireability-00
FORMULA_NAME SafeBus-PT-10-CTLFireability-01
FORMULA_NAME SafeBus-PT-10-CTLFireability-02
FORMULA_NAME SafeBus-PT-10-CTLFireability-03
FORMULA_NAME SafeBus-PT-10-CTLFireability-04
FORMULA_NAME SafeBus-PT-10-CTLFireability-05
FORMULA_NAME SafeBus-PT-10-CTLFireability-06
FORMULA_NAME SafeBus-PT-10-CTLFireability-07
FORMULA_NAME SafeBus-PT-10-CTLFireability-08
FORMULA_NAME SafeBus-PT-10-CTLFireability-09
FORMULA_NAME SafeBus-PT-10-CTLFireability-10
FORMULA_NAME SafeBus-PT-10-CTLFireability-11
FORMULA_NAME SafeBus-PT-10-CTLFireability-12
FORMULA_NAME SafeBus-PT-10-CTLFireability-13
FORMULA_NAME SafeBus-PT-10-CTLFireability-14
FORMULA_NAME SafeBus-PT-10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679051095082
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-PT-10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:04:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:04:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:04:59] [INFO ] Load time of PNML (sax parser for PT used): 367 ms
[2023-03-17 11:04:59] [INFO ] Transformed 316 places.
[2023-03-17 11:04:59] [INFO ] Transformed 1631 transitions.
[2023-03-17 11:04:59] [INFO ] Parsed PT model containing 316 places and 1631 transitions and 11384 arcs in 575 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 62 ms.
Reduce places removed 10 places and 0 transitions.
Support contains 306 out of 306 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1631/1631 transitions.
Applied a total of 0 rules in 53 ms. Remains 306 /306 variables (removed 0) and now considering 1631/1631 (removed 0) transitions.
[2023-03-17 11:04:59] [INFO ] Flow matrix only has 642 transitions (discarded 989 similar events)
// Phase 1: matrix 642 rows 306 cols
[2023-03-17 11:04:59] [INFO ] Computed 45 place invariants in 51 ms
[2023-03-17 11:04:59] [INFO ] Implicit Places using invariants in 354 ms returned []
[2023-03-17 11:05:00] [INFO ] Flow matrix only has 642 transitions (discarded 989 similar events)
[2023-03-17 11:05:00] [INFO ] Invariant cache hit.
[2023-03-17 11:05:00] [INFO ] State equation strengthened by 111 read => feed constraints.
[2023-03-17 11:05:00] [INFO ] Implicit Places using invariants and state equation in 584 ms returned []
Implicit Place search using SMT with State Equation took 986 ms to find 0 implicit places.
[2023-03-17 11:05:00] [INFO ] Flow matrix only has 642 transitions (discarded 989 similar events)
[2023-03-17 11:05:00] [INFO ] Invariant cache hit.
[2023-03-17 11:05:02] [INFO ] Dead Transitions using invariants and state equation in 1615 ms found 100 transitions.
Found 100 dead transitions using SMT.
Drop transitions removed 100 transitions
Dead transitions reduction (with SMT) removed 100 transitions
Starting structural reductions in LTL mode, iteration 1 : 306/306 places, 1531/1631 transitions.
Applied a total of 0 rules in 14 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2689 ms. Remains : 306/306 places, 1531/1631 transitions.
Support contains 306 out of 306 places after structural reductions.
[2023-03-17 11:05:03] [INFO ] Flatten gal took : 428 ms
[2023-03-17 11:05:03] [INFO ] Flatten gal took : 209 ms
[2023-03-17 11:05:04] [INFO ] Input system was already deterministic with 1531 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1387 ms. (steps per millisecond=7 ) properties (out of 79) seen :60
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=15 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 19) seen :1
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :1
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Running SMT prover for 17 properties.
[2023-03-17 11:05:06] [INFO ] Flow matrix only has 642 transitions (discarded 889 similar events)
// Phase 1: matrix 642 rows 306 cols
[2023-03-17 11:05:06] [INFO ] Computed 45 place invariants in 16 ms
[2023-03-17 11:05:07] [INFO ] [Real]Absence check using 24 positive place invariants in 15 ms returned sat
[2023-03-17 11:05:07] [INFO ] [Real]Absence check using 24 positive and 21 generalized place invariants in 10 ms returned sat
[2023-03-17 11:05:08] [INFO ] After 414ms SMT Verify possible using state equation in real domain returned unsat :5 sat :1 real:11
[2023-03-17 11:05:08] [INFO ] State equation strengthened by 111 read => feed constraints.
[2023-03-17 11:05:08] [INFO ] After 564ms SMT Verify possible using 111 Read/Feed constraints in real domain returned unsat :5 sat :0 real:12
[2023-03-17 11:05:08] [INFO ] After 1401ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:12
[2023-03-17 11:05:08] [INFO ] [Nat]Absence check using 24 positive place invariants in 16 ms returned sat
[2023-03-17 11:05:08] [INFO ] [Nat]Absence check using 24 positive and 21 generalized place invariants in 13 ms returned sat
[2023-03-17 11:05:09] [INFO ] After 402ms SMT Verify possible using state equation in natural domain returned unsat :15 sat :2
[2023-03-17 11:05:09] [INFO ] After 289ms SMT Verify possible using 111 Read/Feed constraints in natural domain returned unsat :15 sat :2
[2023-03-17 11:05:09] [INFO ] After 610ms SMT Verify possible using trap constraints in natural domain returned unsat :15 sat :2
Attempting to minimize the solution found.
Minimization took 232 ms.
[2023-03-17 11:05:10] [INFO ] After 1508ms SMT Verify possible using all constraints in natural domain returned unsat :15 sat :2
Fused 17 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 7 ms.
Support contains 7 out of 306 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Free-agglomeration rule (complex) applied 10 times.
Iterating global reduction 0 with 10 rules applied. Total rules applied 10 place count 306 transition count 1521
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 0 with 10 rules applied. Total rules applied 20 place count 296 transition count 1521
Applied a total of 20 rules in 744 ms. Remains 296 /306 variables (removed 10) and now considering 1521/1531 (removed 10) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 745 ms. Remains : 296/306 places, 1521/1531 transitions.
Finished random walk after 7591 steps, including 2 resets, run visited all 2 properties in 174 ms. (steps per millisecond=43 )
Successfully simplified 15 atomic propositions for a total of 16 simplifications.
FORMULA SafeBus-PT-10-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SafeBus-PT-10-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 11:05:11] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-17 11:05:11] [INFO ] Flatten gal took : 149 ms
FORMULA SafeBus-PT-10-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SafeBus-PT-10-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 11:05:11] [INFO ] Flatten gal took : 128 ms
[2023-03-17 11:05:12] [INFO ] Input system was already deterministic with 1531 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 12 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:12] [INFO ] Flatten gal took : 68 ms
[2023-03-17 11:05:12] [INFO ] Flatten gal took : 78 ms
[2023-03-17 11:05:12] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 7 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:12] [INFO ] Flatten gal took : 68 ms
[2023-03-17 11:05:12] [INFO ] Flatten gal took : 78 ms
[2023-03-17 11:05:12] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 7 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:13] [INFO ] Flatten gal took : 74 ms
[2023-03-17 11:05:13] [INFO ] Flatten gal took : 85 ms
[2023-03-17 11:05:13] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 318 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 321 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:13] [INFO ] Flatten gal took : 96 ms
[2023-03-17 11:05:13] [INFO ] Flatten gal took : 70 ms
[2023-03-17 11:05:14] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 8 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:14] [INFO ] Flatten gal took : 77 ms
[2023-03-17 11:05:14] [INFO ] Flatten gal took : 103 ms
[2023-03-17 11:05:14] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 221 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 222 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:14] [INFO ] Flatten gal took : 65 ms
[2023-03-17 11:05:14] [INFO ] Flatten gal took : 76 ms
[2023-03-17 11:05:14] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 170 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 171 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:15] [INFO ] Flatten gal took : 51 ms
[2023-03-17 11:05:15] [INFO ] Flatten gal took : 58 ms
[2023-03-17 11:05:15] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 7 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:15] [INFO ] Flatten gal took : 51 ms
[2023-03-17 11:05:15] [INFO ] Flatten gal took : 58 ms
[2023-03-17 11:05:15] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 124 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 125 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:15] [INFO ] Flatten gal took : 51 ms
[2023-03-17 11:05:15] [INFO ] Flatten gal took : 59 ms
[2023-03-17 11:05:15] [INFO ] Input system was already deterministic with 1531 transitions.
Finished random walk after 320 steps, including 0 resets, run visited all 1 properties in 5 ms. (steps per millisecond=64 )
FORMULA SafeBus-PT-10-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 107 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 108 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 51 ms
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 57 ms
[2023-03-17 11:05:16] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 6 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 50 ms
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 58 ms
[2023-03-17 11:05:16] [INFO ] Input system was already deterministic with 1531 transitions.
Starting structural reductions in LTL mode, iteration 0 : 306/306 places, 1531/1531 transitions.
Applied a total of 0 rules in 6 ms. Remains 306 /306 variables (removed 0) and now considering 1531/1531 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 306/306 places, 1531/1531 transitions.
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 51 ms
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 59 ms
[2023-03-17 11:05:16] [INFO ] Input system was already deterministic with 1531 transitions.
[2023-03-17 11:05:16] [INFO ] Flatten gal took : 100 ms
[2023-03-17 11:05:17] [INFO ] Flatten gal took : 92 ms
[2023-03-17 11:05:17] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 43 ms.
[2023-03-17 11:05:17] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 306 places, 1531 transitions and 10404 arcs took 13 ms.
Total runtime 18897 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SafeBus-PT-10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability
FORMULA SafeBus-PT-10-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-10-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-10-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-10-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-10-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-10-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679051432016
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SafeBus-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808700274"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-10.tgz
mv SafeBus-PT-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;